This is an archive of the discontinued LLVM Phabricator instance.

Differential D96642

[ValueTracking] Dereferenced pointers are noundef
ClosedPublic

Authored by aqjune on Feb 13 2021, 12:56 AM.

Details

Reviewers
jdoerfert
xbolva00
nikic
uenoku
sstefan1
baziotis
Commits
rG5f3c99085d4c: [ValueTracking] Dereferenced pointers are noundef
Summary

This is a follow-up of D95238's LangRef update.
This patch updates programUndefinedIfUndefOrPoison(V) to return true if
V is used by any memory-accessing instruction.
Interestingly, this affected many tests in Attributors, mainly about adding noundefs.
The tests are updated using llvm/utils/update_test_checks.py. I checked that the diffs
are about updating noundefs.

Diff Detail

Event Timeline

aqjune created this revision.Feb 13 2021, 12:56 AM
Herald added a reviewer: uenoku. · View Herald TranscriptFeb 13 2021, 12:56 AM
Herald added subscribers: okura, kuter, uenoku and 3 others. · View Herald Transcript
aqjune requested review of this revision.Feb 13 2021, 12:56 AM
Herald added a reviewer: sstefan1. · View Herald TranscriptFeb 13 2021, 12:56 AM
Herald added a reviewer: baziotis. · View Herald Transcript
Herald added a project: Restricted Project. · View Herald Transcript
Herald added subscribers: llvm-commits, bbn. · View Herald Transcript
Harbormaster completed remote builds in B89097: Diff 323533.Feb 13 2021, 1:29 AM
nikic accepted this revision.Feb 13 2021, 1:57 AM

LGTM

llvm/include/llvm/Analysis/ValueTracking.h
594

, i.e. has undef bits or is poison.

llvm/lib/Analysis/ValueTracking.cpp
5174

Add a comment that these may be *partially* undef and thus not well-defined?

This revision is now accepted and ready to land.Feb 13 2021, 1:57 AM
aqjune updated this revision to Diff 323612.Feb 14 2021, 5:55 AM

Address comments

This revision was landed with ongoing or failed builds.Feb 14 2021, 5:56 AM
Closed by commit rG5f3c99085d4c: [ValueTracking] Dereferenced pointers are noundef (authored by aqjune). · Explain Why
This revision was automatically updated to reflect the committed changes.
aqjune added a commit: rG5f3c99085d4c: [ValueTracking] Dereferenced pointers are noundef.
aqjune marked 2 inline comments as done.Feb 14 2021, 5:57 AM
Harbormaster completed remote builds in B89152: Diff 323612.Feb 14 2021, 6:28 AM

Revision Contents

PathSize
llvm/
include/
llvm/
Analysis/
5 lines
lib/
Analysis/
52 lines
test/
Transforms/
Attributor/
ArgumentPromotion/
8 lines
X86/
8 lines
32 lines
10 lines
6 lines
6 lines
26 lines
32 lines
16 lines
4 lines
4 lines
50 lines
20 lines
20 lines
34 lines
40 lines
2 lines
90 lines
81 lines
4 lines
20 lines
30 lines
28 lines
4 lines
30 lines
4 lines
20 lines
48 lines
48 lines
65 lines
12 lines
16 lines
InstSimplify/
12 lines
OpenMP/
6 lines

Diff 323613

llvm/include/llvm/Analysis/ValueTracking.h

Show First 20 Lines • Show All 584 Lines • ▼ Show 20 Linesconstexpr unsigned MaxAnalysisRecursionDepth = 6;
/// To filter out operands that raise UB on poison, you can use /// To filter out operands that raise UB on poison, you can use
/// getGuaranteedNonPoisonOp. /// getGuaranteedNonPoisonOp.
bool propagatesPoison(const Operator *I); bool propagatesPoison(const Operator *I);
/// Insert operands of I into Ops such that I will trigger undefined behavior /// Insert operands of I into Ops such that I will trigger undefined behavior
/// if I is executed and that operand has a poison value. /// if I is executed and that operand has a poison value.
void getGuaranteedNonPoisonOps(const Instruction *I, void getGuaranteedNonPoisonOps(const Instruction *I,
SmallPtrSetImpl<const Value *> &Ops); SmallPtrSetImpl<const Value *> &Ops);
/// Insert operands of I into Ops such that I will trigger undefined behavior
/// if I is executed and that operand is not a well-defined value
nikicUnsubmitted
Done
ReplyInline Actions

, i.e. has undef bits or is poison.

nikic: , i.e. has undef bits or is poison.
/// (i.e. has undef bits or poison).
void getGuaranteedWellDefinedOps(const Instruction *I,
SmallPtrSetImpl<const Value *> &Ops);
/// Return true if the given instruction must trigger undefined behavior /// Return true if the given instruction must trigger undefined behavior
/// when I is executed with any operands which appear in KnownPoison holding /// when I is executed with any operands which appear in KnownPoison holding
/// a poison value at the point of execution. /// a poison value at the point of execution.
bool mustTriggerUB(const Instruction *I, bool mustTriggerUB(const Instruction *I,
const SmallSet<const Value *, 16>& KnownPoison); const SmallSet<const Value *, 16>& KnownPoison);
/// Return true if this function can prove that if Inst is executed /// Return true if this function can prove that if Inst is executed
▲ Show 20 Lines • Show All 180 Lines • Show Last 20 Lines

llvm/lib/Analysis/ValueTracking.cpp

Show First 20 Lines • Show All 5,123 Lines • ▼ Show 20 Lines default:
if (isa<BinaryOperator>(I) || isa<UnaryOperator>(I) || isa<CastInst>(I)) if (isa<BinaryOperator>(I) || isa<UnaryOperator>(I) || isa<CastInst>(I))
return true; return true;
// Be conservative and return false. // Be conservative and return false.
return false; return false;
} }
} }
void llvm::getGuaranteedNonPoisonOps(const Instruction *I, void llvm::getGuaranteedWellDefinedOps(
SmallPtrSetImpl<const Value *> &Operands) { const Instruction *I, SmallPtrSetImpl<const Value *> &Operands) {
switch (I->getOpcode()) { switch (I->getOpcode()) {
case Instruction::Store: case Instruction::Store:
Operands.insert(cast<StoreInst>(I)->getPointerOperand()); Operands.insert(cast<StoreInst>(I)->getPointerOperand());
break; break;
case Instruction::Load: case Instruction::Load:
Operands.insert(cast<LoadInst>(I)->getPointerOperand()); Operands.insert(cast<LoadInst>(I)->getPointerOperand());
break; break;
// Since dereferenceable attribute imply noundef, atomic operations
// also implicitly have noundef pointers too
case Instruction::AtomicCmpXchg: case Instruction::AtomicCmpXchg:
Operands.insert(cast<AtomicCmpXchgInst>(I)->getPointerOperand()); Operands.insert(cast<AtomicCmpXchgInst>(I)->getPointerOperand());
break; break;
case Instruction::AtomicRMW: case Instruction::AtomicRMW:
Operands.insert(cast<AtomicRMWInst>(I)->getPointerOperand()); Operands.insert(cast<AtomicRMWInst>(I)->getPointerOperand());
break; break;
case Instruction::UDiv:
case Instruction::SDiv:
case Instruction::URem:
case Instruction::SRem:
Operands.insert(I->getOperand(1));
break;
case Instruction::Call: case Instruction::Call:
case Instruction::Invoke: { case Instruction::Invoke: {
const CallBase *CB = cast<CallBase>(I); const CallBase *CB = cast<CallBase>(I);
if (CB->isIndirectCall()) if (CB->isIndirectCall())
Operands.insert(CB->getCalledOperand()); Operands.insert(CB->getCalledOperand());
for (unsigned i = 0; i < CB->arg_size(); ++i) { for (unsigned i = 0; i < CB->arg_size(); ++i) {
if (CB->paramHasAttr(i, Attribute::NoUndef)) if (CB->paramHasAttr(i, Attribute::NoUndef) ||
CB->paramHasAttr(i, Attribute::Dereferenceable))
Operands.insert(CB->getArgOperand(i)); Operands.insert(CB->getArgOperand(i));
} }
break; break;
} }
default: default:
break; break;
} }
} }
void llvm::getGuaranteedNonPoisonOps(const Instruction *I,
SmallPtrSetImpl<const Value *> &Operands) {
getGuaranteedWellDefinedOps(I, Operands);
switch (I->getOpcode()) {
nikicUnsubmitted
Done
ReplyInline Actions

Add a comment that these may be *partially* undef and thus not well-defined?

nikic: Add a comment that these may be *partially* undef and thus not well-defined?
// Divisors of these operations are allowed to be partially undef.
case Instruction::UDiv:
case Instruction::SDiv:
case Instruction::URem:
case Instruction::SRem:
Operands.insert(I->getOperand(1));
break;
default:
break;
}
}
bool llvm::mustTriggerUB(const Instruction *I, bool llvm::mustTriggerUB(const Instruction *I,
const SmallSet<const Value *, 16>& KnownPoison) { const SmallSet<const Value *, 16>& KnownPoison) {
SmallPtrSet<const Value *, 4> NonPoisonOps; SmallPtrSet<const Value *, 4> NonPoisonOps;
getGuaranteedNonPoisonOps(I, NonPoisonOps); getGuaranteedNonPoisonOps(I, NonPoisonOps);
for (const auto *V : NonPoisonOps) for (const auto *V : NonPoisonOps)
if (KnownPoison.count(V)) if (KnownPoison.count(V))
return true; return true;
Show All 21 Lines if (const auto *Inst = dyn_cast<Instruction>(V)) {
Begin = BB->begin(); Begin = BB->begin();
} else { } else {
return false; return false;
} }
BasicBlock::const_iterator End = BB->end(); BasicBlock::const_iterator End = BB->end();
if (!PoisonOnly) { if (!PoisonOnly) {
// Be conservative & just check whether a value is passed to a noundef // Since undef does not propagate eagerly, be conservative & just check
// argument. // whether a value is directly passed to an instruction that must take
// Instructions that raise UB with a poison operand are well-defined // well-defined operands.
// or have unclear semantics when the input is partially undef.
// For example, 'udiv x, (undef | 1)' isn't UB.
for (auto &I : make_range(Begin, End)) { for (auto &I : make_range(Begin, End)) {
if (const auto *CB = dyn_cast<CallBase>(&I)) { SmallPtrSet<const Value *, 4> WellDefinedOps;
for (unsigned i = 0; i < CB->arg_size(); ++i) { getGuaranteedWellDefinedOps(&I, WellDefinedOps);
if (CB->paramHasAttr(i, Attribute::NoUndef) && for (auto *Op : WellDefinedOps) {
CB->getArgOperand(i) == V) if (Op == V)
return true; return true;
} }
}
if (!isGuaranteedToTransferExecutionToSuccessor(&I)) if (!isGuaranteedToTransferExecutionToSuccessor(&I))
break; break;
} }
return false; return false;
} }
// Set of instructions that we have proved will yield poison if Inst // Set of instructions that we have proved will yield poison if Inst
// does. // does.
▲ Show 20 Lines • Show All 1,603 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/ArgumentPromotion/2008-07-02-array-indexing.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; PR2498 ; PR2498
; This test tries to convince CHECK about promoting the load from %A + 2, ; This test tries to convince CHECK about promoting the load from %A + 2,
; because there is a load of %A in the entry block ; because there is a load of %A in the entry block
define internal i32 @callee(i1 %C, i32* %A) { define internal i32 @callee(i1 %C, i32* %A) {
; ;
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@callee ; IS__TUNIT____-LABEL: define {{[^@]+}}@callee
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A:%.*]]) [[ATTR0:#.*]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]]) [[ATTR0:#.*]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[A_0:%.*]] = load i32, i32* [[A]], align 4 ; IS__TUNIT____-NEXT: [[A_0:%.*]] = load i32, i32* [[A]], align 4
; IS__TUNIT____-NEXT: br label [[F:%.*]] ; IS__TUNIT____-NEXT: br label [[F:%.*]]
; IS__TUNIT____: T: ; IS__TUNIT____: T:
; IS__TUNIT____-NEXT: unreachable ; IS__TUNIT____-NEXT: unreachable
; IS__TUNIT____: F: ; IS__TUNIT____: F:
; IS__TUNIT____-NEXT: [[A_2:%.*]] = getelementptr i32, i32* [[A]], i32 2 ; IS__TUNIT____-NEXT: [[A_2:%.*]] = getelementptr i32, i32* [[A]], i32 2
; IS__TUNIT____-NEXT: [[R:%.*]] = load i32, i32* [[A_2]], align 4 ; IS__TUNIT____-NEXT: [[R:%.*]] = load i32, i32* [[A_2]], align 4
; IS__TUNIT____-NEXT: ret i32 [[R]] ; IS__TUNIT____-NEXT: ret i32 [[R]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@callee ; IS__CGSCC____-LABEL: define {{[^@]+}}@callee
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A:%.*]]) [[ATTR0:#.*]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]]) [[ATTR0:#.*]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: br label [[F:%.*]] ; IS__CGSCC____-NEXT: br label [[F:%.*]]
; IS__CGSCC____: T: ; IS__CGSCC____: T:
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: F: ; IS__CGSCC____: F:
; IS__CGSCC____-NEXT: [[A_2:%.*]] = getelementptr i32, i32* [[A]], i32 2 ; IS__CGSCC____-NEXT: [[A_2:%.*]] = getelementptr i32, i32* [[A]], i32 2
; IS__CGSCC____-NEXT: [[R:%.*]] = load i32, i32* [[A_2]], align 4 ; IS__CGSCC____-NEXT: [[R:%.*]] = load i32, i32* [[A_2]], align 4
; IS__CGSCC____-NEXT: ret i32 [[R]] ; IS__CGSCC____-NEXT: ret i32 [[R]]
Show All 17 Lines
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo ; IS__TUNIT____-LABEL: define {{[^@]+}}@foo
; IS__TUNIT____-SAME: (i32* nocapture nofree readonly [[A:%.*]]) [[ATTR0]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree readonly [[A:%.*]]) [[ATTR0]] {
; IS__TUNIT____-NEXT: [[X:%.*]] = call i32 @callee(i32* nocapture nofree readonly align 4 [[A]]) [[ATTR1:#.*]] ; IS__TUNIT____-NEXT: [[X:%.*]] = call i32 @callee(i32* nocapture nofree readonly align 4 [[A]]) [[ATTR1:#.*]]
; IS__TUNIT____-NEXT: ret i32 [[X]] ; IS__TUNIT____-NEXT: ret i32 [[X]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo ; IS__CGSCC____-LABEL: define {{[^@]+}}@foo
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A:%.*]]) [[ATTR0]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]]) [[ATTR0]] {
; IS__CGSCC____-NEXT: [[X:%.*]] = call i32 @callee(i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A]]) [[ATTR1:#.*]] ; IS__CGSCC____-NEXT: [[X:%.*]] = call i32 @callee(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]]) [[ATTR1:#.*]]
; IS__CGSCC____-NEXT: ret i32 [[X]] ; IS__CGSCC____-NEXT: ret i32 [[X]]
; ;
%X = call i32 @callee(i1 false, i32* %A) ; <i32> [#uses=1] %X = call i32 @callee(i1 false, i32* %A) ; <i32> [#uses=1]
ret i32 %X ret i32 %X
} }

llvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll

Show First 20 Lines • Show All 54 Lines • ▼ Show 20 Lines
; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR3:#.*]] ; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR3:#.*]]
; IS__TUNIT_NPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) [[ATTR4:#.*]] ; IS__TUNIT_NPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) [[ATTR4:#.*]]
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32
; IS__TUNIT_NPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@no_promote ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@no_promote
; IS__CGSCC_OPM-SAME: (<4 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) [[ATTR1:#.*]] { ; IS__CGSCC_OPM-SAME: (<4 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) [[ATTR1:#.*]] {
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR3:#.*]] ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR3:#.*]]
; IS__CGSCC_OPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) [[ATTR4:#.*]] ; IS__CGSCC_OPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) [[ATTR4:#.*]]
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32
; IS__CGSCC_OPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@no_promote ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@no_promote
; IS__CGSCC_NPM-SAME: (<4 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) [[ATTR1:#.*]] { ; IS__CGSCC_NPM-SAME: (<4 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) [[ATTR1:#.*]] {
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR3:#.*]] ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR3:#.*]]
; IS__CGSCC_NPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) [[ATTR4:#.*]] ; IS__CGSCC_NPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) [[ATTR4:#.*]]
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32
; IS__CGSCC_NPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 ; IS__CGSCC_NPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2
▲ Show 20 Lines • Show All 60 Lines • ▼ Show 20 Lines
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <4 x i64>, <4 x i64>* [[TMP]], align 32 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <4 x i64>, <4 x i64>* [[TMP]], align 32
; IS__TUNIT_NPM-NEXT: call fastcc void @promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64> [[TMP0]]) [[ATTR4]] ; IS__TUNIT_NPM-NEXT: call fastcc void @promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64> [[TMP0]]) [[ATTR4]]
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32
; IS__TUNIT_NPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@promote ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@promote
; IS__CGSCC_OPM-SAME: (<4 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) [[ATTR0:#.*]] { ; IS__CGSCC_OPM-SAME: (<4 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) [[ATTR0:#.*]] {
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR3]] ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR3]]
; IS__CGSCC_OPM-NEXT: call fastcc void @promote_avx2(<4 x i64>* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) [[ATTR4]] ; IS__CGSCC_OPM-NEXT: call fastcc void @promote_avx2(<4 x i64>* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) [[ATTR4]]
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32
; IS__CGSCC_OPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@promote ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@promote
; IS__CGSCC_NPM-SAME: (<4 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) [[ATTR0:#.*]] { ; IS__CGSCC_NPM-SAME: (<4 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) [[ATTR0:#.*]] {
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR3]] ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR3]]
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load <4 x i64>, <4 x i64>* [[TMP]], align 32 ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load <4 x i64>, <4 x i64>* [[TMP]], align 32
; IS__CGSCC_NPM-NEXT: call fastcc void @promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64> [[TMP0]]) [[ATTR4]] ; IS__CGSCC_NPM-NEXT: call fastcc void @promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64> [[TMP0]]) [[ATTR4]]
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32
Show All 20 Lines

llvm/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll

Show First 20 Lines • Show All 60 Lines • ▼ Show 20 Lines
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64
; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7:#.*]] ; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7:#.*]]
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer512 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer512
; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR0:#.*]] { ; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR0:#.*]] {
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6:#.*]] ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6:#.*]]
; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7:#.*]] ; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7:#.*]]
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer512 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer512
; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR0:#.*]] { ; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR0:#.*]] {
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6:#.*]] ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6:#.*]]
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64
; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7:#.*]] ; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7:#.*]]
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
▲ Show 20 Lines • Show All 64 Lines • ▼ Show 20 Lines
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64
; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]] ; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]]
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer256 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer256
; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR1:#.*]] { ; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR1:#.*]] {
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]] ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]]
; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]] ; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]]
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer256 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer256
; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR1:#.*]] { ; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR1:#.*]] {
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]] ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]]
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64
; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]] ; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]]
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
▲ Show 20 Lines • Show All 64 Lines • ▼ Show 20 Lines
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64
; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]] ; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]]
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer256 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer256
; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR0]] { ; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR0]] {
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]] ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]]
; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]] ; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]]
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer256 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer256
; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR0]] { ; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR0]] {
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]] ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]]
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64
; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]] ; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]]
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
▲ Show 20 Lines • Show All 64 Lines • ▼ Show 20 Lines
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64
; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]] ; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]]
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer512 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer512
; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR1]] { ; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR1]] {
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]] ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]]
; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]] ; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]]
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer512 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer512
; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR1]] { ; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR1]] {
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]] ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]]
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64
; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]] ; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]]
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]] ; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]]
; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal256_prefer256_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]] ; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal256_prefer256_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]]
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal256_prefer256_call_avx512_legal512_prefer256 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal256_prefer256_call_avx512_legal512_prefer256
; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR2:#.*]] { ; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR2:#.*]] {
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]] ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]]
; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal256_prefer256_call_avx512_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]] ; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal256_prefer256_call_avx512_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]]
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal256_prefer256_call_avx512_legal512_prefer256 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal256_prefer256_call_avx512_legal512_prefer256
; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR2:#.*]] { ; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR2:#.*]] {
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]] ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]]
; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal256_prefer256_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]] ; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal256_prefer256_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]]
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
▲ Show 20 Lines • Show All 60 Lines • ▼ Show 20 Lines
; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]] ; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]]
; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal256_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]] ; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal256_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]]
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal256_prefer256 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal256_prefer256
; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR1]] { ; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR1]] {
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]] ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]]
; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal256_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]] ; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal256_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]]
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal256_prefer256 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal256_prefer256
; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR1]] { ; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR1]] {
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]] ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]]
; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal256_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]] ; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal256_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]]
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
▲ Show 20 Lines • Show All 63 Lines • ▼ Show 20 Lines
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64
; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]] ; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]]
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx2_legal256_prefer256_call_avx2_legal512_prefer256 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx2_legal256_prefer256_call_avx2_legal512_prefer256
; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR4:#.*]] { ; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR4:#.*]] {
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]] ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]]
; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]] ; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]]
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx2_legal256_prefer256_call_avx2_legal512_prefer256 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx2_legal256_prefer256_call_avx2_legal512_prefer256
; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR4:#.*]] { ; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR4:#.*]] {
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]] ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]]
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64
; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]] ; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]]
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
▲ Show 20 Lines • Show All 64 Lines • ▼ Show 20 Lines
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64
; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]] ; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]]
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx2_legal512_prefer256_call_avx2_legal256_prefer256 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx2_legal512_prefer256_call_avx2_legal256_prefer256
; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR3:#.*]] { ; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR3:#.*]] {
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]] ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]]
; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]] ; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) [[ATTR7]]
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx2_legal512_prefer256_call_avx2_legal256_prefer256 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx2_legal512_prefer256_call_avx2_legal256_prefer256
; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nofree nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR3:#.*]] { ; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) [[ATTR3:#.*]] {
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]] ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) [[ATTR6]]
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64
; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]] ; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) [[ATTR7]]
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
Show All 23 Lines

llvm/test/Transforms/Attributor/ArgumentPromotion/attrs.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=4 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=4 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=4 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=4 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
%struct.ss = type { i32, i64 } %struct.ss = type { i32, i64 }
; Don't drop 'byval' on %X here. ; Don't drop 'byval' on %X here.
define internal i32 @f(%struct.ss* byval(%struct.ss) %b, i32* byval(i32) %X, i32 %i) nounwind { define internal i32 @f(%struct.ss* byval(%struct.ss) %b, i32* byval(i32) %X, i32 %i) nounwind {
; ;
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@f ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@f
; IS__TUNIT_OPM-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull byval(%struct.ss) align 8 dereferenceable(12) [[B:%.*]], i32* noalias nocapture nofree nonnull byval(i32) align 4 dereferenceable(4) [[X:%.*]], i32 noundef [[I:%.*]]) [[ATTR0:#.*]] { ; IS__TUNIT_OPM-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull byval(%struct.ss) align 8 dereferenceable(12) [[B:%.*]], i32* noalias nocapture nofree noundef nonnull byval(i32) align 4 dereferenceable(4) [[X:%.*]], i32 noundef [[I:%.*]]) [[ATTR0:#.*]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS:%.*]], %struct.ss* [[B]], i32 0, i32 0 ; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS:%.*]], %struct.ss* [[B]], i32 0, i32 0
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8 ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1 ; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1
; IS__TUNIT_OPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8 ; IS__TUNIT_OPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8
; IS__TUNIT_OPM-NEXT: store i32 0, i32* [[X]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 0, i32* [[X]], align 4
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* [[X]], align 4 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* [[X]], align 4
; IS__TUNIT_OPM-NEXT: [[A:%.*]] = add i32 [[L]], [[TMP2]] ; IS__TUNIT_OPM-NEXT: [[A:%.*]] = add i32 [[L]], [[TMP2]]
Show All 16 Lines
; IS__TUNIT_NPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8
; IS__TUNIT_NPM-NEXT: store i32 0, i32* [[X_PRIV]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 0, i32* [[X_PRIV]], align 4
; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i32, i32* [[X_PRIV]], align 4 ; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i32, i32* [[X_PRIV]], align 4
; IS__TUNIT_NPM-NEXT: [[A:%.*]] = add i32 [[L]], [[TMP2]] ; IS__TUNIT_NPM-NEXT: [[A:%.*]] = add i32 [[L]], [[TMP2]]
; IS__TUNIT_NPM-NEXT: ret i32 [[A]] ; IS__TUNIT_NPM-NEXT: ret i32 [[A]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f
; IS__CGSCC_OPM-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull byval(%struct.ss) align 8 dereferenceable(12) [[B:%.*]], i32* noalias nocapture nofree nonnull byval(i32) align 4 dereferenceable(4) [[X:%.*]]) [[ATTR0:#.*]] { ; IS__CGSCC_OPM-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull byval(%struct.ss) align 8 dereferenceable(12) [[B:%.*]], i32* noalias nocapture nofree noundef nonnull byval(i32) align 4 dereferenceable(4) [[X:%.*]]) [[ATTR0:#.*]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS:%.*]], %struct.ss* [[B]], i32 0, i32 0 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS:%.*]], %struct.ss* [[B]], i32 0, i32 0
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8 ; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1
; IS__CGSCC_OPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8 ; IS__CGSCC_OPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8
; IS__CGSCC_OPM-NEXT: store i32 0, i32* [[X]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 0, i32* [[X]], align 4
; IS__CGSCC_OPM-NEXT: [[L:%.*]] = load i32, i32* [[X]], align 4 ; IS__CGSCC_OPM-NEXT: [[L:%.*]] = load i32, i32* [[X]], align 4
; IS__CGSCC_OPM-NEXT: [[A:%.*]] = add i32 [[L]], [[TMP2]] ; IS__CGSCC_OPM-NEXT: [[A:%.*]] = add i32 [[L]], [[TMP2]]
▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
; IS__TUNIT_NPM-NEXT: [[S_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[S_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i64, i64* [[S_0_1]], align 8 ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i64, i64* [[S_0_1]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[X]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[X]], align 4
; IS__TUNIT_NPM-NEXT: [[C:%.*]] = call i32 @f(i32 [[TMP0]], i64 [[TMP1]], i32 [[TMP2]], i32 noundef zeroext 0) [[ATTR0]] ; IS__TUNIT_NPM-NEXT: [[C:%.*]] = call i32 @f(i32 [[TMP0]], i64 [[TMP1]], i32 [[TMP2]], i32 noundef zeroext 0) [[ATTR0]]
; IS__TUNIT_NPM-NEXT: ret i32 [[C]] ; IS__TUNIT_NPM-NEXT: ret i32 [[C]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(4) [[X:%.*]]) [[ATTR0]] { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree noundef nonnull readnone align 4 dereferenceable(4) [[X:%.*]]) [[ATTR0]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 ; IS__CGSCC_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0 ; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[TMP1]], align 8 ; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__CGSCC_OPM-NEXT: store i64 2, i64* [[TMP4]], align 4 ; IS__CGSCC_OPM-NEXT: store i64 2, i64* [[TMP4]], align 4
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = call i32 @f(%struct.ss* noalias nocapture nofree noundef nonnull readnone byval(%struct.ss) align 8 dereferenceable(12) [[S]], i32* noalias nocapture nofree nonnull readnone byval(i32) align 4 dereferenceable(4) [[X]]) [[ATTR1:#.*]] ; IS__CGSCC_OPM-NEXT: [[C:%.*]] = call i32 @f(%struct.ss* noalias nocapture nofree noundef nonnull readnone byval(%struct.ss) align 8 dereferenceable(12) [[S]], i32* noalias nocapture nofree noundef nonnull readnone byval(i32) align 4 dereferenceable(4) [[X]]) [[ATTR1:#.*]]
; IS__CGSCC_OPM-NEXT: ret i32 [[C]] ; IS__CGSCC_OPM-NEXT: ret i32 [[C]]
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[X:%.*]]) [[ATTR1:#.*]] { ; IS__CGSCC_NPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[X:%.*]]) [[ATTR1:#.*]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 ; IS__CGSCC_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0 ; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__CGSCC_NPM-NEXT: store i32 1, i32* [[TMP1]], align 8 ; IS__CGSCC_NPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__CGSCC_NPM-NEXT: store i64 2, i64* [[TMP4]], align 4 ; IS__CGSCC_NPM-NEXT: store i64 2, i64* [[TMP4]], align 4
; IS__CGSCC_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.ss* [[S]] to i32* ; IS__CGSCC_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.ss* [[S]] to i32*
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[S_CAST]], align 8 ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[S_CAST]], align 8
Show All 17 Lines

llvm/test/Transforms/Attributor/ArgumentPromotion/byval-2.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
%struct.ss = type { i32, i64 } %struct.ss = type { i32, i64 }
define internal void @f(%struct.ss* byval(%struct.ss) %b, i32* byval(i32) %X) nounwind { define internal void @f(%struct.ss* byval(%struct.ss) %b, i32* byval(i32) %X) nounwind {
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f
; IS__CGSCC_OPM-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull byval(%struct.ss) align 8 dereferenceable(12) [[B:%.*]], i32* noalias nocapture nofree nonnull writeonly byval(i32) align 4 dereferenceable(4) [[X:%.*]]) [[ATTR0:#.*]] { ; IS__CGSCC_OPM-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull byval(%struct.ss) align 8 dereferenceable(12) [[B:%.*]], i32* noalias nocapture nofree noundef nonnull writeonly byval(i32) align 4 dereferenceable(4) [[X:%.*]]) [[ATTR0:#.*]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS:%.*]], %struct.ss* [[B]], i32 0, i32 0 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS:%.*]], %struct.ss* [[B]], i32 0, i32 0
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8 ; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1
; IS__CGSCC_OPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8 ; IS__CGSCC_OPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8
; IS__CGSCC_OPM-NEXT: store i32 0, i32* [[X]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 0, i32* [[X]], align 4
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
Show All 35 Lines
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0 ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__TUNIT____-NEXT: store i32 1, i32* [[TMP1]], align 8 ; IS__TUNIT____-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__TUNIT____-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1 ; IS__TUNIT____-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT____-NEXT: store i64 2, i64* [[TMP4]], align 4 ; IS__TUNIT____-NEXT: store i64 2, i64* [[TMP4]], align 4
; IS__TUNIT____-NEXT: ret i32 0 ; IS__TUNIT____-NEXT: ret i32 0
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(4) [[X:%.*]]) [[ATTR0]] { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree noundef nonnull readnone align 4 dereferenceable(4) [[X:%.*]]) [[ATTR0]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 ; IS__CGSCC_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0 ; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[TMP1]], align 8 ; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__CGSCC_OPM-NEXT: store i64 2, i64* [[TMP4]], align 4 ; IS__CGSCC_OPM-NEXT: store i64 2, i64* [[TMP4]], align 4
; IS__CGSCC_OPM-NEXT: ret i32 0 ; IS__CGSCC_OPM-NEXT: ret i32 0
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[X:%.*]]) [[ATTR1:#.*]] { ; IS__CGSCC_NPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[X:%.*]]) [[ATTR1:#.*]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 ; IS__CGSCC_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0 ; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__CGSCC_NPM-NEXT: store i32 1, i32* [[TMP1]], align 8 ; IS__CGSCC_NPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__CGSCC_NPM-NEXT: store i64 2, i64* [[TMP4]], align 4 ; IS__CGSCC_NPM-NEXT: store i64 2, i64* [[TMP4]], align 4
; IS__CGSCC_NPM-NEXT: ret i32 0 ; IS__CGSCC_NPM-NEXT: ret i32 0
; ;
Show All 9 Lines

llvm/test/Transforms/Attributor/ArgumentPromotion/dbg.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
declare void @sink(i32) declare void @sink(i32)
define internal void @test(i32** %X) !dbg !2 { define internal void @test(i32** %X) !dbg !2 {
; CHECK-LABEL: define {{[^@]+}}@test ; CHECK-LABEL: define {{[^@]+}}@test
; CHECK-SAME: (i32** nocapture nonnull readonly align 8 dereferenceable(8) [[X:%.*]]) [[DBG3:!dbg !.*]] { ; CHECK-SAME: (i32** nocapture noundef nonnull readonly align 8 dereferenceable(8) [[X:%.*]]) [[DBG3:!dbg !.*]] {
; CHECK-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X]], align 8 ; CHECK-NEXT: [[TMP1:%.*]] = load i32*, i32** [[X]], align 8
; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8
; CHECK-NEXT: call void @sink(i32 [[TMP2]]) ; CHECK-NEXT: call void @sink(i32 [[TMP2]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%1 = load i32*, i32** %X, align 8 %1 = load i32*, i32** %X, align 8
%2 = load i32, i32* %1, align 8 %2 = load i32, i32* %1, align 8
call void @sink(i32 %2) call void @sink(i32 %2)
Show All 14 Lines
define void @caller(i32** %Y, %struct.pair* %P) { define void @caller(i32** %Y, %struct.pair* %P) {
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller ; IS__TUNIT____-LABEL: define {{[^@]+}}@caller
; IS__TUNIT____-SAME: (i32** nocapture readonly [[Y:%.*]], %struct.pair* nocapture nofree readnone [[P:%.*]]) { ; IS__TUNIT____-SAME: (i32** nocapture readonly [[Y:%.*]], %struct.pair* nocapture nofree readnone [[P:%.*]]) {
; IS__TUNIT____-NEXT: call void @test(i32** nocapture readonly align 8 [[Y]]), [[DBG4:!dbg !.*]] ; IS__TUNIT____-NEXT: call void @test(i32** nocapture readonly align 8 [[Y]]), [[DBG4:!dbg !.*]]
; IS__TUNIT____-NEXT: call void @test_byval(), [[DBG5:!dbg !.*]] ; IS__TUNIT____-NEXT: call void @test_byval(), [[DBG5:!dbg !.*]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller ; IS__CGSCC____-LABEL: define {{[^@]+}}@caller
; IS__CGSCC____-SAME: (i32** nocapture nonnull readonly align 8 dereferenceable(8) [[Y:%.*]], %struct.pair* nocapture nofree readnone [[P:%.*]]) { ; IS__CGSCC____-SAME: (i32** nocapture noundef nonnull readonly align 8 dereferenceable(8) [[Y:%.*]], %struct.pair* nocapture nofree readnone [[P:%.*]]) {
; IS__CGSCC____-NEXT: call void @test(i32** nocapture nonnull readonly align 8 dereferenceable(8) [[Y]]), [[DBG4:!dbg !.*]] ; IS__CGSCC____-NEXT: call void @test(i32** nocapture noundef nonnull readonly align 8 dereferenceable(8) [[Y]]), [[DBG4:!dbg !.*]]
; IS__CGSCC____-NEXT: call void @test_byval(), [[DBG5:!dbg !.*]] ; IS__CGSCC____-NEXT: call void @test_byval(), [[DBG5:!dbg !.*]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @test(i32** %Y), !dbg !1 call void @test(i32** %Y), !dbg !1
call void @test_byval(%struct.pair* %P), !dbg !6 call void @test_byval(%struct.pair* %P), !dbg !6
ret void ret void
} }
Show All 11 Lines

llvm/test/Transforms/Attributor/ArgumentPromotion/tail.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; PR14710 ; PR14710
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
%pair = type { i32, i32 } %pair = type { i32, i32 }
declare i8* @foo(%pair*) declare i8* @foo(%pair*)
define internal void @bar(%pair* byval(%pair) %Data) { define internal void @bar(%pair* byval(%pair) %Data) {
; IS________OPM-LABEL: define {{[^@]+}}@bar ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@bar
; IS________OPM-SAME: (%pair* noalias nonnull byval(%pair) dereferenceable(8) [[DATA:%.*]]) { ; IS__TUNIT_OPM-SAME: (%pair* noalias nonnull byval(%pair) dereferenceable(8) [[DATA:%.*]]) {
; IS________OPM-NEXT: [[TMP1:%.*]] = tail call i8* @foo(%pair* nonnull dereferenceable(8) [[DATA]]) ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = tail call i8* @foo(%pair* nonnull dereferenceable(8) [[DATA]])
; IS________OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@bar ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@bar
; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]], i32 [[TMP1:%.*]]) { ; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]], i32 [[TMP1:%.*]]) {
; IS__TUNIT_NPM-NEXT: [[DATA_PRIV:%.*]] = alloca [[PAIR:%.*]], align 8 ; IS__TUNIT_NPM-NEXT: [[DATA_PRIV:%.*]] = alloca [[PAIR:%.*]], align 8
; IS__TUNIT_NPM-NEXT: [[DATA_PRIV_CAST:%.*]] = bitcast %pair* [[DATA_PRIV]] to i32* ; IS__TUNIT_NPM-NEXT: [[DATA_PRIV_CAST:%.*]] = bitcast %pair* [[DATA_PRIV]] to i32*
; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[DATA_PRIV_CAST]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[DATA_PRIV_CAST]], align 4
; IS__TUNIT_NPM-NEXT: [[DATA_PRIV_0_1:%.*]] = getelementptr [[PAIR]], %pair* [[DATA_PRIV]], i32 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[DATA_PRIV_0_1:%.*]] = getelementptr [[PAIR]], %pair* [[DATA_PRIV]], i32 0, i32 1
; IS__TUNIT_NPM-NEXT: store i32 [[TMP1]], i32* [[DATA_PRIV_0_1]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP1]], i32* [[DATA_PRIV_0_1]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = call i8* @foo(%pair* nonnull dereferenceable(8) [[DATA_PRIV]]) ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = call i8* @foo(%pair* nonnull dereferenceable(8) [[DATA_PRIV]])
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@bar
; IS__CGSCC_OPM-SAME: (%pair* noalias noundef nonnull byval(%pair) dereferenceable(8) [[DATA:%.*]]) {
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = tail call i8* @foo(%pair* noundef nonnull dereferenceable(8) [[DATA]])
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@bar ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@bar
; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]], i32 [[TMP1:%.*]]) { ; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]], i32 [[TMP1:%.*]]) {
; IS__CGSCC_NPM-NEXT: [[DATA_PRIV:%.*]] = alloca [[PAIR:%.*]], align 8 ; IS__CGSCC_NPM-NEXT: [[DATA_PRIV:%.*]] = alloca [[PAIR:%.*]], align 8
; IS__CGSCC_NPM-NEXT: [[DATA_PRIV_CAST:%.*]] = bitcast %pair* [[DATA_PRIV]] to i32* ; IS__CGSCC_NPM-NEXT: [[DATA_PRIV_CAST:%.*]] = bitcast %pair* [[DATA_PRIV]] to i32*
; IS__CGSCC_NPM-NEXT: store i32 [[TMP0]], i32* [[DATA_PRIV_CAST]], align 8 ; IS__CGSCC_NPM-NEXT: store i32 [[TMP0]], i32* [[DATA_PRIV_CAST]], align 8
; IS__CGSCC_NPM-NEXT: [[DATA_PRIV_0_1:%.*]] = getelementptr [[PAIR]], %pair* [[DATA_PRIV]], i32 0, i32 1 ; IS__CGSCC_NPM-NEXT: [[DATA_PRIV_0_1:%.*]] = getelementptr [[PAIR]], %pair* [[DATA_PRIV]], i32 0, i32 1
; IS__CGSCC_NPM-NEXT: store i32 [[TMP1]], i32* [[DATA_PRIV_0_1]], align 4 ; IS__CGSCC_NPM-NEXT: store i32 [[TMP1]], i32* [[DATA_PRIV_0_1]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = call i8* @foo(%pair* noundef nonnull align 8 dereferenceable(8) [[DATA_PRIV]]) ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = call i8* @foo(%pair* noundef nonnull align 8 dereferenceable(8) [[DATA_PRIV]])
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
tail call i8* @foo(%pair* %Data) tail call i8* @foo(%pair* %Data)
ret void ret void
} }
define void @zed(%pair* byval(%pair) %Data) { define void @zed(%pair* byval(%pair) %Data) {
; IS________OPM-LABEL: define {{[^@]+}}@zed ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@zed
; IS________OPM-SAME: (%pair* noalias nocapture nonnull readonly byval(%pair) dereferenceable(8) [[DATA:%.*]]) { ; IS__TUNIT_OPM-SAME: (%pair* noalias nocapture nonnull readonly byval(%pair) dereferenceable(8) [[DATA:%.*]]) {
; IS________OPM-NEXT: call void @bar(%pair* noalias nocapture nonnull readonly byval(%pair) dereferenceable(8) [[DATA]]) ; IS__TUNIT_OPM-NEXT: call void @bar(%pair* noalias nocapture nonnull readonly byval(%pair) dereferenceable(8) [[DATA]])
; IS________OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS________NPM-LABEL: define {{[^@]+}}@zed ; IS________NPM-LABEL: define {{[^@]+}}@zed
; IS________NPM-SAME: (%pair* noalias nocapture nonnull readonly byval(%pair) dereferenceable(8) [[DATA:%.*]]) { ; IS________NPM-SAME: (%pair* noalias nocapture nonnull readonly byval(%pair) dereferenceable(8) [[DATA:%.*]]) {
; IS________NPM-NEXT: [[DATA_CAST:%.*]] = bitcast %pair* [[DATA]] to i32* ; IS________NPM-NEXT: [[DATA_CAST:%.*]] = bitcast %pair* [[DATA]] to i32*
; IS________NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[DATA_CAST]], align 1 ; IS________NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[DATA_CAST]], align 1
; IS________NPM-NEXT: [[DATA_0_1:%.*]] = getelementptr [[PAIR:%.*]], %pair* [[DATA]], i32 0, i32 1 ; IS________NPM-NEXT: [[DATA_0_1:%.*]] = getelementptr [[PAIR:%.*]], %pair* [[DATA]], i32 0, i32 1
; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[DATA_0_1]], align 1 ; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[DATA_0_1]], align 1
; IS________NPM-NEXT: call void @bar(i32 [[TMP1]], i32 [[TMP2]]) ; IS________NPM-NEXT: call void @bar(i32 [[TMP1]], i32 [[TMP2]])
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@zed
; IS__CGSCC_OPM-SAME: (%pair* noalias nocapture noundef nonnull readonly byval(%pair) dereferenceable(8) [[DATA:%.*]]) {
; IS__CGSCC_OPM-NEXT: call void @bar(%pair* noalias nocapture noundef nonnull readonly byval(%pair) dereferenceable(8) [[DATA]])
; IS__CGSCC_OPM-NEXT: ret void
;
call void @bar(%pair* byval(%pair) %Data) call void @bar(%pair* byval(%pair) %Data)
ret void ret void
} }

llvm/test/Transforms/Attributor/align.ll

Show First 20 Lines • Show All 401 Lines • ▼ Show 20 Lines
; define align 32 i32* @test10a(i32* align 32 "no-capture-maybe-returned" %p) ; define align 32 i32* @test10a(i32* align 32 "no-capture-maybe-returned" %p)
; FIXME: This will work with an upcoming patch (D66618 or similar) ; FIXME: This will work with an upcoming patch (D66618 or similar)
; store i32 1, i32* %r, align 32 ; store i32 1, i32* %r, align 32
; FIXME: This will work with an upcoming patch (D66618 or similar) ; FIXME: This will work with an upcoming patch (D66618 or similar)
; store i32 -1, i32* %g1, align 32 ; store i32 -1, i32* %g1, align 32
define i32* @test10a(i32* align 32 %p) { define i32* @test10a(i32* align 32 %p) {
; NOT_CGSCC_OPM: Function Attrs: nofree nosync nounwind ; NOT_CGSCC_OPM: Function Attrs: nofree nosync nounwind
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@test10a ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@test10a
; NOT_CGSCC_OPM-SAME: (i32* nofree nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) [[ATTR3:#.*]] { ; NOT_CGSCC_OPM-SAME: (i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) [[ATTR3:#.*]] {
; NOT_CGSCC_OPM-NEXT: [[L:%.*]] = load i32, i32* [[P]], align 32 ; NOT_CGSCC_OPM-NEXT: [[L:%.*]] = load i32, i32* [[P]], align 32
; NOT_CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0 ; NOT_CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0
; NOT_CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; NOT_CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; NOT_CGSCC_OPM: t: ; NOT_CGSCC_OPM: t:
; NOT_CGSCC_OPM-NEXT: [[R:%.*]] = call align 32 i32* @test10a(i32* nofree nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P]]) [[ATTR3]] ; NOT_CGSCC_OPM-NEXT: [[R:%.*]] = call align 32 i32* @test10a(i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P]]) [[ATTR3]]
; NOT_CGSCC_OPM-NEXT: store i32 1, i32* [[R]], align 32 ; NOT_CGSCC_OPM-NEXT: store i32 1, i32* [[R]], align 32
; NOT_CGSCC_OPM-NEXT: [[G0:%.*]] = getelementptr i32, i32* [[P]], i32 8 ; NOT_CGSCC_OPM-NEXT: [[G0:%.*]] = getelementptr i32, i32* [[P]], i32 8
; NOT_CGSCC_OPM-NEXT: br label [[E:%.*]] ; NOT_CGSCC_OPM-NEXT: br label [[E:%.*]]
; NOT_CGSCC_OPM: f: ; NOT_CGSCC_OPM: f:
; NOT_CGSCC_OPM-NEXT: [[G1:%.*]] = getelementptr i32, i32* [[P]], i32 8 ; NOT_CGSCC_OPM-NEXT: [[G1:%.*]] = getelementptr i32, i32* [[P]], i32 8
; NOT_CGSCC_OPM-NEXT: store i32 -1, i32* [[G1]], align 32 ; NOT_CGSCC_OPM-NEXT: store i32 -1, i32* [[G1]], align 32
; NOT_CGSCC_OPM-NEXT: br label [[E]] ; NOT_CGSCC_OPM-NEXT: br label [[E]]
; NOT_CGSCC_OPM: e: ; NOT_CGSCC_OPM: e:
; NOT_CGSCC_OPM-NEXT: [[PHI:%.*]] = phi i32* [ [[G0]], [[T]] ], [ [[G1]], [[F]] ] ; NOT_CGSCC_OPM-NEXT: [[PHI:%.*]] = phi i32* [ [[G0]], [[T]] ], [ [[G1]], [[F]] ]
; NOT_CGSCC_OPM-NEXT: ret i32* [[PHI]] ; NOT_CGSCC_OPM-NEXT: ret i32* [[PHI]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind ; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test10a ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test10a
; IS__CGSCC_OPM-SAME: (i32* nofree nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) [[ATTR4:#.*]] { ; IS__CGSCC_OPM-SAME: (i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) [[ATTR4:#.*]] {
; IS__CGSCC_OPM-NEXT: [[L:%.*]] = load i32, i32* [[P]], align 32 ; IS__CGSCC_OPM-NEXT: [[L:%.*]] = load i32, i32* [[P]], align 32
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0 ; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_OPM: t: ; IS__CGSCC_OPM: t:
; IS__CGSCC_OPM-NEXT: [[R:%.*]] = call align 32 i32* @test10a(i32* nofree nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P]]) [[ATTR4]] ; IS__CGSCC_OPM-NEXT: [[R:%.*]] = call align 32 i32* @test10a(i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P]]) [[ATTR4]]
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[R]], align 32 ; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[R]], align 32
; IS__CGSCC_OPM-NEXT: [[G0:%.*]] = getelementptr i32, i32* [[P]], i32 8 ; IS__CGSCC_OPM-NEXT: [[G0:%.*]] = getelementptr i32, i32* [[P]], i32 8
; IS__CGSCC_OPM-NEXT: br label [[E:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[E:%.*]]
; IS__CGSCC_OPM: f: ; IS__CGSCC_OPM: f:
; IS__CGSCC_OPM-NEXT: [[G1:%.*]] = getelementptr i32, i32* [[P]], i32 8 ; IS__CGSCC_OPM-NEXT: [[G1:%.*]] = getelementptr i32, i32* [[P]], i32 8
; IS__CGSCC_OPM-NEXT: store i32 -1, i32* [[G1]], align 32 ; IS__CGSCC_OPM-NEXT: store i32 -1, i32* [[G1]], align 32
; IS__CGSCC_OPM-NEXT: br label [[E]] ; IS__CGSCC_OPM-NEXT: br label [[E]]
; IS__CGSCC_OPM: e: ; IS__CGSCC_OPM: e:
Show All 21 Lines
; define align 32 i32* @test10b(i32* align 32 "no-capture-maybe-returned" %p) ; define align 32 i32* @test10b(i32* align 32 "no-capture-maybe-returned" %p)
; FIXME: This will work with an upcoming patch (D66618 or similar) ; FIXME: This will work with an upcoming patch (D66618 or similar)
; store i32 1, i32* %r, align 32 ; store i32 1, i32* %r, align 32
; FIXME: This will work with an upcoming patch (D66618 or similar) ; FIXME: This will work with an upcoming patch (D66618 or similar)
; store i32 -1, i32* %g1, align 32 ; store i32 -1, i32* %g1, align 32
define i32* @test10b(i32* align 32 %p) { define i32* @test10b(i32* align 32 %p) {
; NOT_CGSCC_OPM: Function Attrs: nofree nosync nounwind ; NOT_CGSCC_OPM: Function Attrs: nofree nosync nounwind
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@test10b ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@test10b
; NOT_CGSCC_OPM-SAME: (i32* nofree nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) [[ATTR3]] { ; NOT_CGSCC_OPM-SAME: (i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) [[ATTR3]] {
; NOT_CGSCC_OPM-NEXT: [[L:%.*]] = load i32, i32* [[P]], align 32 ; NOT_CGSCC_OPM-NEXT: [[L:%.*]] = load i32, i32* [[P]], align 32
; NOT_CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0 ; NOT_CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0
; NOT_CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; NOT_CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; NOT_CGSCC_OPM: t: ; NOT_CGSCC_OPM: t:
; NOT_CGSCC_OPM-NEXT: [[R:%.*]] = call align 32 i32* @test10b(i32* nofree nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P]]) [[ATTR3]] ; NOT_CGSCC_OPM-NEXT: [[R:%.*]] = call align 32 i32* @test10b(i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P]]) [[ATTR3]]
; NOT_CGSCC_OPM-NEXT: store i32 1, i32* [[R]], align 32 ; NOT_CGSCC_OPM-NEXT: store i32 1, i32* [[R]], align 32
; NOT_CGSCC_OPM-NEXT: [[G0:%.*]] = getelementptr i32, i32* [[P]], i32 8 ; NOT_CGSCC_OPM-NEXT: [[G0:%.*]] = getelementptr i32, i32* [[P]], i32 8
; NOT_CGSCC_OPM-NEXT: br label [[E:%.*]] ; NOT_CGSCC_OPM-NEXT: br label [[E:%.*]]
; NOT_CGSCC_OPM: f: ; NOT_CGSCC_OPM: f:
; NOT_CGSCC_OPM-NEXT: [[G1:%.*]] = getelementptr i32, i32* [[P]], i32 -8 ; NOT_CGSCC_OPM-NEXT: [[G1:%.*]] = getelementptr i32, i32* [[P]], i32 -8
; NOT_CGSCC_OPM-NEXT: store i32 -1, i32* [[G1]], align 32 ; NOT_CGSCC_OPM-NEXT: store i32 -1, i32* [[G1]], align 32
; NOT_CGSCC_OPM-NEXT: br label [[E]] ; NOT_CGSCC_OPM-NEXT: br label [[E]]
; NOT_CGSCC_OPM: e: ; NOT_CGSCC_OPM: e:
; NOT_CGSCC_OPM-NEXT: [[PHI:%.*]] = phi i32* [ [[G0]], [[T]] ], [ [[G1]], [[F]] ] ; NOT_CGSCC_OPM-NEXT: [[PHI:%.*]] = phi i32* [ [[G0]], [[T]] ], [ [[G1]], [[F]] ]
; NOT_CGSCC_OPM-NEXT: ret i32* [[PHI]] ; NOT_CGSCC_OPM-NEXT: ret i32* [[PHI]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind ; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test10b ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test10b
; IS__CGSCC_OPM-SAME: (i32* nofree nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) [[ATTR4]] { ; IS__CGSCC_OPM-SAME: (i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) [[ATTR4]] {
; IS__CGSCC_OPM-NEXT: [[L:%.*]] = load i32, i32* [[P]], align 32 ; IS__CGSCC_OPM-NEXT: [[L:%.*]] = load i32, i32* [[P]], align 32
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0 ; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_OPM: t: ; IS__CGSCC_OPM: t:
; IS__CGSCC_OPM-NEXT: [[R:%.*]] = call align 32 i32* @test10b(i32* nofree nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P]]) [[ATTR4]] ; IS__CGSCC_OPM-NEXT: [[R:%.*]] = call align 32 i32* @test10b(i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P]]) [[ATTR4]]
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[R]], align 32 ; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[R]], align 32
; IS__CGSCC_OPM-NEXT: [[G0:%.*]] = getelementptr i32, i32* [[P]], i32 8 ; IS__CGSCC_OPM-NEXT: [[G0:%.*]] = getelementptr i32, i32* [[P]], i32 8
; IS__CGSCC_OPM-NEXT: br label [[E:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[E:%.*]]
; IS__CGSCC_OPM: f: ; IS__CGSCC_OPM: f:
; IS__CGSCC_OPM-NEXT: [[G1:%.*]] = getelementptr i32, i32* [[P]], i32 -8 ; IS__CGSCC_OPM-NEXT: [[G1:%.*]] = getelementptr i32, i32* [[P]], i32 -8
; IS__CGSCC_OPM-NEXT: store i32 -1, i32* [[G1]], align 32 ; IS__CGSCC_OPM-NEXT: store i32 -1, i32* [[G1]], align 32
; IS__CGSCC_OPM-NEXT: br label [[E]] ; IS__CGSCC_OPM-NEXT: br label [[E]]
; IS__CGSCC_OPM: e: ; IS__CGSCC_OPM: e:
▲ Show 20 Lines • Show All 377 Lines • ▼ Show 20 Lines;
%i2p = inttoptr i64 %i to i64* %i2p = inttoptr i64 %i to i64*
ret i64* %i2p ret i64* %i2p
} }
; Use the store alignment only for the pointer operand. ; Use the store alignment only for the pointer operand.
define void @aligned_store(i8* %Value, i8** %Ptr) { define void @aligned_store(i8* %Value, i8** %Ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@aligned_store ; IS__TUNIT____-LABEL: define {{[^@]+}}@aligned_store
; IS__TUNIT____-SAME: (i8* nofree writeonly [[VALUE:%.*]], i8** nocapture nofree nonnull writeonly align 32 dereferenceable(8) [[PTR:%.*]]) [[ATTR5]] { ; IS__TUNIT____-SAME: (i8* nofree writeonly [[VALUE:%.*]], i8** nocapture nofree noundef nonnull writeonly align 32 dereferenceable(8) [[PTR:%.*]]) [[ATTR5]] {
; IS__TUNIT____-NEXT: store i8* [[VALUE]], i8** [[PTR]], align 32 ; IS__TUNIT____-NEXT: store i8* [[VALUE]], i8** [[PTR]], align 32
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@aligned_store ; IS__CGSCC____-LABEL: define {{[^@]+}}@aligned_store
; IS__CGSCC____-SAME: (i8* nofree writeonly [[VALUE:%.*]], i8** nocapture nofree nonnull writeonly align 32 dereferenceable(8) [[PTR:%.*]]) [[ATTR5]] { ; IS__CGSCC____-SAME: (i8* nofree writeonly [[VALUE:%.*]], i8** nocapture nofree noundef nonnull writeonly align 32 dereferenceable(8) [[PTR:%.*]]) [[ATTR5]] {
; IS__CGSCC____-NEXT: store i8* [[VALUE]], i8** [[PTR]], align 32 ; IS__CGSCC____-NEXT: store i8* [[VALUE]], i8** [[PTR]], align 32
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
store i8* %Value, i8** %Ptr, align 32 store i8* %Value, i8** %Ptr, align 32
ret void ret void
} }
declare i8* @some_func(i8*) declare i8* @some_func(i8*)
Show All 30 Lines
} }
; Make sure we do not annotate the callee of a must-tail call with an alignment ; Make sure we do not annotate the callee of a must-tail call with an alignment
; we cannot also put on the caller. ; we cannot also put on the caller.
@cnd = external global i1 @cnd = external global i1
define i32 @musttail_callee_1(i32* %p) { define i32 @musttail_callee_1(i32* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@musttail_callee_1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@musttail_callee_1
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readonly dereferenceable(4) [[P:%.*]]) [[ATTR4]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly dereferenceable(4) [[P:%.*]]) [[ATTR4]] {
; IS__TUNIT____-NEXT: [[V:%.*]] = load i32, i32* [[P]], align 32 ; IS__TUNIT____-NEXT: [[V:%.*]] = load i32, i32* [[P]], align 32
; IS__TUNIT____-NEXT: ret i32 [[V]] ; IS__TUNIT____-NEXT: ret i32 [[V]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@musttail_callee_1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@musttail_callee_1
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readonly dereferenceable(4) [[P:%.*]]) [[ATTR4]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly dereferenceable(4) [[P:%.*]]) [[ATTR4]] {
; IS__CGSCC____-NEXT: [[V:%.*]] = load i32, i32* [[P]], align 32 ; IS__CGSCC____-NEXT: [[V:%.*]] = load i32, i32* [[P]], align 32
; IS__CGSCC____-NEXT: ret i32 [[V]] ; IS__CGSCC____-NEXT: ret i32 [[V]]
; ;
%v = load i32, i32* %p, align 32 %v = load i32, i32* %p, align 32
ret i32 %v ret i32 %v
} }
define i32 @musttail_caller_1(i32* %p) { define i32 @musttail_caller_1(i32* %p) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@musttail_caller_1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@musttail_caller_1
; IS__TUNIT____-SAME: (i32* nocapture nofree readonly [[P:%.*]]) [[ATTR10:#.*]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree readonly [[P:%.*]]) [[ATTR10:#.*]] {
; IS__TUNIT____-NEXT: [[C:%.*]] = load i1, i1* @cnd, align 1 ; IS__TUNIT____-NEXT: [[C:%.*]] = load i1, i1* @cnd, align 1
; IS__TUNIT____-NEXT: br i1 [[C]], label [[MT:%.*]], label [[EXIT:%.*]] ; IS__TUNIT____-NEXT: br i1 [[C]], label [[MT:%.*]], label [[EXIT:%.*]]
; IS__TUNIT____: mt: ; IS__TUNIT____: mt:
; IS__TUNIT____-NEXT: [[V:%.*]] = musttail call i32 @musttail_callee_1(i32* nocapture nofree readonly [[P]]) [[ATTR10]] ; IS__TUNIT____-NEXT: [[V:%.*]] = musttail call i32 @musttail_callee_1(i32* nocapture nofree readonly [[P]]) [[ATTR10]]
; IS__TUNIT____-NEXT: ret i32 [[V]] ; IS__TUNIT____-NEXT: ret i32 [[V]]
; IS__TUNIT____: exit: ; IS__TUNIT____: exit:
; IS__TUNIT____-NEXT: ret i32 0 ; IS__TUNIT____-NEXT: ret i32 0
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@musttail_caller_1 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@musttail_caller_1
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree readonly [[P:%.*]]) [[ATTR11:#.*]] { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree readonly [[P:%.*]]) [[ATTR11:#.*]] {
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = load i1, i1* @cnd, align 1 ; IS__CGSCC_OPM-NEXT: [[C:%.*]] = load i1, i1* @cnd, align 1
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[MT:%.*]], label [[EXIT:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[MT:%.*]], label [[EXIT:%.*]]
; IS__CGSCC_OPM: mt: ; IS__CGSCC_OPM: mt:
; IS__CGSCC_OPM-NEXT: [[V:%.*]] = musttail call i32 @musttail_callee_1(i32* nocapture nofree nonnull readonly dereferenceable(4) [[P]]) [[ATTR13:#.*]] ; IS__CGSCC_OPM-NEXT: [[V:%.*]] = musttail call i32 @musttail_callee_1(i32* nocapture nofree noundef nonnull readonly dereferenceable(4) [[P]]) [[ATTR13:#.*]]
; IS__CGSCC_OPM-NEXT: ret i32 [[V]] ; IS__CGSCC_OPM-NEXT: ret i32 [[V]]
; IS__CGSCC_OPM: exit: ; IS__CGSCC_OPM: exit:
; IS__CGSCC_OPM-NEXT: ret i32 0 ; IS__CGSCC_OPM-NEXT: ret i32 0
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@musttail_caller_1 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@musttail_caller_1
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree readonly [[P:%.*]]) [[ATTR10:#.*]] { ; IS__CGSCC_NPM-SAME: (i32* nocapture nofree readonly [[P:%.*]]) [[ATTR10:#.*]] {
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = load i1, i1* @cnd, align 1 ; IS__CGSCC_NPM-NEXT: [[C:%.*]] = load i1, i1* @cnd, align 1
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[MT:%.*]], label [[EXIT:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[MT:%.*]], label [[EXIT:%.*]]
; IS__CGSCC_NPM: mt: ; IS__CGSCC_NPM: mt:
; IS__CGSCC_NPM-NEXT: [[V:%.*]] = musttail call i32 @musttail_callee_1(i32* nocapture nofree nonnull readonly dereferenceable(4) [[P]]) [[ATTR12:#.*]] ; IS__CGSCC_NPM-NEXT: [[V:%.*]] = musttail call i32 @musttail_callee_1(i32* nocapture nofree noundef nonnull readonly dereferenceable(4) [[P]]) [[ATTR12:#.*]]
; IS__CGSCC_NPM-NEXT: ret i32 [[V]] ; IS__CGSCC_NPM-NEXT: ret i32 [[V]]
; IS__CGSCC_NPM: exit: ; IS__CGSCC_NPM: exit:
; IS__CGSCC_NPM-NEXT: ret i32 0 ; IS__CGSCC_NPM-NEXT: ret i32 0
; ;
%c = load i1, i1* @cnd %c = load i1, i1* @cnd
br i1 %c, label %mt, label %exit br i1 %c, label %mt, label %exit
mt: mt:
%v = musttail call i32 @musttail_callee_1(i32* %p) %v = musttail call i32 @musttail_callee_1(i32* %p)
ret i32 %v ret i32 %v
exit: exit:
ret i32 0 ret i32 0
} }
define i32* @checkAndAdvance(i32* align(16) %p) { define i32* @checkAndAdvance(i32* align(16) %p) {
; NOT_CGSCC_OPM: Function Attrs: nounwind ; NOT_CGSCC_OPM: Function Attrs: nounwind
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@checkAndAdvance ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@checkAndAdvance
; NOT_CGSCC_OPM-SAME: (i32* nonnull readonly align 16 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) [[ATTR2]] { ; NOT_CGSCC_OPM-SAME: (i32* noundef nonnull readonly align 16 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) [[ATTR2]] {
; NOT_CGSCC_OPM-NEXT: entry: ; NOT_CGSCC_OPM-NEXT: entry:
; NOT_CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[P]], align 16 ; NOT_CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[P]], align 16
; NOT_CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP0]], 0 ; NOT_CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP0]], 0
; NOT_CGSCC_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[RETURN:%.*]] ; NOT_CGSCC_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[RETURN:%.*]]
; NOT_CGSCC_OPM: if.then: ; NOT_CGSCC_OPM: if.then:
; NOT_CGSCC_OPM-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 4 ; NOT_CGSCC_OPM-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 4
; NOT_CGSCC_OPM-NEXT: [[CALL:%.*]] = call nonnull align 16 i32* @checkAndAdvance(i32* nonnull readonly align 16 "no-capture-maybe-returned" [[ADD_PTR]]) [[ATTR2]] ; NOT_CGSCC_OPM-NEXT: [[CALL:%.*]] = call nonnull align 16 i32* @checkAndAdvance(i32* nonnull readonly align 16 "no-capture-maybe-returned" [[ADD_PTR]]) [[ATTR2]]
; NOT_CGSCC_OPM-NEXT: br label [[RETURN]] ; NOT_CGSCC_OPM-NEXT: br label [[RETURN]]
; NOT_CGSCC_OPM: return: ; NOT_CGSCC_OPM: return:
; NOT_CGSCC_OPM-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL]], [[IF_THEN]] ], [ [[P]], [[ENTRY:%.*]] ] ; NOT_CGSCC_OPM-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL]], [[IF_THEN]] ], [ [[P]], [[ENTRY:%.*]] ]
; NOT_CGSCC_OPM-NEXT: call void @user_i32_ptr(i32* noalias nocapture nonnull readnone align 16 [[RETVAL_0]]) [[ATTR2]] ; NOT_CGSCC_OPM-NEXT: call void @user_i32_ptr(i32* noalias nocapture nonnull readnone align 16 [[RETVAL_0]]) [[ATTR2]]
; NOT_CGSCC_OPM-NEXT: ret i32* [[RETVAL_0]] ; NOT_CGSCC_OPM-NEXT: ret i32* [[RETVAL_0]]
; ;
; IS__CGSCC_OPM: Function Attrs: nounwind ; IS__CGSCC_OPM: Function Attrs: nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@checkAndAdvance ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@checkAndAdvance
; IS__CGSCC_OPM-SAME: (i32* nonnull readonly align 16 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) [[ATTR3]] { ; IS__CGSCC_OPM-SAME: (i32* noundef nonnull readonly align 16 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) [[ATTR3]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[P]], align 16 ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[P]], align 16
; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP0]], 0 ; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP0]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[RETURN:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[RETURN:%.*]]
; IS__CGSCC_OPM: if.then: ; IS__CGSCC_OPM: if.then:
; IS__CGSCC_OPM-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 4 ; IS__CGSCC_OPM-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 4
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call nonnull align 16 i32* @checkAndAdvance(i32* nonnull readonly align 16 "no-capture-maybe-returned" [[ADD_PTR]]) [[ATTR3]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call nonnull align 16 i32* @checkAndAdvance(i32* nonnull readonly align 16 "no-capture-maybe-returned" [[ADD_PTR]]) [[ATTR3]]
; IS__CGSCC_OPM-NEXT: br label [[RETURN]] ; IS__CGSCC_OPM-NEXT: br label [[RETURN]]
Show All 38 Lines

llvm/test/Transforms/Attributor/callbacks.ll

Show First 20 Lines • Show All 74 Lines • ▼ Show 20 Linesentry:
ret void ret void
} }
; Note that the first two arguments are provided by the callback_broker according to the callback in !1 below! ; Note that the first two arguments are provided by the callback_broker according to the callback in !1 below!
; The others are annotated with alignment information, amongst others, or even replaced by the constants passed to the call. ; The others are annotated with alignment information, amongst others, or even replaced by the constants passed to the call.
define internal void @t0_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) { define internal void @t0_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) {
; ;
; IS________OPM-LABEL: define {{[^@]+}}@t0_callback_callee ; IS________OPM-LABEL: define {{[^@]+}}@t0_callback_callee
; IS________OPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) { ; IS________OPM-SAME: (i32* nocapture noundef nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture noundef nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) {
; IS________OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS________OPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8 ; IS________OPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
; IS________OPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4 ; IS________OPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
; IS________OPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64 ; IS________OPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
; IS________OPM-NEXT: tail call void @t0_check(i32* align 256 [[A]], i64 noundef 99, i32* [[TMP0]]) ; IS________OPM-NEXT: tail call void @t0_check(i32* align 256 [[A]], i64 noundef 99, i32* [[TMP0]])
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM-LABEL: define {{[^@]+}}@t0_callback_callee ; IS________NPM-LABEL: define {{[^@]+}}@t0_callback_callee
; IS________NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) { ; IS________NPM-SAME: (i32* nocapture noundef nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture noundef nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8 ; IS________NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
; IS________NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4 ; IS________NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
; IS________NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64 ; IS________NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
; IS________NPM-NEXT: tail call void @t0_check(i32* align 256 [[A]], i64 noundef 99, i32* [[TMP0]]) ; IS________NPM-NEXT: tail call void @t0_check(i32* align 256 [[A]], i64 noundef 99, i32* [[TMP0]])
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
entry: entry:
▲ Show 20 Lines • Show All 75 Lines • ▼ Show 20 Lines
} }
; Note that the first two arguments are provided by the callback_broker according to the callback in !1 below! ; Note that the first two arguments are provided by the callback_broker according to the callback in !1 below!
; The others are annotated with alignment information, amongst others, or even replaced by the constants passed to the call. ; The others are annotated with alignment information, amongst others, or even replaced by the constants passed to the call.
define internal void @t1_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) { define internal void @t1_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) {
; ;
; IS________OPM: Function Attrs: nosync ; IS________OPM: Function Attrs: nosync
; IS________OPM-LABEL: define {{[^@]+}}@t1_callback_callee ; IS________OPM-LABEL: define {{[^@]+}}@t1_callback_callee
; IS________OPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) [[ATTR0:#.*]] { ; IS________OPM-SAME: (i32* nocapture noundef nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture noundef nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) [[ATTR0:#.*]] {
; IS________OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS________OPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8 ; IS________OPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
; IS________OPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4 ; IS________OPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
; IS________OPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64 ; IS________OPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
; IS________OPM-NEXT: tail call void @t1_check(i32* nocapture align 256 [[A]], i64 noundef 99, i32* nocapture [[TMP0]]) ; IS________OPM-NEXT: tail call void @t1_check(i32* nocapture align 256 [[A]], i64 noundef 99, i32* nocapture [[TMP0]])
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM: Function Attrs: nosync ; IS________NPM: Function Attrs: nosync
; IS________NPM-LABEL: define {{[^@]+}}@t1_callback_callee ; IS________NPM-LABEL: define {{[^@]+}}@t1_callback_callee
; IS________NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) [[ATTR0:#.*]] { ; IS________NPM-SAME: (i32* nocapture noundef nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture noundef nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) [[ATTR0:#.*]] {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8 ; IS________NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
; IS________NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4 ; IS________NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
; IS________NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64 ; IS________NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
; IS________NPM-NEXT: tail call void @t1_check(i32* nocapture align 256 [[A]], i64 noundef 99, i32* nocapture [[TMP0]]) ; IS________NPM-NEXT: tail call void @t1_check(i32* nocapture align 256 [[A]], i64 noundef 99, i32* nocapture [[TMP0]])
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
entry: entry:
▲ Show 20 Lines • Show All 74 Lines • ▼ Show 20 Lines
; Note that the first two arguments are provided by the callback_broker according to the callback in !1 below! ; Note that the first two arguments are provided by the callback_broker according to the callback in !1 below!
; The others are annotated with alignment information, amongst others, or even replaced by the constants passed to the call. ; The others are annotated with alignment information, amongst others, or even replaced by the constants passed to the call.
; ;
; FIXME: We should derive noalias for %a and add a "fake use" of %a in all potentially synchronizing calls. ; FIXME: We should derive noalias for %a and add a "fake use" of %a in all potentially synchronizing calls.
define internal void @t2_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) { define internal void @t2_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) {
; ;
; IS________OPM-LABEL: define {{[^@]+}}@t2_callback_callee ; IS________OPM-LABEL: define {{[^@]+}}@t2_callback_callee
; IS________OPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) { ; IS________OPM-SAME: (i32* nocapture noundef nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture noundef nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) {
; IS________OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS________OPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8 ; IS________OPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
; IS________OPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4 ; IS________OPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
; IS________OPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64 ; IS________OPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
; IS________OPM-NEXT: tail call void @t2_check(i32* nocapture align 256 [[A]], i64 noundef 99, i32* nocapture [[TMP0]]) ; IS________OPM-NEXT: tail call void @t2_check(i32* nocapture align 256 [[A]], i64 noundef 99, i32* nocapture [[TMP0]])
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM-LABEL: define {{[^@]+}}@t2_callback_callee ; IS________NPM-LABEL: define {{[^@]+}}@t2_callback_callee
; IS________NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) { ; IS________NPM-SAME: (i32* nocapture noundef nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture noundef nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8 ; IS________NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
; IS________NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4 ; IS________NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
; IS________NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64 ; IS________NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
; IS________NPM-NEXT: tail call void @t2_check(i32* nocapture align 256 [[A]], i64 noundef 99, i32* nocapture [[TMP0]]) ; IS________NPM-NEXT: tail call void @t2_check(i32* nocapture align 256 [[A]], i64 noundef 99, i32* nocapture [[TMP0]])
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
entry: entry:
▲ Show 20 Lines • Show All 79 Lines • ▼ Show 20 Lines
; Note that the first two arguments are provided by the callback_broker according to the callback in !1 below! ; Note that the first two arguments are provided by the callback_broker according to the callback in !1 below!
; The others are annotated with alignment information, amongst others, or even replaced by the constants passed to the call. ; The others are annotated with alignment information, amongst others, or even replaced by the constants passed to the call.
; ;
; FIXME: We should derive noalias for %a and add a "fake use" of %a in all potentially synchronizing calls. ; FIXME: We should derive noalias for %a and add a "fake use" of %a in all potentially synchronizing calls.
define internal void @t3_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) { define internal void @t3_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) {
; ;
; IS________OPM-LABEL: define {{[^@]+}}@t3_callback_callee ; IS________OPM-LABEL: define {{[^@]+}}@t3_callback_callee
; IS________OPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) { ; IS________OPM-SAME: (i32* nocapture noundef nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture noundef nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) {
; IS________OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS________OPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8 ; IS________OPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
; IS________OPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4 ; IS________OPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
; IS________OPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64 ; IS________OPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
; IS________OPM-NEXT: tail call void @t3_check(i32* nocapture align 256 [[A]], i64 noundef 99, i32* nocapture [[TMP0]]) ; IS________OPM-NEXT: tail call void @t3_check(i32* nocapture align 256 [[A]], i64 noundef 99, i32* nocapture [[TMP0]])
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM-LABEL: define {{[^@]+}}@t3_callback_callee ; IS________NPM-LABEL: define {{[^@]+}}@t3_callback_callee
; IS________NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) { ; IS________NPM-SAME: (i32* nocapture noundef nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture noundef nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8 ; IS________NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
; IS________NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4 ; IS________NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
; IS________NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64 ; IS________NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
; IS________NPM-NEXT: tail call void @t3_check(i32* nocapture align 256 [[A]], i64 noundef 99, i32* nocapture [[TMP0]]) ; IS________NPM-NEXT: tail call void @t3_check(i32* nocapture align 256 [[A]], i64 noundef 99, i32* nocapture [[TMP0]])
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
entry: entry:
Show All 13 Lines

llvm/test/Transforms/Attributor/chain.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes --check-attributes ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes --check-attributes
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -attributor-max-initialization-chain-length=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK_1 ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -attributor-max-initialization-chain-length=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK_1
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-annotate-decl-cs -attributor-max-initialization-chain-length=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK_1 ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-annotate-decl-cs -attributor-max-initialization-chain-length=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK_1
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -attributor-max-initialization-chain-length=1024 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK_5 ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -attributor-max-initialization-chain-length=1024 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK_5
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-annotate-decl-cs -attributor-max-initialization-chain-length=1024 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK_5 ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-annotate-decl-cs -attributor-max-initialization-chain-length=1024 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK_5
declare void @foo(i8* dereferenceable(8) %arg) declare void @foo(i8* dereferenceable(8) %arg)
define dso_local i32 @bar(i32* %arg) { define dso_local i32 @bar(i32* %arg) {
; CHECK_1-LABEL: define {{[^@]+}}@bar ; CHECK_1-LABEL: define {{[^@]+}}@bar
; CHECK_1-SAME: (i32* dereferenceable_or_null(8) [[ARG:%.*]]) { ; CHECK_1-SAME: (i32* dereferenceable_or_null(8) [[ARG:%.*]]) {
; CHECK_1-NEXT: entry: ; CHECK_1-NEXT: entry:
; CHECK_1-NEXT: [[BC1:%.*]] = bitcast i32* [[ARG]] to i8* ; CHECK_1-NEXT: [[BC1:%.*]] = bitcast i32* [[ARG]] to i8*
; CHECK_1-NEXT: call void @foo(i8* dereferenceable_or_null(8) [[BC1]]) ; CHECK_1-NEXT: call void @foo(i8* noundef dereferenceable_or_null(8) [[BC1]])
; CHECK_1-NEXT: [[LD:%.*]] = load i32, i32* [[ARG]], align 4 ; CHECK_1-NEXT: [[LD:%.*]] = load i32, i32* [[ARG]], align 4
; CHECK_1-NEXT: ret i32 [[LD]] ; CHECK_1-NEXT: ret i32 [[LD]]
; ;
; CHECK_5-LABEL: define {{[^@]+}}@bar ; CHECK_5-LABEL: define {{[^@]+}}@bar
; CHECK_5-SAME: (i32* nonnull dereferenceable(8) [[ARG:%.*]]) { ; CHECK_5-SAME: (i32* nonnull dereferenceable(8) [[ARG:%.*]]) {
; CHECK_5-NEXT: entry: ; CHECK_5-NEXT: entry:
; CHECK_5-NEXT: [[BC1:%.*]] = bitcast i32* [[ARG]] to i8* ; CHECK_5-NEXT: [[BC1:%.*]] = bitcast i32* [[ARG]] to i8*
; CHECK_5-NEXT: call void @foo(i8* nonnull dereferenceable(8) [[BC1]]) ; CHECK_5-NEXT: call void @foo(i8* noundef nonnull dereferenceable(8) [[BC1]])
; CHECK_5-NEXT: [[LD:%.*]] = load i32, i32* [[ARG]], align 4 ; CHECK_5-NEXT: [[LD:%.*]] = load i32, i32* [[ARG]], align 4
; CHECK_5-NEXT: ret i32 [[LD]] ; CHECK_5-NEXT: ret i32 [[LD]]
; ;
entry: entry:
%bc1 = bitcast i32* %arg to i8* %bc1 = bitcast i32* %arg to i8*
call void @foo(i8* %bc1) call void @foo(i8* %bc1)
%ld = load i32, i32* %arg %ld = load i32, i32* %arg
ret i32 %ld ret i32 %ld
} }

llvm/test/Transforms/Attributor/depgraph.ll

Show All 10 Lines
; if (*p == 0) ; if (*p == 0)
; return checkAndAdvance(p + 4); ; return checkAndAdvance(p + 4);
; return p; ; return p;
; } ; }
; ;
define i32* @checkAndAdvance(i32* align 16 %0) { define i32* @checkAndAdvance(i32* align 16 %0) {
; CHECK: Function Attrs: argmemonly nofree nosync nounwind readonly ; CHECK: Function Attrs: argmemonly nofree nosync nounwind readonly
; CHECK-LABEL: define {{[^@]+}}@checkAndAdvance ; CHECK-LABEL: define {{[^@]+}}@checkAndAdvance
; CHECK-SAME: (i32* nofree nonnull readonly align 16 dereferenceable(4) [[TMP0:%.*]]) [[ATTR0:#.*]] { ; CHECK-SAME: (i32* nofree noundef nonnull readonly align 16 dereferenceable(4) [[TMP0:%.*]]) [[ATTR0:#.*]] {
; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 16 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 16
; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 0
; CHECK-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP7:%.*]] ; CHECK-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP7:%.*]]
; CHECK: 4: ; CHECK: 4:
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 4 ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 4
; CHECK-NEXT: [[TMP6:%.*]] = call nonnull align 16 i32* @checkAndAdvance(i32* nofree nonnull readonly align 16 [[TMP5]]) [[ATTR1:#.*]] ; CHECK-NEXT: [[TMP6:%.*]] = call nonnull align 16 i32* @checkAndAdvance(i32* nofree nonnull readonly align 16 [[TMP5]]) [[ATTR1:#.*]]
; CHECK-NEXT: br label [[TMP8:%.*]] ; CHECK-NEXT: br label [[TMP8:%.*]]
; CHECK: 7: ; CHECK: 7:
▲ Show 20 Lines • Show All 111 Lines • ▼ Show 20 Lines
; GRAPH-NEXT: updates [AANonNull] for CtxI ' %6 = call i32* @checkAndAdvance(i32* %5)' at position {cs_ret: [@-1]} with state nonnull ; GRAPH-NEXT: updates [AANonNull] for CtxI ' %6 = call i32* @checkAndAdvance(i32* %5)' at position {cs_ret: [@-1]} with state nonnull
; GRAPH-EMPTY: ; GRAPH-EMPTY:
; GRAPH-NEXT: [AANoAlias] for CtxI ' %2 = load i32, i32* %0, align 4' at position {fn_ret:checkAndAdvance [checkAndAdvance@-1]} with state may-alias ; GRAPH-NEXT: [AANoAlias] for CtxI ' %2 = load i32, i32* %0, align 4' at position {fn_ret:checkAndAdvance [checkAndAdvance@-1]} with state may-alias
; GRAPH-EMPTY: ; GRAPH-EMPTY:
; GRAPH-NEXT: [AADereferenceable] for CtxI ' %2 = load i32, i32* %0, align 4' at position {fn_ret:checkAndAdvance [checkAndAdvance@-1]} with state unknown-dereferenceable ; GRAPH-NEXT: [AADereferenceable] for CtxI ' %2 = load i32, i32* %0, align 4' at position {fn_ret:checkAndAdvance [checkAndAdvance@-1]} with state unknown-dereferenceable
; GRAPH-EMPTY: ; GRAPH-EMPTY:
; GRAPH-NEXT: [AAIsDead] for CtxI ' %2 = load i32, i32* %0, align 4' at position {arg: [@0]} with state assumed-live ; GRAPH-NEXT: [AAIsDead] for CtxI ' %2 = load i32, i32* %0, align 4' at position {arg: [@0]} with state assumed-live
; GRAPH-EMPTY: ; GRAPH-EMPTY:
; GRAPH-NEXT: [AANoUndef] for CtxI ' %2 = load i32, i32* %0, align 4' at position {arg: [@0]} with state may-undef-or-poison ; GRAPH-NEXT: [AANoUndef] for CtxI ' %2 = load i32, i32* %0, align 4' at position {arg: [@0]} with state noundef
; GRAPH-EMPTY: ; GRAPH-EMPTY:
; GRAPH-NEXT: [AANonNull] for CtxI ' %2 = load i32, i32* %0, align 4' at position {arg: [@0]} with state nonnull ; GRAPH-NEXT: [AANonNull] for CtxI ' %2 = load i32, i32* %0, align 4' at position {arg: [@0]} with state nonnull
; GRAPH-EMPTY: ; GRAPH-EMPTY:
; GRAPH-NEXT: [AANoAlias] for CtxI ' %2 = load i32, i32* %0, align 4' at position {arg: [@0]} with state may-alias ; GRAPH-NEXT: [AANoAlias] for CtxI ' %2 = load i32, i32* %0, align 4' at position {arg: [@0]} with state may-alias
; GRAPH-EMPTY: ; GRAPH-EMPTY:
; GRAPH-NEXT: [AADereferenceable] for CtxI ' %2 = load i32, i32* %0, align 4' at position {arg: [@0]} with state dereferenceable<4-4> ; GRAPH-NEXT: [AADereferenceable] for CtxI ' %2 = load i32, i32* %0, align 4' at position {arg: [@0]} with state dereferenceable<4-4>
; GRAPH-EMPTY: ; GRAPH-EMPTY:
; GRAPH-NEXT: [AADereferenceable] for CtxI ' %6 = call i32* @checkAndAdvance(i32* %5)' at position {cs_arg: [@0]} with state unknown-dereferenceable ; GRAPH-NEXT: [AADereferenceable] for CtxI ' %6 = call i32* @checkAndAdvance(i32* %5)' at position {cs_arg: [@0]} with state unknown-dereferenceable
▲ Show 20 Lines • Show All 164 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/dereferenceable-1.ll

Show First 20 Lines • Show All 230 Lines • ▼ Show 20 Lines
; TEST 7 ; TEST 7
; share known infomation in must-be-executed-context ; share known infomation in must-be-executed-context
declare i32* @unkown_ptr() willreturn nounwind declare i32* @unkown_ptr() willreturn nounwind
declare i32 @unkown_f(i32*) willreturn nounwind declare i32 @unkown_f(i32*) willreturn nounwind
define i32* @f7_0(i32* %ptr) { define i32* @f7_0(i32* %ptr) {
; CHECK: Function Attrs: nounwind willreturn ; CHECK: Function Attrs: nounwind willreturn
; CHECK-LABEL: define {{[^@]+}}@f7_0 ; CHECK-LABEL: define {{[^@]+}}@f7_0
; CHECK-SAME: (i32* nonnull returned dereferenceable(8) [[PTR:%.*]]) [[ATTR1:#.*]] { ; CHECK-SAME: (i32* noundef nonnull returned dereferenceable(8) [[PTR:%.*]]) [[ATTR1:#.*]] {
; CHECK-NEXT: [[T:%.*]] = tail call i32 @unkown_f(i32* nonnull dereferenceable(8) [[PTR]]) [[ATTR1]] ; CHECK-NEXT: [[T:%.*]] = tail call i32 @unkown_f(i32* noundef nonnull dereferenceable(8) [[PTR]]) [[ATTR1]]
; CHECK-NEXT: ret i32* [[PTR]] ; CHECK-NEXT: ret i32* [[PTR]]
; ;
%T = tail call i32 @unkown_f(i32* dereferenceable(8) %ptr) %T = tail call i32 @unkown_f(i32* dereferenceable(8) %ptr)
ret i32* %ptr ret i32* %ptr
} }
define void @f7_1(i32* %ptr, i1 %c) { define void @f7_1(i32* %ptr, i1 %c) {
; CHECK: Function Attrs: nounwind willreturn ; CHECK: Function Attrs: nounwind willreturn
; CHECK-LABEL: define {{[^@]+}}@f7_1 ; CHECK-LABEL: define {{[^@]+}}@f7_1
; CHECK-SAME: (i32* nonnull align 4 dereferenceable(4) [[PTR:%.*]], i1 [[C:%.*]]) [[ATTR1]] { ; CHECK-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[PTR:%.*]], i1 [[C:%.*]]) [[ATTR1]] {
; CHECK-NEXT: [[A:%.*]] = tail call i32 @unkown_f(i32* nonnull align 4 dereferenceable(4) [[PTR]]) [[ATTR1]] ; CHECK-NEXT: [[A:%.*]] = tail call i32 @unkown_f(i32* noundef nonnull align 4 dereferenceable(4) [[PTR]]) [[ATTR1]]
; CHECK-NEXT: [[B:%.*]] = tail call i32 @unkown_f(i32* nonnull align 4 dereferenceable(4) [[PTR]]) [[ATTR1]] ; CHECK-NEXT: [[B:%.*]] = tail call i32 @unkown_f(i32* noundef nonnull align 4 dereferenceable(4) [[PTR]]) [[ATTR1]]
; CHECK-NEXT: br i1 [[C]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] ; CHECK-NEXT: br i1 [[C]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
; CHECK: if.true: ; CHECK: if.true:
; CHECK-NEXT: [[C:%.*]] = tail call i32 @unkown_f(i32* nonnull align 4 dereferenceable(8) [[PTR]]) [[ATTR1]] ; CHECK-NEXT: [[C:%.*]] = tail call i32 @unkown_f(i32* noundef nonnull align 4 dereferenceable(8) [[PTR]]) [[ATTR1]]
; CHECK-NEXT: [[D:%.*]] = tail call i32 @unkown_f(i32* nonnull align 4 dereferenceable(8) [[PTR]]) [[ATTR1]] ; CHECK-NEXT: [[D:%.*]] = tail call i32 @unkown_f(i32* noundef nonnull align 4 dereferenceable(8) [[PTR]]) [[ATTR1]]
; CHECK-NEXT: [[E:%.*]] = tail call i32 @unkown_f(i32* nonnull align 4 dereferenceable(8) [[PTR]]) [[ATTR1]] ; CHECK-NEXT: [[E:%.*]] = tail call i32 @unkown_f(i32* noundef nonnull align 4 dereferenceable(8) [[PTR]]) [[ATTR1]]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; CHECK: if.false: ; CHECK: if.false:
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%A = tail call i32 @unkown_f(i32* %ptr) %A = tail call i32 @unkown_f(i32* %ptr)
%ptr.0 = load i32, i32* %ptr %ptr.0 = load i32, i32* %ptr
; deref 4 hold ; deref 4 hold
; FIXME: this should be %B = tail call i32 @unkown_f(i32* nonnull dereferenceable(4) %ptr) ; FIXME: this should be %B = tail call i32 @unkown_f(i32* nonnull dereferenceable(4) %ptr)
%B = tail call i32 @unkown_f(i32* dereferenceable(1) %ptr) %B = tail call i32 @unkown_f(i32* dereferenceable(1) %ptr)
br i1%c, label %if.true, label %if.false br i1%c, label %if.true, label %if.false
if.true: if.true:
%C = tail call i32 @unkown_f(i32* %ptr) %C = tail call i32 @unkown_f(i32* %ptr)
%D = tail call i32 @unkown_f(i32* dereferenceable(8) %ptr) %D = tail call i32 @unkown_f(i32* dereferenceable(8) %ptr)
%E = tail call i32 @unkown_f(i32* %ptr) %E = tail call i32 @unkown_f(i32* %ptr)
ret void ret void
if.false: if.false:
ret void ret void
} }
define void @f7_2(i1 %c) { define void @f7_2(i1 %c) {
; CHECK: Function Attrs: nounwind willreturn ; CHECK: Function Attrs: nounwind willreturn
; CHECK-LABEL: define {{[^@]+}}@f7_2 ; CHECK-LABEL: define {{[^@]+}}@f7_2
; CHECK-SAME: (i1 [[C:%.*]]) [[ATTR1]] { ; CHECK-SAME: (i1 [[C:%.*]]) [[ATTR1]] {
; CHECK-NEXT: [[PTR:%.*]] = tail call nonnull align 4 dereferenceable(4) i32* @unkown_ptr() [[ATTR1]] ; CHECK-NEXT: [[PTR:%.*]] = tail call nonnull align 4 dereferenceable(4) i32* @unkown_ptr() [[ATTR1]]
; CHECK-NEXT: [[A:%.*]] = tail call i32 @unkown_f(i32* nonnull align 4 dereferenceable(4) [[PTR]]) [[ATTR1]] ; CHECK-NEXT: [[A:%.*]] = tail call i32 @unkown_f(i32* noundef nonnull align 4 dereferenceable(4) [[PTR]]) [[ATTR1]]
; CHECK-NEXT: [[ARG_A_0:%.*]] = load i32, i32* [[PTR]], align 4 ; CHECK-NEXT: [[ARG_A_0:%.*]] = load i32, i32* [[PTR]], align 4
; CHECK-NEXT: [[B:%.*]] = tail call i32 @unkown_f(i32* nonnull align 4 dereferenceable(4) [[PTR]]) [[ATTR1]] ; CHECK-NEXT: [[B:%.*]] = tail call i32 @unkown_f(i32* noundef nonnull align 4 dereferenceable(4) [[PTR]]) [[ATTR1]]
; CHECK-NEXT: br i1 [[C]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] ; CHECK-NEXT: br i1 [[C]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
; CHECK: if.true: ; CHECK: if.true:
; CHECK-NEXT: [[C:%.*]] = tail call i32 @unkown_f(i32* nonnull align 4 dereferenceable(8) [[PTR]]) [[ATTR1]] ; CHECK-NEXT: [[C:%.*]] = tail call i32 @unkown_f(i32* noundef nonnull align 4 dereferenceable(8) [[PTR]]) [[ATTR1]]
; CHECK-NEXT: [[D:%.*]] = tail call i32 @unkown_f(i32* nonnull align 4 dereferenceable(8) [[PTR]]) [[ATTR1]] ; CHECK-NEXT: [[D:%.*]] = tail call i32 @unkown_f(i32* noundef nonnull align 4 dereferenceable(8) [[PTR]]) [[ATTR1]]
; CHECK-NEXT: [[E:%.*]] = tail call i32 @unkown_f(i32* nonnull align 4 dereferenceable(8) [[PTR]]) [[ATTR1]] ; CHECK-NEXT: [[E:%.*]] = tail call i32 @unkown_f(i32* noundef nonnull align 4 dereferenceable(8) [[PTR]]) [[ATTR1]]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; CHECK: if.false: ; CHECK: if.false:
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%ptr = tail call i32* @unkown_ptr() %ptr = tail call i32* @unkown_ptr()
%A = tail call i32 @unkown_f(i32* %ptr) %A = tail call i32 @unkown_f(i32* %ptr)
%arg_a.0 = load i32, i32* %ptr %arg_a.0 = load i32, i32* %ptr
; deref 4 hold ; deref 4 hold
%B = tail call i32 @unkown_f(i32* dereferenceable(1) %ptr) %B = tail call i32 @unkown_f(i32* dereferenceable(1) %ptr)
br i1%c, label %if.true, label %if.false br i1%c, label %if.true, label %if.false
if.true: if.true:
%C = tail call i32 @unkown_f(i32* %ptr) %C = tail call i32 @unkown_f(i32* %ptr)
%D = tail call i32 @unkown_f(i32* dereferenceable(8) %ptr) %D = tail call i32 @unkown_f(i32* dereferenceable(8) %ptr)
%E = tail call i32 @unkown_f(i32* %ptr) %E = tail call i32 @unkown_f(i32* %ptr)
ret void ret void
if.false: if.false:
ret void ret void
} }
define i32* @f7_3() { define i32* @f7_3() {
; CHECK: Function Attrs: nounwind willreturn ; CHECK: Function Attrs: nounwind willreturn
; CHECK-LABEL: define {{[^@]+}}@f7_3 ; CHECK-LABEL: define {{[^@]+}}@f7_3
; CHECK-SAME: () [[ATTR1]] { ; CHECK-SAME: () [[ATTR1]] {
; CHECK-NEXT: [[PTR:%.*]] = tail call nonnull align 16 dereferenceable(4) i32* @unkown_ptr() [[ATTR1]] ; CHECK-NEXT: [[PTR:%.*]] = tail call noundef nonnull align 16 dereferenceable(4) i32* @unkown_ptr() [[ATTR1]]
; CHECK-NEXT: store i32 10, i32* [[PTR]], align 16 ; CHECK-NEXT: store i32 10, i32* [[PTR]], align 16
; CHECK-NEXT: ret i32* [[PTR]] ; CHECK-NEXT: ret i32* [[PTR]]
; ;
%ptr = tail call i32* @unkown_ptr() %ptr = tail call i32* @unkown_ptr()
store i32 10, i32* %ptr, align 16 store i32 10, i32* %ptr, align 16
ret i32* %ptr ret i32* %ptr
} }
Show All 16 Lines;
%q = getelementptr inbounds i32, i32* %p, i32 -2 %q = getelementptr inbounds i32, i32* %p, i32 -2
store i32 1, i32* %q store i32 1, i32* %q
ret i32* %q ret i32* %q
} }
define void @deref_or_null_and_nonnull(i32* dereferenceable_or_null(100) %0) { define void @deref_or_null_and_nonnull(i32* dereferenceable_or_null(100) %0) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@deref_or_null_and_nonnull ; IS__TUNIT____-LABEL: define {{[^@]+}}@deref_or_null_and_nonnull
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(100) [[TMP0:%.*]]) [[ATTR2]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(100) [[TMP0:%.*]]) [[ATTR2]] {
; IS__TUNIT____-NEXT: store i32 1, i32* [[TMP0]], align 4 ; IS__TUNIT____-NEXT: store i32 1, i32* [[TMP0]], align 4
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@deref_or_null_and_nonnull ; IS__CGSCC____-LABEL: define {{[^@]+}}@deref_or_null_and_nonnull
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(100) [[TMP0:%.*]]) [[ATTR2]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(100) [[TMP0:%.*]]) [[ATTR2]] {
; IS__CGSCC____-NEXT: store i32 1, i32* [[TMP0]], align 4 ; IS__CGSCC____-NEXT: store i32 1, i32* [[TMP0]], align 4
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
store i32 1, i32* %0 store i32 1, i32* %0
ret void ret void
} }
; TEST 8 ; TEST 8
▲ Show 20 Lines • Show All 292 Lines • ▼ Show 20 Linesfor.body: ; preds = %entry, %for.body
%inc = add nsw i64 %i.06, 1 %inc = add nsw i64 %i.06, 1
%cmp = icmp slt i64 %i.06, %0 %cmp = icmp slt i64 %i.06, %0
br i1 %cmp, label %for.body, label %for.cond.cleanup br i1 %cmp, label %for.body, label %for.cond.cleanup
} }
define void @call_fill_range(i32* nocapture %p, i64* nocapture readonly %range) { define void @call_fill_range(i32* nocapture %p, i64* nocapture readonly %range) {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind ; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@call_fill_range ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@call_fill_range
; IS__TUNIT_OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64* nocapture nofree nonnull readonly align 8 dereferenceable(8) [[RANGE:%.*]]) [[ATTR4:#.*]] { ; IS__TUNIT_OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64* nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[RANGE:%.*]]) [[ATTR4:#.*]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load i64, i64* [[RANGE]], align 8, [[RNG0:!range !.*]] ; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load i64, i64* [[RANGE]], align 8, [[RNG0:!range !.*]]
; IS__TUNIT_OPM-NEXT: tail call void @fill_range_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) [[ATTR6:#.*]] ; IS__TUNIT_OPM-NEXT: tail call void @fill_range_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) [[ATTR6:#.*]]
; IS__TUNIT_OPM-NEXT: tail call void @fill_range_not_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) [[ATTR6]] ; IS__TUNIT_OPM-NEXT: tail call void @fill_range_not_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) [[ATTR6]]
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@call_fill_range ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@call_fill_range
; IS__TUNIT_NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64* nocapture nofree nonnull readonly align 8 dereferenceable(8) [[RANGE:%.*]]) [[ATTR3:#.*]] { ; IS__TUNIT_NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64* nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[RANGE:%.*]]) [[ATTR3:#.*]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i64, i64* [[RANGE]], align 8, [[RNG0:!range !.*]] ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i64, i64* [[RANGE]], align 8, [[RNG0:!range !.*]]
; IS__TUNIT_NPM-NEXT: tail call void @fill_range_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) [[ATTR6:#.*]] ; IS__TUNIT_NPM-NEXT: tail call void @fill_range_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) [[ATTR6:#.*]]
; IS__TUNIT_NPM-NEXT: tail call void @fill_range_not_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) [[ATTR6]] ; IS__TUNIT_NPM-NEXT: tail call void @fill_range_not_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) [[ATTR6]]
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@call_fill_range ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@call_fill_range
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64* nocapture nofree nonnull readonly align 8 dereferenceable(8) [[RANGE:%.*]]) [[ATTR4:#.*]] { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64* nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[RANGE:%.*]]) [[ATTR4:#.*]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i64, i64* [[RANGE]], align 8, [[RNG0:!range !.*]] ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i64, i64* [[RANGE]], align 8, [[RNG0:!range !.*]]
; IS__CGSCC_OPM-NEXT: tail call void @fill_range_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) [[ATTR7:#.*]] ; IS__CGSCC_OPM-NEXT: tail call void @fill_range_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) [[ATTR7:#.*]]
; IS__CGSCC_OPM-NEXT: tail call void @fill_range_not_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) [[ATTR7]] ; IS__CGSCC_OPM-NEXT: tail call void @fill_range_not_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) [[ATTR7]]
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@call_fill_range ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@call_fill_range
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64* nocapture nofree nonnull readonly align 8 dereferenceable(8) [[RANGE:%.*]]) [[ATTR3:#.*]] { ; IS__CGSCC_NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64* nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[RANGE:%.*]]) [[ATTR3:#.*]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i64, i64* [[RANGE]], align 8, [[RNG0:!range !.*]] ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i64, i64* [[RANGE]], align 8, [[RNG0:!range !.*]]
; IS__CGSCC_NPM-NEXT: tail call void @fill_range_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) [[ATTR6:#.*]] ; IS__CGSCC_NPM-NEXT: tail call void @fill_range_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) [[ATTR6:#.*]]
; IS__CGSCC_NPM-NEXT: tail call void @fill_range_not_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) [[ATTR6]] ; IS__CGSCC_NPM-NEXT: tail call void @fill_range_not_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) [[ATTR6]]
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
entry: entry:
%0 = load i64, i64* %range, align 8, !range !0 %0 = load i64, i64* %range, align 8, !range !0
▲ Show 20 Lines • Show All 46 Lines • ▼ Show 20 Lines
; ... (willreturn & nounwind) ; ... (willreturn & nounwind)
; fun1(dereferenceable(16) %a) ; fun1(dereferenceable(16) %a)
; fun1(dereferenceable(8) %a) ; fun1(dereferenceable(8) %a)
; } ; }
; %a is dereferenceable(12) ; %a is dereferenceable(12)
define void @complex-path(i8* %a, i8* %b, i8 %c) { define void @complex-path(i8* %a, i8* %b, i8 %c) {
; CHECK: Function Attrs: nounwind willreturn ; CHECK: Function Attrs: nounwind willreturn
; CHECK-LABEL: define {{[^@]+}}@complex-path ; CHECK-LABEL: define {{[^@]+}}@complex-path
; CHECK-SAME: (i8* nonnull dereferenceable(12) [[A:%.*]], i8* nocapture nofree readnone [[B:%.*]], i8 [[C:%.*]]) [[ATTR1]] { ; CHECK-SAME: (i8* noundef nonnull dereferenceable(12) [[A:%.*]], i8* nocapture nofree readnone [[B:%.*]], i8 [[C:%.*]]) [[ATTR1]] {
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[C]], 0 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[C]], 0
; CHECK-NEXT: tail call void @use1(i8* nonnull dereferenceable(12) [[A]]) [[ATTR1]] ; CHECK-NEXT: tail call void @use1(i8* noundef nonnull dereferenceable(12) [[A]]) [[ATTR1]]
; CHECK-NEXT: br i1 [[CMP]], label [[CONT_THEN:%.*]], label [[CONT_ELSE:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[CONT_THEN:%.*]], label [[CONT_ELSE:%.*]]
; CHECK: cont.then: ; CHECK: cont.then:
; CHECK-NEXT: tail call void @use1(i8* nonnull dereferenceable(12) [[A]]) [[ATTR1]] ; CHECK-NEXT: tail call void @use1(i8* noundef nonnull dereferenceable(12) [[A]]) [[ATTR1]]
; CHECK-NEXT: br label [[CONT2:%.*]] ; CHECK-NEXT: br label [[CONT2:%.*]]
; CHECK: cont.else: ; CHECK: cont.else:
; CHECK-NEXT: tail call void @use1(i8* nonnull dereferenceable(16) [[A]]) [[ATTR1]] ; CHECK-NEXT: tail call void @use1(i8* noundef nonnull dereferenceable(16) [[A]]) [[ATTR1]]
; CHECK-NEXT: br label [[CONT2]] ; CHECK-NEXT: br label [[CONT2]]
; CHECK: cont2: ; CHECK: cont2:
; CHECK-NEXT: tail call void @use1(i8* nonnull dereferenceable(12) [[A]]) [[ATTR1]] ; CHECK-NEXT: tail call void @use1(i8* noundef nonnull dereferenceable(12) [[A]]) [[ATTR1]]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%cmp = icmp eq i8 %c, 0 %cmp = icmp eq i8 %c, 0
tail call void @use1(i8* dereferenceable(4) %a) tail call void @use1(i8* dereferenceable(4) %a)
br i1 %cmp, label %cont.then, label %cont.else br i1 %cmp, label %cont.then, label %cont.else
cont.then: cont.then:
tail call void @use1(i8* dereferenceable(12) %a) tail call void @use1(i8* dereferenceable(12) %a)
br label %cont2 br label %cont2
▲ Show 20 Lines • Show All 380 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/dereferenceable-2-inseltpoison.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; Determine dereference-ability before unused loads get deleted: ; Determine dereference-ability before unused loads get deleted:
; https://bugs.llvm.org/show_bug.cgi?id=21780 ; https://bugs.llvm.org/show_bug.cgi?id=21780
define <4 x double> @PR21780(double* %ptr) { define <4 x double> @PR21780(double* %ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@PR21780 ; IS__TUNIT____-LABEL: define {{[^@]+}}@PR21780
; IS__TUNIT____-SAME: (double* nocapture nofree nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) [[ATTR0:#.*]] { ; IS__TUNIT____-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) [[ATTR0:#.*]] {
; IS__TUNIT____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 1 ; IS__TUNIT____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 1
; IS__TUNIT____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 2 ; IS__TUNIT____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 2
; IS__TUNIT____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3 ; IS__TUNIT____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3
; IS__TUNIT____-NEXT: [[T0:%.*]] = load double, double* [[PTR]], align 8 ; IS__TUNIT____-NEXT: [[T0:%.*]] = load double, double* [[PTR]], align 8
; IS__TUNIT____-NEXT: [[T1:%.*]] = load double, double* [[ARRAYIDX1]], align 8 ; IS__TUNIT____-NEXT: [[T1:%.*]] = load double, double* [[ARRAYIDX1]], align 8
; IS__TUNIT____-NEXT: [[T2:%.*]] = load double, double* [[ARRAYIDX2]], align 8 ; IS__TUNIT____-NEXT: [[T2:%.*]] = load double, double* [[ARRAYIDX2]], align 8
; IS__TUNIT____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8 ; IS__TUNIT____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__TUNIT____-NEXT: [[VECINIT0:%.*]] = insertelement <4 x double> poison, double [[T0]], i32 0 ; IS__TUNIT____-NEXT: [[VECINIT0:%.*]] = insertelement <4 x double> poison, double [[T0]], i32 0
; IS__TUNIT____-NEXT: [[VECINIT1:%.*]] = insertelement <4 x double> [[VECINIT0]], double [[T1]], i32 1 ; IS__TUNIT____-NEXT: [[VECINIT1:%.*]] = insertelement <4 x double> [[VECINIT0]], double [[T1]], i32 1
; IS__TUNIT____-NEXT: [[VECINIT2:%.*]] = insertelement <4 x double> [[VECINIT1]], double [[T2]], i32 2 ; IS__TUNIT____-NEXT: [[VECINIT2:%.*]] = insertelement <4 x double> [[VECINIT1]], double [[T2]], i32 2
; IS__TUNIT____-NEXT: [[VECINIT3:%.*]] = insertelement <4 x double> [[VECINIT2]], double [[T3]], i32 3 ; IS__TUNIT____-NEXT: [[VECINIT3:%.*]] = insertelement <4 x double> [[VECINIT2]], double [[T3]], i32 3
; IS__TUNIT____-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x double> [[VECINIT3]], <4 x double> [[VECINIT3]], <4 x i32> <i32 0, i32 0, i32 2, i32 2> ; IS__TUNIT____-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x double> [[VECINIT3]], <4 x double> [[VECINIT3]], <4 x i32> <i32 0, i32 0, i32 2, i32 2>
; IS__TUNIT____-NEXT: ret <4 x double> [[SHUFFLE]] ; IS__TUNIT____-NEXT: ret <4 x double> [[SHUFFLE]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@PR21780 ; IS__CGSCC____-LABEL: define {{[^@]+}}@PR21780
; IS__CGSCC____-SAME: (double* nocapture nofree nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) [[ATTR0:#.*]] { ; IS__CGSCC____-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) [[ATTR0:#.*]] {
; IS__CGSCC____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 1 ; IS__CGSCC____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 1
; IS__CGSCC____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 2 ; IS__CGSCC____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 2
; IS__CGSCC____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3 ; IS__CGSCC____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3
; IS__CGSCC____-NEXT: [[T0:%.*]] = load double, double* [[PTR]], align 8 ; IS__CGSCC____-NEXT: [[T0:%.*]] = load double, double* [[PTR]], align 8
; IS__CGSCC____-NEXT: [[T1:%.*]] = load double, double* [[ARRAYIDX1]], align 8 ; IS__CGSCC____-NEXT: [[T1:%.*]] = load double, double* [[ARRAYIDX1]], align 8
; IS__CGSCC____-NEXT: [[T2:%.*]] = load double, double* [[ARRAYIDX2]], align 8 ; IS__CGSCC____-NEXT: [[T2:%.*]] = load double, double* [[ARRAYIDX2]], align 8
; IS__CGSCC____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8 ; IS__CGSCC____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__CGSCC____-NEXT: [[VECINIT0:%.*]] = insertelement <4 x double> poison, double [[T0]], i32 0 ; IS__CGSCC____-NEXT: [[VECINIT0:%.*]] = insertelement <4 x double> poison, double [[T0]], i32 0
▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines;
%arrayidx3 = getelementptr double, double* %ptr, i64 3 %arrayidx3 = getelementptr double, double* %ptr, i64 3
%t3 = load double, double* %arrayidx3, align 8 %t3 = load double, double* %arrayidx3, align 8
ret double %t3 ret double %t3
} }
define double @PR21780_without_inbounds(double* %ptr) { define double @PR21780_without_inbounds(double* %ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@PR21780_without_inbounds ; IS__TUNIT____-LABEL: define {{[^@]+}}@PR21780_without_inbounds
; IS__TUNIT____-SAME: (double* nocapture nofree nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) [[ATTR0]] { ; IS__TUNIT____-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) [[ATTR0]] {
; IS__TUNIT____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3 ; IS__TUNIT____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3
; IS__TUNIT____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8 ; IS__TUNIT____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__TUNIT____-NEXT: ret double [[T3]] ; IS__TUNIT____-NEXT: ret double [[T3]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@PR21780_without_inbounds ; IS__CGSCC____-LABEL: define {{[^@]+}}@PR21780_without_inbounds
; IS__CGSCC____-SAME: (double* nocapture nofree nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) [[ATTR0]] { ; IS__CGSCC____-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) [[ATTR0]] {
; IS__CGSCC____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3 ; IS__CGSCC____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3
; IS__CGSCC____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8 ; IS__CGSCC____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__CGSCC____-NEXT: ret double [[T3]] ; IS__CGSCC____-NEXT: ret double [[T3]]
; ;
%arrayidx1 = getelementptr double, double* %ptr, i64 1 %arrayidx1 = getelementptr double, double* %ptr, i64 1
%arrayidx2 = getelementptr double, double* %ptr, i64 2 %arrayidx2 = getelementptr double, double* %ptr, i64 2
%arrayidx3 = getelementptr double, double* %ptr, i64 3 %arrayidx3 = getelementptr double, double* %ptr, i64 3
%t0 = load double, double* %ptr, align 8 %t0 = load double, double* %ptr, align 8
%t1 = load double, double* %arrayidx1, align 8 %t1 = load double, double* %arrayidx1, align 8
%t2 = load double, double* %arrayidx2, align 8 %t2 = load double, double* %arrayidx2, align 8
%t3 = load double, double* %arrayidx3, align 8 %t3 = load double, double* %arrayidx3, align 8
ret double %t3 ret double %t3
} }
; Unsimplified, but still valid. Also, throw in some bogus arguments. ; Unsimplified, but still valid. Also, throw in some bogus arguments.
define void @gep0(i8* %unused, i8* %other, i8* %ptr) { define void @gep0(i8* %unused, i8* %other, i8* %ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@gep0 ; IS__TUNIT____-LABEL: define {{[^@]+}}@gep0
; IS__TUNIT____-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree nonnull writeonly dereferenceable(1) [[OTHER:%.*]], i8* nocapture nofree nonnull readonly dereferenceable(3) [[PTR:%.*]]) [[ATTR1:#.*]] { ; IS__TUNIT____-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree noundef nonnull writeonly dereferenceable(1) [[OTHER:%.*]], i8* nocapture nofree nonnull readonly dereferenceable(3) [[PTR:%.*]]) [[ATTR1:#.*]] {
; IS__TUNIT____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr i8, i8* [[PTR]], i64 2 ; IS__TUNIT____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr i8, i8* [[PTR]], i64 2
; IS__TUNIT____-NEXT: [[T2:%.*]] = load i8, i8* [[ARRAYIDX2]], align 1 ; IS__TUNIT____-NEXT: [[T2:%.*]] = load i8, i8* [[ARRAYIDX2]], align 1
; IS__TUNIT____-NEXT: store i8 [[T2]], i8* [[OTHER]], align 1 ; IS__TUNIT____-NEXT: store i8 [[T2]], i8* [[OTHER]], align 1
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@gep0 ; IS__CGSCC____-LABEL: define {{[^@]+}}@gep0
; IS__CGSCC____-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree nonnull writeonly dereferenceable(1) [[OTHER:%.*]], i8* nocapture nofree nonnull readonly dereferenceable(3) [[PTR:%.*]]) [[ATTR1:#.*]] { ; IS__CGSCC____-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree noundef nonnull writeonly dereferenceable(1) [[OTHER:%.*]], i8* nocapture nofree nonnull readonly dereferenceable(3) [[PTR:%.*]]) [[ATTR1:#.*]] {
; IS__CGSCC____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr i8, i8* [[PTR]], i64 2 ; IS__CGSCC____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr i8, i8* [[PTR]], i64 2
; IS__CGSCC____-NEXT: [[T2:%.*]] = load i8, i8* [[ARRAYIDX2]], align 1 ; IS__CGSCC____-NEXT: [[T2:%.*]] = load i8, i8* [[ARRAYIDX2]], align 1
; IS__CGSCC____-NEXT: store i8 [[T2]], i8* [[OTHER]], align 1 ; IS__CGSCC____-NEXT: store i8 [[T2]], i8* [[OTHER]], align 1
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx0 = getelementptr i8, i8* %ptr, i64 0 %arrayidx0 = getelementptr i8, i8* %ptr, i64 0
%arrayidx1 = getelementptr i8, i8* %ptr, i64 1 %arrayidx1 = getelementptr i8, i8* %ptr, i64 1
%arrayidx2 = getelementptr i8, i8* %ptr, i64 2 %arrayidx2 = getelementptr i8, i8* %ptr, i64 2
▲ Show 20 Lines • Show All 492 Lines • ▼ Show 20 Lines;
%t1 = load float, float* %arrayidx0 %t1 = load float, float* %arrayidx0
store float 2.0, float* %arrayidx1 store float 2.0, float* %arrayidx1
ret void ret void
} }
define void @different_size1(i32* %arg) { define void @different_size1(i32* %arg) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@different_size1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@different_size1
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) [[ATTR4]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) [[ATTR4]] {
; IS__TUNIT____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double* ; IS__TUNIT____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double*
; IS__TUNIT____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8 ; IS__TUNIT____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8
; IS__TUNIT____-NEXT: store i32 0, i32* [[ARG]], align 8 ; IS__TUNIT____-NEXT: store i32 0, i32* [[ARG]], align 8
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@different_size1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@different_size1
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) [[ATTR4]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) [[ATTR4]] {
; IS__CGSCC____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double* ; IS__CGSCC____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double*
; IS__CGSCC____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8 ; IS__CGSCC____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8
; IS__CGSCC____-NEXT: store i32 0, i32* [[ARG]], align 8 ; IS__CGSCC____-NEXT: store i32 0, i32* [[ARG]], align 8
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
%arg-cast = bitcast i32* %arg to double* %arg-cast = bitcast i32* %arg to double*
store double 0.000000e+00, double* %arg-cast store double 0.000000e+00, double* %arg-cast
store i32 0, i32* %arg store i32 0, i32* %arg
ret void ret void
} }
define void @different_size2(i32* %arg) { define void @different_size2(i32* %arg) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@different_size2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@different_size2
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) [[ATTR4]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) [[ATTR4]] {
; IS__TUNIT____-NEXT: store i32 0, i32* [[ARG]], align 8 ; IS__TUNIT____-NEXT: store i32 0, i32* [[ARG]], align 8
; IS__TUNIT____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double* ; IS__TUNIT____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double*
; IS__TUNIT____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8 ; IS__TUNIT____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@different_size2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@different_size2
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) [[ATTR4]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) [[ATTR4]] {
; IS__CGSCC____-NEXT: store i32 0, i32* [[ARG]], align 8 ; IS__CGSCC____-NEXT: store i32 0, i32* [[ARG]], align 8
; IS__CGSCC____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double* ; IS__CGSCC____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double*
; IS__CGSCC____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8 ; IS__CGSCC____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
store i32 0, i32* %arg store i32 0, i32* %arg
%arg-cast = bitcast i32* %arg to double* %arg-cast = bitcast i32* %arg to double*
store double 0.000000e+00, double* %arg-cast store double 0.000000e+00, double* %arg-cast
▲ Show 20 Lines • Show All 152 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/dereferenceable-2.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; Determine dereference-ability before unused loads get deleted: ; Determine dereference-ability before unused loads get deleted:
; https://bugs.llvm.org/show_bug.cgi?id=21780 ; https://bugs.llvm.org/show_bug.cgi?id=21780
define <4 x double> @PR21780(double* %ptr) { define <4 x double> @PR21780(double* %ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@PR21780 ; IS__TUNIT____-LABEL: define {{[^@]+}}@PR21780
; IS__TUNIT____-SAME: (double* nocapture nofree nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) [[ATTR0:#.*]] { ; IS__TUNIT____-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) [[ATTR0:#.*]] {
; IS__TUNIT____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 1 ; IS__TUNIT____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 1
; IS__TUNIT____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 2 ; IS__TUNIT____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 2
; IS__TUNIT____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3 ; IS__TUNIT____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3
; IS__TUNIT____-NEXT: [[T0:%.*]] = load double, double* [[PTR]], align 8 ; IS__TUNIT____-NEXT: [[T0:%.*]] = load double, double* [[PTR]], align 8
; IS__TUNIT____-NEXT: [[T1:%.*]] = load double, double* [[ARRAYIDX1]], align 8 ; IS__TUNIT____-NEXT: [[T1:%.*]] = load double, double* [[ARRAYIDX1]], align 8
; IS__TUNIT____-NEXT: [[T2:%.*]] = load double, double* [[ARRAYIDX2]], align 8 ; IS__TUNIT____-NEXT: [[T2:%.*]] = load double, double* [[ARRAYIDX2]], align 8
; IS__TUNIT____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8 ; IS__TUNIT____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__TUNIT____-NEXT: [[VECINIT0:%.*]] = insertelement <4 x double> undef, double [[T0]], i32 0 ; IS__TUNIT____-NEXT: [[VECINIT0:%.*]] = insertelement <4 x double> undef, double [[T0]], i32 0
; IS__TUNIT____-NEXT: [[VECINIT1:%.*]] = insertelement <4 x double> [[VECINIT0]], double [[T1]], i32 1 ; IS__TUNIT____-NEXT: [[VECINIT1:%.*]] = insertelement <4 x double> [[VECINIT0]], double [[T1]], i32 1
; IS__TUNIT____-NEXT: [[VECINIT2:%.*]] = insertelement <4 x double> [[VECINIT1]], double [[T2]], i32 2 ; IS__TUNIT____-NEXT: [[VECINIT2:%.*]] = insertelement <4 x double> [[VECINIT1]], double [[T2]], i32 2
; IS__TUNIT____-NEXT: [[VECINIT3:%.*]] = insertelement <4 x double> [[VECINIT2]], double [[T3]], i32 3 ; IS__TUNIT____-NEXT: [[VECINIT3:%.*]] = insertelement <4 x double> [[VECINIT2]], double [[T3]], i32 3
; IS__TUNIT____-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x double> [[VECINIT3]], <4 x double> [[VECINIT3]], <4 x i32> <i32 0, i32 0, i32 2, i32 2> ; IS__TUNIT____-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x double> [[VECINIT3]], <4 x double> [[VECINIT3]], <4 x i32> <i32 0, i32 0, i32 2, i32 2>
; IS__TUNIT____-NEXT: ret <4 x double> [[SHUFFLE]] ; IS__TUNIT____-NEXT: ret <4 x double> [[SHUFFLE]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@PR21780 ; IS__CGSCC____-LABEL: define {{[^@]+}}@PR21780
; IS__CGSCC____-SAME: (double* nocapture nofree nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) [[ATTR0:#.*]] { ; IS__CGSCC____-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) [[ATTR0:#.*]] {
; IS__CGSCC____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 1 ; IS__CGSCC____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 1
; IS__CGSCC____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 2 ; IS__CGSCC____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 2
; IS__CGSCC____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3 ; IS__CGSCC____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3
; IS__CGSCC____-NEXT: [[T0:%.*]] = load double, double* [[PTR]], align 8 ; IS__CGSCC____-NEXT: [[T0:%.*]] = load double, double* [[PTR]], align 8
; IS__CGSCC____-NEXT: [[T1:%.*]] = load double, double* [[ARRAYIDX1]], align 8 ; IS__CGSCC____-NEXT: [[T1:%.*]] = load double, double* [[ARRAYIDX1]], align 8
; IS__CGSCC____-NEXT: [[T2:%.*]] = load double, double* [[ARRAYIDX2]], align 8 ; IS__CGSCC____-NEXT: [[T2:%.*]] = load double, double* [[ARRAYIDX2]], align 8
; IS__CGSCC____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8 ; IS__CGSCC____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__CGSCC____-NEXT: [[VECINIT0:%.*]] = insertelement <4 x double> undef, double [[T0]], i32 0 ; IS__CGSCC____-NEXT: [[VECINIT0:%.*]] = insertelement <4 x double> undef, double [[T0]], i32 0
▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines;
%arrayidx3 = getelementptr double, double* %ptr, i64 3 %arrayidx3 = getelementptr double, double* %ptr, i64 3
%t3 = load double, double* %arrayidx3, align 8 %t3 = load double, double* %arrayidx3, align 8
ret double %t3 ret double %t3
} }
define double @PR21780_without_inbounds(double* %ptr) { define double @PR21780_without_inbounds(double* %ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@PR21780_without_inbounds ; IS__TUNIT____-LABEL: define {{[^@]+}}@PR21780_without_inbounds
; IS__TUNIT____-SAME: (double* nocapture nofree nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) [[ATTR0]] { ; IS__TUNIT____-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) [[ATTR0]] {
; IS__TUNIT____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3 ; IS__TUNIT____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3
; IS__TUNIT____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8 ; IS__TUNIT____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__TUNIT____-NEXT: ret double [[T3]] ; IS__TUNIT____-NEXT: ret double [[T3]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@PR21780_without_inbounds ; IS__CGSCC____-LABEL: define {{[^@]+}}@PR21780_without_inbounds
; IS__CGSCC____-SAME: (double* nocapture nofree nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) [[ATTR0]] { ; IS__CGSCC____-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) [[ATTR0]] {
; IS__CGSCC____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3 ; IS__CGSCC____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3
; IS__CGSCC____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8 ; IS__CGSCC____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__CGSCC____-NEXT: ret double [[T3]] ; IS__CGSCC____-NEXT: ret double [[T3]]
; ;
%arrayidx1 = getelementptr double, double* %ptr, i64 1 %arrayidx1 = getelementptr double, double* %ptr, i64 1
%arrayidx2 = getelementptr double, double* %ptr, i64 2 %arrayidx2 = getelementptr double, double* %ptr, i64 2
%arrayidx3 = getelementptr double, double* %ptr, i64 3 %arrayidx3 = getelementptr double, double* %ptr, i64 3
%t0 = load double, double* %ptr, align 8 %t0 = load double, double* %ptr, align 8
%t1 = load double, double* %arrayidx1, align 8 %t1 = load double, double* %arrayidx1, align 8
%t2 = load double, double* %arrayidx2, align 8 %t2 = load double, double* %arrayidx2, align 8
%t3 = load double, double* %arrayidx3, align 8 %t3 = load double, double* %arrayidx3, align 8
ret double %t3 ret double %t3
} }
; Unsimplified, but still valid. Also, throw in some bogus arguments. ; Unsimplified, but still valid. Also, throw in some bogus arguments.
define void @gep0(i8* %unused, i8* %other, i8* %ptr) { define void @gep0(i8* %unused, i8* %other, i8* %ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@gep0 ; IS__TUNIT____-LABEL: define {{[^@]+}}@gep0
; IS__TUNIT____-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree nonnull writeonly dereferenceable(1) [[OTHER:%.*]], i8* nocapture nofree nonnull readonly dereferenceable(3) [[PTR:%.*]]) [[ATTR1:#.*]] { ; IS__TUNIT____-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree noundef nonnull writeonly dereferenceable(1) [[OTHER:%.*]], i8* nocapture nofree nonnull readonly dereferenceable(3) [[PTR:%.*]]) [[ATTR1:#.*]] {
; IS__TUNIT____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr i8, i8* [[PTR]], i64 2 ; IS__TUNIT____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr i8, i8* [[PTR]], i64 2
; IS__TUNIT____-NEXT: [[T2:%.*]] = load i8, i8* [[ARRAYIDX2]], align 1 ; IS__TUNIT____-NEXT: [[T2:%.*]] = load i8, i8* [[ARRAYIDX2]], align 1
; IS__TUNIT____-NEXT: store i8 [[T2]], i8* [[OTHER]], align 1 ; IS__TUNIT____-NEXT: store i8 [[T2]], i8* [[OTHER]], align 1
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@gep0 ; IS__CGSCC____-LABEL: define {{[^@]+}}@gep0
; IS__CGSCC____-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree nonnull writeonly dereferenceable(1) [[OTHER:%.*]], i8* nocapture nofree nonnull readonly dereferenceable(3) [[PTR:%.*]]) [[ATTR1:#.*]] { ; IS__CGSCC____-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree noundef nonnull writeonly dereferenceable(1) [[OTHER:%.*]], i8* nocapture nofree nonnull readonly dereferenceable(3) [[PTR:%.*]]) [[ATTR1:#.*]] {
; IS__CGSCC____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr i8, i8* [[PTR]], i64 2 ; IS__CGSCC____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr i8, i8* [[PTR]], i64 2
; IS__CGSCC____-NEXT: [[T2:%.*]] = load i8, i8* [[ARRAYIDX2]], align 1 ; IS__CGSCC____-NEXT: [[T2:%.*]] = load i8, i8* [[ARRAYIDX2]], align 1
; IS__CGSCC____-NEXT: store i8 [[T2]], i8* [[OTHER]], align 1 ; IS__CGSCC____-NEXT: store i8 [[T2]], i8* [[OTHER]], align 1
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx0 = getelementptr i8, i8* %ptr, i64 0 %arrayidx0 = getelementptr i8, i8* %ptr, i64 0
%arrayidx1 = getelementptr i8, i8* %ptr, i64 1 %arrayidx1 = getelementptr i8, i8* %ptr, i64 1
%arrayidx2 = getelementptr i8, i8* %ptr, i64 2 %arrayidx2 = getelementptr i8, i8* %ptr, i64 2
▲ Show 20 Lines • Show All 492 Lines • ▼ Show 20 Lines;
%t1 = load float, float* %arrayidx0 %t1 = load float, float* %arrayidx0
store float 2.0, float* %arrayidx1 store float 2.0, float* %arrayidx1
ret void ret void
} }
define void @different_size1(i32* %arg) { define void @different_size1(i32* %arg) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@different_size1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@different_size1
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) [[ATTR4]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) [[ATTR4]] {
; IS__TUNIT____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double* ; IS__TUNIT____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double*
; IS__TUNIT____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8 ; IS__TUNIT____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8
; IS__TUNIT____-NEXT: store i32 0, i32* [[ARG]], align 8 ; IS__TUNIT____-NEXT: store i32 0, i32* [[ARG]], align 8
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@different_size1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@different_size1
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) [[ATTR4]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) [[ATTR4]] {
; IS__CGSCC____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double* ; IS__CGSCC____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double*
; IS__CGSCC____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8 ; IS__CGSCC____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8
; IS__CGSCC____-NEXT: store i32 0, i32* [[ARG]], align 8 ; IS__CGSCC____-NEXT: store i32 0, i32* [[ARG]], align 8
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
%arg-cast = bitcast i32* %arg to double* %arg-cast = bitcast i32* %arg to double*
store double 0.000000e+00, double* %arg-cast store double 0.000000e+00, double* %arg-cast
store i32 0, i32* %arg store i32 0, i32* %arg
ret void ret void
} }
define void @different_size2(i32* %arg) { define void @different_size2(i32* %arg) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@different_size2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@different_size2
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) [[ATTR4]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) [[ATTR4]] {
; IS__TUNIT____-NEXT: store i32 0, i32* [[ARG]], align 8 ; IS__TUNIT____-NEXT: store i32 0, i32* [[ARG]], align 8
; IS__TUNIT____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double* ; IS__TUNIT____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double*
; IS__TUNIT____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8 ; IS__TUNIT____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@different_size2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@different_size2
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) [[ATTR4]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) [[ATTR4]] {
; IS__CGSCC____-NEXT: store i32 0, i32* [[ARG]], align 8 ; IS__CGSCC____-NEXT: store i32 0, i32* [[ARG]], align 8
; IS__CGSCC____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double* ; IS__CGSCC____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double*
; IS__CGSCC____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8 ; IS__CGSCC____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
store i32 0, i32* %arg store i32 0, i32* %arg
%arg-cast = bitcast i32* %arg to double* %arg-cast = bitcast i32* %arg to double*
store double 0.000000e+00, double* %arg-cast store double 0.000000e+00, double* %arg-cast
▲ Show 20 Lines • Show All 152 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/heap_to_stack.ll

Show First 20 Lines • Show All 309 Lines • ▼ Show 20 Lines
; TEST 8 - Negative: bitcast pointer used in capture function ; TEST 8 - Negative: bitcast pointer used in capture function
define void @test8() { define void @test8() {
; CHECK-LABEL: define {{[^@]+}}@test8() { ; CHECK-LABEL: define {{[^@]+}}@test8() {
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
; CHECK-NEXT: store i32 10, i32* [[TMP2]], align 4 ; CHECK-NEXT: store i32 10, i32* [[TMP2]], align 4
; CHECK-NEXT: tail call void @foo(i32* align 4 [[TMP2]]) ; CHECK-NEXT: tail call void @foo(i32* noundef align 4 [[TMP2]])
; CHECK-NEXT: tail call void @free(i8* nocapture nonnull align 4 dereferenceable(4) [[TMP1]]) ; CHECK-NEXT: tail call void @free(i8* nocapture noundef nonnull align 4 dereferenceable(4) [[TMP1]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
%2 = bitcast i8* %1 to i32* %2 = bitcast i8* %1 to i32*
store i32 10, i32* %2 store i32 10, i32* %2
%3 = load i32, i32* %2 %3 = load i32, i32* %2
tail call void @foo(i32* %2) tail call void @foo(i32* %2)
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret void ret void
} }
; TEST 9 - FIXME: malloc should be converted. ; TEST 9 - FIXME: malloc should be converted.
define void @test9() { define void @test9() {
; IS________OPM-LABEL: define {{[^@]+}}@test9() { ; IS________OPM-LABEL: define {{[^@]+}}@test9() {
; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4) ; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; IS________OPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; IS________OPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; IS________OPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* ; IS________OPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
; IS________OPM-NEXT: store i32 10, i32* [[TMP2]], align 4 ; IS________OPM-NEXT: store i32 10, i32* [[TMP2]], align 4
; IS________OPM-NEXT: tail call void @foo_nounw(i32* nofree align 4 [[TMP2]]) [[ATTR5:#.*]] ; IS________OPM-NEXT: tail call void @foo_nounw(i32* nofree noundef align 4 [[TMP2]]) [[ATTR5:#.*]]
; IS________OPM-NEXT: tail call void @free(i8* nocapture nonnull align 4 dereferenceable(4) [[TMP1]]) ; IS________OPM-NEXT: tail call void @free(i8* nocapture noundef nonnull align 4 dereferenceable(4) [[TMP1]])
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM-LABEL: define {{[^@]+}}@test9() { ; IS________NPM-LABEL: define {{[^@]+}}@test9() {
; IS________NPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4) ; IS________NPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; IS________NPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; IS________NPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; IS________NPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* ; IS________NPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
; IS________NPM-NEXT: store i32 10, i32* [[TMP2]], align 4 ; IS________NPM-NEXT: store i32 10, i32* [[TMP2]], align 4
; IS________NPM-NEXT: tail call void @foo_nounw(i32* nofree align 4 [[TMP2]]) [[ATTR6:#.*]] ; IS________NPM-NEXT: tail call void @foo_nounw(i32* nofree noundef align 4 [[TMP2]]) [[ATTR6:#.*]]
; IS________NPM-NEXT: tail call void @free(i8* nocapture nonnull align 4 dereferenceable(4) [[TMP1]]) ; IS________NPM-NEXT: tail call void @free(i8* nocapture noundef nonnull align 4 dereferenceable(4) [[TMP1]])
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
%2 = bitcast i8* %1 to i32* %2 = bitcast i8* %1 to i32*
store i32 10, i32* %2 store i32 10, i32* %2
%3 = load i32, i32* %2 %3 = load i32, i32* %2
tail call void @foo_nounw(i32* %2) tail call void @foo_nounw(i32* %2)
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret void ret void
} }
; TEST 10 - 1 malloc, 1 free ; TEST 10 - 1 malloc, 1 free
define i32 @test10() { define i32 @test10() {
; IS________OPM-LABEL: define {{[^@]+}}@test10() { ; IS________OPM-LABEL: define {{[^@]+}}@test10() {
; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4) ; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; IS________OPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; IS________OPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; IS________OPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* ; IS________OPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
; IS________OPM-NEXT: store i32 10, i32* [[TMP2]], align 4 ; IS________OPM-NEXT: store i32 10, i32* [[TMP2]], align 4
; IS________OPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 ; IS________OPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture nonnull align 4 dereferenceable(4) [[TMP1]]) ; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture noundef nonnull align 4 dereferenceable(4) [[TMP1]])
; IS________OPM-NEXT: ret i32 [[TMP3]] ; IS________OPM-NEXT: ret i32 [[TMP3]]
; ;
; IS________NPM-LABEL: define {{[^@]+}}@test10() { ; IS________NPM-LABEL: define {{[^@]+}}@test10() {
; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 4, align 1
; IS________NPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; IS________NPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; IS________NPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* ; IS________NPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
; IS________NPM-NEXT: store i32 10, i32* [[TMP2]], align 4 ; IS________NPM-NEXT: store i32 10, i32* [[TMP2]], align 4
; IS________NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 ; IS________NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
; IS________NPM-NEXT: ret i32 [[TMP3]] ; IS________NPM-NEXT: ret i32 [[TMP3]]
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
%2 = bitcast i8* %1 to i32* %2 = bitcast i8* %1 to i32*
store i32 10, i32* %2 store i32 10, i32* %2
%3 = load i32, i32* %2 %3 = load i32, i32* %2
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret i32 %3 ret i32 %3
} }
define i32 @test_lifetime() { define i32 @test_lifetime() {
; IS________OPM-LABEL: define {{[^@]+}}@test_lifetime() { ; IS________OPM-LABEL: define {{[^@]+}}@test_lifetime() {
; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4) ; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; IS________OPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; IS________OPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; IS________OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* noalias nocapture nofree nonnull align 4 dereferenceable(4) [[TMP1]]) ; IS________OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* noalias nocapture nofree noundef nonnull align 4 dereferenceable(4) [[TMP1]])
; IS________OPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* ; IS________OPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
; IS________OPM-NEXT: store i32 10, i32* [[TMP2]], align 4 ; IS________OPM-NEXT: store i32 10, i32* [[TMP2]], align 4
; IS________OPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 ; IS________OPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture nonnull align 4 dereferenceable(4) [[TMP1]]) ; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture noundef nonnull align 4 dereferenceable(4) [[TMP1]])
; IS________OPM-NEXT: ret i32 [[TMP3]] ; IS________OPM-NEXT: ret i32 [[TMP3]]
; ;
; IS________NPM-LABEL: define {{[^@]+}}@test_lifetime() { ; IS________NPM-LABEL: define {{[^@]+}}@test_lifetime() {
; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 4, align 1
; IS________NPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; IS________NPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; IS________NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* noalias nocapture nofree nonnull align 4 dereferenceable(4) [[TMP1]]) ; IS________NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* noalias nocapture nofree noundef nonnull align 4 dereferenceable(4) [[TMP1]])
; IS________NPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* ; IS________NPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
; IS________NPM-NEXT: store i32 10, i32* [[TMP2]], align 4 ; IS________NPM-NEXT: store i32 10, i32* [[TMP2]], align 4
; IS________NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 ; IS________NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
; IS________NPM-NEXT: ret i32 [[TMP3]] ; IS________NPM-NEXT: ret i32 [[TMP3]]
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) call void @llvm.lifetime.start.p0i8(i64 4, i8* %1)
▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Lines
; IS________OPM-NEXT: br label [[TMP13]] ; IS________OPM-NEXT: br label [[TMP13]]
; IS________OPM: 13: ; IS________OPM: 13:
; IS________OPM-NEXT: [[DOT1:%.*]] = phi i32 [ [[TMP6]], [[TMP5]] ], [ [[DOT0]], [[TMP12]] ] ; IS________OPM-NEXT: [[DOT1:%.*]] = phi i32 [ [[TMP6]], [[TMP5]] ], [ [[DOT0]], [[TMP12]] ]
; IS________OPM-NEXT: [[TMP14]] = add nsw i32 [[DOT1]], 1 ; IS________OPM-NEXT: [[TMP14]] = add nsw i32 [[DOT1]], 1
; IS________OPM-NEXT: br label [[TMP8]] ; IS________OPM-NEXT: br label [[TMP8]]
; IS________OPM: 15: ; IS________OPM: 15:
; IS________OPM-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP3]], align 4 ; IS________OPM-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP3]], align 4
; IS________OPM-NEXT: [[TMP17:%.*]] = bitcast i32* [[TMP3]] to i8* ; IS________OPM-NEXT: [[TMP17:%.*]] = bitcast i32* [[TMP3]] to i8*
; IS________OPM-NEXT: call void @free(i8* nocapture [[TMP17]]) ; IS________OPM-NEXT: call void @free(i8* nocapture noundef [[TMP17]])
; IS________OPM-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP3]], align 4 ; IS________OPM-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP3]], align 4
; IS________OPM-NEXT: ret i32 [[TMP18]] ; IS________OPM-NEXT: ret i32 [[TMP18]]
; ;
; IS________NPM-LABEL: define {{[^@]+}}@irreducible_cfg ; IS________NPM-LABEL: define {{[^@]+}}@irreducible_cfg
; IS________NPM-SAME: (i32 [[TMP0:%.*]]) { ; IS________NPM-SAME: (i32 [[TMP0:%.*]]) {
; IS________NPM-NEXT: [[TMP2:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP2:%.*]] = alloca i8, i64 4, align 1
; IS________NPM-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i32* ; IS________NPM-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i32*
; IS________NPM-NEXT: store i32 10, i32* [[TMP3]], align 4 ; IS________NPM-NEXT: store i32 10, i32* [[TMP3]], align 4
▲ Show 20 Lines • Show All 126 Lines • ▼ Show 20 Lines
; Malloc/Calloc too large ; Malloc/Calloc too large
define i32 @test13() { define i32 @test13() {
; CHECK-LABEL: define {{[^@]+}}@test13() { ; CHECK-LABEL: define {{[^@]+}}@test13() {
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 256) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 256)
; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
; CHECK-NEXT: store i32 10, i32* [[TMP2]], align 4 ; CHECK-NEXT: store i32 10, i32* [[TMP2]], align 4
; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
; CHECK-NEXT: tail call void @free(i8* noalias nocapture nonnull align 4 dereferenceable(4) [[TMP1]]) ; CHECK-NEXT: tail call void @free(i8* noalias nocapture noundef nonnull align 4 dereferenceable(4) [[TMP1]])
; CHECK-NEXT: ret i32 [[TMP3]] ; CHECK-NEXT: ret i32 [[TMP3]]
; ;
%1 = tail call noalias i8* @malloc(i64 256) %1 = tail call noalias i8* @malloc(i64 256)
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
%2 = bitcast i8* %1 to i32* %2 = bitcast i8* %1 to i32*
store i32 10, i32* %2 store i32 10, i32* %2
%3 = load i32, i32* %2 %3 = load i32, i32* %2
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret i32 %3 ret i32 %3
} }
define i32 @test_sle() { define i32 @test_sle() {
; CHECK-LABEL: define {{[^@]+}}@test_sle() { ; CHECK-LABEL: define {{[^@]+}}@test_sle() {
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef -1) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef -1)
; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
; CHECK-NEXT: store i32 10, i32* [[TMP2]], align 4 ; CHECK-NEXT: store i32 10, i32* [[TMP2]], align 4
; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
; CHECK-NEXT: tail call void @free(i8* noalias nocapture nonnull align 4 dereferenceable(4) [[TMP1]]) ; CHECK-NEXT: tail call void @free(i8* noalias nocapture noundef nonnull align 4 dereferenceable(4) [[TMP1]])
; CHECK-NEXT: ret i32 [[TMP3]] ; CHECK-NEXT: ret i32 [[TMP3]]
; ;
%1 = tail call noalias i8* @malloc(i64 -1) %1 = tail call noalias i8* @malloc(i64 -1)
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
%2 = bitcast i8* %1 to i32* %2 = bitcast i8* %1 to i32*
store i32 10, i32* %2 store i32 10, i32* %2
%3 = load i32, i32* %2 %3 = load i32, i32* %2
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret i32 %3 ret i32 %3
} }
define i32 @test_overflow() { define i32 @test_overflow() {
; CHECK-LABEL: define {{[^@]+}}@test_overflow() { ; CHECK-LABEL: define {{[^@]+}}@test_overflow() {
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @calloc(i64 noundef 65537, i64 noundef 65537) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @calloc(i64 noundef 65537, i64 noundef 65537)
; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
; CHECK-NEXT: store i32 10, i32* [[TMP2]], align 4 ; CHECK-NEXT: store i32 10, i32* [[TMP2]], align 4
; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
; CHECK-NEXT: tail call void @free(i8* noalias nocapture nonnull align 4 dereferenceable(4) [[TMP1]]) ; CHECK-NEXT: tail call void @free(i8* noalias nocapture noundef nonnull align 4 dereferenceable(4) [[TMP1]])
; CHECK-NEXT: ret i32 [[TMP3]] ; CHECK-NEXT: ret i32 [[TMP3]]
; ;
%1 = tail call noalias i8* @calloc(i64 65537, i64 65537) %1 = tail call noalias i8* @calloc(i64 65537, i64 65537)
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
%2 = bitcast i8* %1 to i32* %2 = bitcast i8* %1 to i32*
store i32 10, i32* %2 store i32 10, i32* %2
%3 = load i32, i32* %2 %3 = load i32, i32* %2
tail call void @free(i8* %1) tail call void @free(i8* %1)
Show All 27 Lines;
ret void ret void
} }
define void @test16a(i8 %v, i8** %P) { define void @test16a(i8 %v, i8** %P) {
; IS________OPM-LABEL: define {{[^@]+}}@test16a ; IS________OPM-LABEL: define {{[^@]+}}@test16a
; IS________OPM-SAME: (i8 [[V:%.*]], i8** nocapture nofree readnone [[P:%.*]]) { ; IS________OPM-SAME: (i8 [[V:%.*]], i8** nocapture nofree readnone [[P:%.*]]) {
; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4) ; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; IS________OPM-NEXT: store i8 [[V]], i8* [[TMP1]], align 1 ; IS________OPM-NEXT: store i8 [[V]], i8* [[TMP1]], align 1
; IS________OPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree nonnull dereferenceable(1) [[TMP1]]) ; IS________OPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree noundef nonnull dereferenceable(1) [[TMP1]])
; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture nonnull dereferenceable(1) [[TMP1]]) ; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture noundef nonnull dereferenceable(1) [[TMP1]])
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM-LABEL: define {{[^@]+}}@test16a ; IS________NPM-LABEL: define {{[^@]+}}@test16a
; IS________NPM-SAME: (i8 [[V:%.*]], i8** nocapture nofree readnone [[P:%.*]]) { ; IS________NPM-SAME: (i8 [[V:%.*]], i8** nocapture nofree readnone [[P:%.*]]) {
; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 4, align 1
; IS________NPM-NEXT: store i8 [[V]], i8* [[TMP1]], align 1 ; IS________NPM-NEXT: store i8 [[V]], i8* [[TMP1]], align 1
; IS________NPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree nonnull dereferenceable(1) [[TMP1]]) ; IS________NPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree noundef nonnull dereferenceable(1) [[TMP1]])
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
store i8 %v, i8* %1 store i8 %v, i8* %1
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
tail call void @free(i8* nonnull dereferenceable(1) %1) tail call void @free(i8* nonnull dereferenceable(1) %1)
ret void ret void
} }
▲ Show 20 Lines • Show All 51 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/internal-noalias.ll

Show All 10 Lines
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32 @noalias_args(i32* noalias nocapture nofree readonly align 4 [[A]], i32* noalias nocapture nofree readonly align 4 [[B]]) [[ATTR3:#.*]] ; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32 @noalias_args(i32* noalias nocapture nofree readonly align 4 [[A]], i32* noalias nocapture nofree readonly align 4 [[B]]) [[ATTR3:#.*]]
; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32 @noalias_args_argmem(i32* noalias nocapture nofree readonly align 4 [[A]], i32* noalias nocapture nofree readonly align 4 [[B]]) [[ATTR3]] ; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32 @noalias_args_argmem(i32* noalias nocapture nofree readonly align 4 [[A]], i32* noalias nocapture nofree readonly align 4 [[B]]) [[ATTR3]]
; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL1]], [[CALL2]] ; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL1]], [[CALL2]]
; IS__TUNIT____-NEXT: ret i32 [[ADD]] ; IS__TUNIT____-NEXT: ret i32 [[ADD]]
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@visible ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@visible
; IS__CGSCC_OPM-SAME: (i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A:%.*]], i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[B:%.*]]) [[ATTR0:#.*]] { ; IS__CGSCC_OPM-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B:%.*]]) [[ATTR0:#.*]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL1:%.*]] = call i32 @noalias_args(i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR3:#.*]] ; IS__CGSCC_OPM-NEXT: [[CALL1:%.*]] = call i32 @noalias_args(i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR3:#.*]]
; IS__CGSCC_OPM-NEXT: [[CALL2:%.*]] = call i32 @noalias_args_argmem(i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR3]] ; IS__CGSCC_OPM-NEXT: [[CALL2:%.*]] = call i32 @noalias_args_argmem(i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR3]]
; IS__CGSCC_OPM-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL1]], [[CALL2]] ; IS__CGSCC_OPM-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL1]], [[CALL2]]
; IS__CGSCC_OPM-NEXT: ret i32 [[ADD]] ; IS__CGSCC_OPM-NEXT: ret i32 [[ADD]]
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@visible ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@visible
; IS__CGSCC_NPM-SAME: (i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A:%.*]], i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[B:%.*]]) [[ATTR0:#.*]] { ; IS__CGSCC_NPM-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B:%.*]]) [[ATTR0:#.*]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CALL1:%.*]] = call i32 @noalias_args(i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR4:#.*]] ; IS__CGSCC_NPM-NEXT: [[CALL1:%.*]] = call i32 @noalias_args(i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR4:#.*]]
; IS__CGSCC_NPM-NEXT: [[CALL2:%.*]] = call i32 @noalias_args_argmem(i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR4]] ; IS__CGSCC_NPM-NEXT: [[CALL2:%.*]] = call i32 @noalias_args_argmem(i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR4]]
; IS__CGSCC_NPM-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL1]], [[CALL2]] ; IS__CGSCC_NPM-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL1]], [[CALL2]]
; IS__CGSCC_NPM-NEXT: ret i32 [[ADD]] ; IS__CGSCC_NPM-NEXT: ret i32 [[ADD]]
; ;
entry: entry:
%call1 = call i32 @noalias_args(i32* %A, i32* %B) %call1 = call i32 @noalias_args(i32* %A, i32* %B)
%call2 = call i32 @noalias_args_argmem(i32* %A, i32* %B) %call2 = call i32 @noalias_args_argmem(i32* %A, i32* %B)
%add = add nsw i32 %call1, %call2 %add = add nsw i32 %call1, %call2
ret i32 %add ret i32 %add
} }
define private i32 @noalias_args(i32* %A, i32* %B) #0 { define private i32 @noalias_args(i32* %A, i32* %B) #0 {
; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind readonly uwtable willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind readonly uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@noalias_args ; IS__TUNIT____-LABEL: define {{[^@]+}}@noalias_args
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A:%.*]], i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[B:%.*]]) [[ATTR0]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B:%.*]]) [[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 ; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* [[B]], align 4 ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* [[B]], align 4
; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] ; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32 @noalias_args_argmem(i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR3]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32 @noalias_args_argmem(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR3]]
; IS__TUNIT____-NEXT: [[ADD2:%.*]] = add nsw i32 [[ADD]], [[CALL]] ; IS__TUNIT____-NEXT: [[ADD2:%.*]] = add nsw i32 [[ADD]], [[CALL]]
; IS__TUNIT____-NEXT: ret i32 [[ADD2]] ; IS__TUNIT____-NEXT: ret i32 [[ADD2]]
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@noalias_args ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@noalias_args
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A:%.*]], i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[B:%.*]]) [[ATTR0]] { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B:%.*]]) [[ATTR0]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[B]], align 4 ; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[B]], align 4
; IS__CGSCC_OPM-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] ; IS__CGSCC_OPM-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32 @noalias_args_argmem(i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR4:#.*]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32 @noalias_args_argmem(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR4:#.*]]
; IS__CGSCC_OPM-NEXT: [[ADD2:%.*]] = add nsw i32 [[ADD]], [[CALL]] ; IS__CGSCC_OPM-NEXT: [[ADD2:%.*]] = add nsw i32 [[ADD]], [[CALL]]
; IS__CGSCC_OPM-NEXT: ret i32 [[ADD2]] ; IS__CGSCC_OPM-NEXT: ret i32 [[ADD2]]
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@noalias_args ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@noalias_args
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A:%.*]], i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[B:%.*]]) [[ATTR0]] { ; IS__CGSCC_NPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B:%.*]]) [[ATTR0]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[B]], align 4 ; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[B]], align 4
; IS__CGSCC_NPM-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] ; IS__CGSCC_NPM-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32 @noalias_args_argmem(i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR5:#.*]] ; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32 @noalias_args_argmem(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR5:#.*]]
; IS__CGSCC_NPM-NEXT: [[ADD2:%.*]] = add nsw i32 [[ADD]], [[CALL]] ; IS__CGSCC_NPM-NEXT: [[ADD2:%.*]] = add nsw i32 [[ADD]], [[CALL]]
; IS__CGSCC_NPM-NEXT: ret i32 [[ADD2]] ; IS__CGSCC_NPM-NEXT: ret i32 [[ADD2]]
; ;
entry: entry:
%0 = load i32, i32* %A, align 4 %0 = load i32, i32* %A, align 4
%1 = load i32, i32* %B, align 4 %1 = load i32, i32* %B, align 4
%add = add nsw i32 %0, %1 %add = add nsw i32 %0, %1
%call = call i32 @noalias_args_argmem(i32* %A, i32* %B) %call = call i32 @noalias_args_argmem(i32* %A, i32* %B)
%add2 = add nsw i32 %add, %call %add2 = add nsw i32 %add, %call
ret i32 %add2 ret i32 %add2
} }
define internal i32 @noalias_args_argmem(i32* %A, i32* %B) #1 { define internal i32 @noalias_args_argmem(i32* %A, i32* %B) #1 {
; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind readonly uwtable willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind readonly uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@noalias_args_argmem ; IS__TUNIT____-LABEL: define {{[^@]+}}@noalias_args_argmem
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A:%.*]], i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[B:%.*]]) [[ATTR0]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B:%.*]]) [[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 ; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* [[B]], align 4 ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* [[B]], align 4
; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] ; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
; IS__TUNIT____-NEXT: ret i32 [[ADD]] ; IS__TUNIT____-NEXT: ret i32 [[ADD]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@noalias_args_argmem ; IS__CGSCC____-LABEL: define {{[^@]+}}@noalias_args_argmem
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A:%.*]], i32* noalias nocapture nofree nonnull readonly align 4 dereferenceable(4) [[B:%.*]]) [[ATTR0:#.*]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B:%.*]]) [[ATTR0:#.*]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 ; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* [[B]], align 4 ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* [[B]], align 4
; IS__CGSCC____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] ; IS__CGSCC____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
; IS__CGSCC____-NEXT: ret i32 [[ADD]] ; IS__CGSCC____-NEXT: ret i32 [[ADD]]
; ;
entry: entry:
%0 = load i32, i32* %A, align 4 %0 = load i32, i32* %A, align 4
Show All 11 Lines
; IS__TUNIT____-NEXT: store i32 5, i32* [[B]], align 4 ; IS__TUNIT____-NEXT: store i32 5, i32* [[B]], align 4
; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32 @noalias_args(i32* nocapture nofree readonly align 4 [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR3]] ; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32 @noalias_args(i32* nocapture nofree readonly align 4 [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR3]]
; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32 @noalias_args_argmem(i32* nocapture nofree readonly align 4 [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR3]] ; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32 @noalias_args_argmem(i32* nocapture nofree readonly align 4 [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR3]]
; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL1]], [[CALL2]] ; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL1]], [[CALL2]]
; IS__TUNIT____-NEXT: ret i32 [[ADD]] ; IS__TUNIT____-NEXT: ret i32 [[ADD]]
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@visible_local ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@visible_local
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A:%.*]]) [[ATTR1:#.*]] { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]]) [[ATTR1:#.*]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[B:%.*]] = alloca i32, align 4 ; IS__CGSCC_OPM-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: store i32 5, i32* [[B]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 5, i32* [[B]], align 4
; IS__CGSCC_OPM-NEXT: [[CALL1:%.*]] = call i32 @noalias_args(i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR4]] ; IS__CGSCC_OPM-NEXT: [[CALL1:%.*]] = call i32 @noalias_args(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR4]]
; IS__CGSCC_OPM-NEXT: [[CALL2:%.*]] = call i32 @noalias_args_argmem(i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR4]] ; IS__CGSCC_OPM-NEXT: [[CALL2:%.*]] = call i32 @noalias_args_argmem(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR4]]
; IS__CGSCC_OPM-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL1]], [[CALL2]] ; IS__CGSCC_OPM-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL1]], [[CALL2]]
; IS__CGSCC_OPM-NEXT: ret i32 [[ADD]] ; IS__CGSCC_OPM-NEXT: ret i32 [[ADD]]
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@visible_local ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@visible_local
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A:%.*]]) [[ATTR1:#.*]] { ; IS__CGSCC_NPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]]) [[ATTR1:#.*]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[B:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: store i32 5, i32* [[B]], align 4 ; IS__CGSCC_NPM-NEXT: store i32 5, i32* [[B]], align 4
; IS__CGSCC_NPM-NEXT: [[CALL1:%.*]] = call i32 @noalias_args(i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR5]] ; IS__CGSCC_NPM-NEXT: [[CALL1:%.*]] = call i32 @noalias_args(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR5]]
; IS__CGSCC_NPM-NEXT: [[CALL2:%.*]] = call i32 @noalias_args_argmem(i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR5]] ; IS__CGSCC_NPM-NEXT: [[CALL2:%.*]] = call i32 @noalias_args_argmem(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) [[ATTR5]]
; IS__CGSCC_NPM-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL1]], [[CALL2]] ; IS__CGSCC_NPM-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL1]], [[CALL2]]
; IS__CGSCC_NPM-NEXT: ret i32 [[ADD]] ; IS__CGSCC_NPM-NEXT: ret i32 [[ADD]]
; ;
entry: entry:
%B = alloca i32, align 4 %B = alloca i32, align 4
store i32 5, i32* %B, align 4 store i32 5, i32* %B, align 4
%call1 = call i32 @noalias_args(i32* %A, i32* nonnull %B) %call1 = call i32 @noalias_args(i32* %A, i32* nonnull %B)
%call2 = call i32 @noalias_args_argmem(i32* %A, i32* nonnull %B) %call2 = call i32 @noalias_args_argmem(i32* %A, i32* nonnull %B)
▲ Show 20 Lines • Show All 147 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/liveness.ll

Show First 20 Lines • Show All 2,259 Lines • ▼ Show 20 Lines
; IS__CGSCC____-NEXT: ret i32 123 ; IS__CGSCC____-NEXT: ret i32 123
; ;
%call2 = tail call i32 @switch_default_dead(i64 0) %call2 = tail call i32 @switch_default_dead(i64 0)
ret i32 %call2 ret i32 %call2
} }
define void @call_via_pointer_with_dead_args(i32* %a, i32* %b, void (i32*, i32*, i32*, i64, i32**)* %fp) { define void @call_via_pointer_with_dead_args(i32* %a, i32* %b, void (i32*, i32*, i32*, i64, i32**)* %fp) {
; CHECK-LABEL: define {{[^@]+}}@call_via_pointer_with_dead_args ; CHECK-LABEL: define {{[^@]+}}@call_via_pointer_with_dead_args
; CHECK-SAME: (i32* [[A:%.*]], i32* [[B:%.*]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree nonnull [[FP:%.*]]) { ; CHECK-SAME: (i32* [[A:%.*]], i32* [[B:%.*]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree noundef nonnull [[FP:%.*]]) {
; CHECK-NEXT: call void [[FP]](i32* [[A]], i32* [[B]], i32* [[A]], i64 -1, i32** null) ; CHECK-NEXT: call void [[FP]](i32* [[A]], i32* [[B]], i32* [[A]], i64 -1, i32** null)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void %fp(i32* %a, i32* %b, i32* %a, i64 -1, i32** null) call void %fp(i32* %a, i32* %b, i32* %a, i64 -1, i32** null)
ret void ret void
} }
; FIXME: We have to prevent the propagation of %fp in the new pm CGSCC pass until the CallGraphUpdater can handle the new call edge. ; FIXME: We have to prevent the propagation of %fp in the new pm CGSCC pass until the CallGraphUpdater can handle the new call edge.
define internal void @call_via_pointer_with_dead_args_internal_a(i32* %a, i32* %b, void (i32*, i32*, i32*, i64, i32**)* %fp) { define internal void @call_via_pointer_with_dead_args_internal_a(i32* %a, i32* %b, void (i32*, i32*, i32*, i64, i32**)* %fp) {
▲ Show 20 Lines • Show All 301 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/memory_locations.ll

Show First 20 Lines • Show All 170 Lines • ▼ Show 20 Lines
return: ; preds = %if.end, %if.then return: ; preds = %if.end, %if.then
%retval.0 = phi i8* [ %call, %if.then ], [ null, %if.end ] %retval.0 = phi i8* [ %call, %if.then ], [ null, %if.end ]
ret i8* %retval.0 ret i8* %retval.0
} }
define dso_local i8* @internal_argmem_only_read(i32* %arg) { define dso_local i8* @internal_argmem_only_read(i32* %arg) {
; CHECK: Function Attrs: inaccessiblemem_or_argmemonly ; CHECK: Function Attrs: inaccessiblemem_or_argmemonly
; CHECK-LABEL: define {{[^@]+}}@internal_argmem_only_read ; CHECK-LABEL: define {{[^@]+}}@internal_argmem_only_read
; CHECK-SAME: (i32* nocapture nonnull readonly align 4 dereferenceable(4) [[ARG:%.*]]) [[ATTR1:#.*]] { ; CHECK-SAME: (i32* nocapture noundef nonnull readonly align 4 dereferenceable(4) [[ARG:%.*]]) [[ATTR1:#.*]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP:%.*]] = load i32, i32* [[ARG]], align 4 ; CHECK-NEXT: [[TMP:%.*]] = load i32, i32* [[ARG]], align 4
; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP]] to i64 ; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP]] to i64
; CHECK-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 [[CONV]]) ; CHECK-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 [[CONV]])
; CHECK-NEXT: ret i8* [[CALL]] ; CHECK-NEXT: ret i8* [[CALL]]
; ;
entry: entry:
%tmp = load i32, i32* %arg, align 4 %tmp = load i32, i32* %arg, align 4
%conv = sext i32 %tmp to i64 %conv = sext i32 %tmp to i64
%call = call i8* @malloc(i64 %conv) %call = call i8* @malloc(i64 %conv)
ret i8* %call ret i8* %call
} }
define dso_local i8* @internal_argmem_only_write(i32* %arg) { define dso_local i8* @internal_argmem_only_write(i32* %arg) {
; CHECK: Function Attrs: inaccessiblemem_or_argmemonly ; CHECK: Function Attrs: inaccessiblemem_or_argmemonly
; CHECK-LABEL: define {{[^@]+}}@internal_argmem_only_write ; CHECK-LABEL: define {{[^@]+}}@internal_argmem_only_write
; CHECK-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[ARG:%.*]]) [[ATTR1]] { ; CHECK-SAME: (i32* nocapture noundef nonnull writeonly align 4 dereferenceable(4) [[ARG:%.*]]) [[ATTR1]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: store i32 10, i32* [[ARG]], align 4 ; CHECK-NEXT: store i32 10, i32* [[ARG]], align 4
; CHECK-NEXT: [[CALL:%.*]] = call noalias dereferenceable_or_null(10) i8* @malloc(i64 noundef 10) ; CHECK-NEXT: [[CALL:%.*]] = call noalias dereferenceable_or_null(10) i8* @malloc(i64 noundef 10)
; CHECK-NEXT: ret i8* [[CALL]] ; CHECK-NEXT: ret i8* [[CALL]]
; ;
entry: entry:
store i32 10, i32* %arg, align 4 store i32 10, i32* %arg, align 4
%call = call dereferenceable_or_null(10) i8* @malloc(i64 10) %call = call dereferenceable_or_null(10) i8* @malloc(i64 10)
ret i8* %call ret i8* %call
} }
define dso_local i8* @internal_argmem_only_rec(i32* %arg) { define dso_local i8* @internal_argmem_only_rec(i32* %arg) {
; IS__TUNIT____: Function Attrs: inaccessiblemem_or_argmemonly ; IS__TUNIT____: Function Attrs: inaccessiblemem_or_argmemonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@internal_argmem_only_rec ; IS__TUNIT____-LABEL: define {{[^@]+}}@internal_argmem_only_rec
; IS__TUNIT____-SAME: (i32* nocapture [[ARG:%.*]]) [[ATTR1:#.*]] { ; IS__TUNIT____-SAME: (i32* nocapture [[ARG:%.*]]) [[ATTR1:#.*]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call noalias i8* @internal_argmem_only_rec_1(i32* nocapture align 4 [[ARG]]) ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call noalias i8* @internal_argmem_only_rec_1(i32* nocapture align 4 [[ARG]])
; IS__TUNIT____-NEXT: ret i8* [[CALL]] ; IS__TUNIT____-NEXT: ret i8* [[CALL]]
; ;
; IS__CGSCC____: Function Attrs: inaccessiblemem_or_argmemonly ; IS__CGSCC____: Function Attrs: inaccessiblemem_or_argmemonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@internal_argmem_only_rec ; IS__CGSCC____-LABEL: define {{[^@]+}}@internal_argmem_only_rec
; IS__CGSCC____-SAME: (i32* nocapture nonnull align 4 dereferenceable(4) [[ARG:%.*]]) [[ATTR1:#.*]] { ; IS__CGSCC____-SAME: (i32* nocapture noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) [[ATTR1:#.*]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call noalias i8* @internal_argmem_only_rec_1(i32* nocapture nonnull align 4 dereferenceable(4) [[ARG]]) ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call noalias i8* @internal_argmem_only_rec_1(i32* nocapture noundef nonnull align 4 dereferenceable(4) [[ARG]])
; IS__CGSCC____-NEXT: ret i8* [[CALL]] ; IS__CGSCC____-NEXT: ret i8* [[CALL]]
; ;
entry: entry:
%call = call i8* @internal_argmem_only_rec_1(i32* %arg) %call = call i8* @internal_argmem_only_rec_1(i32* %arg)
ret i8* %call ret i8* %call
} }
define internal i8* @internal_argmem_only_rec_1(i32* %arg) { define internal i8* @internal_argmem_only_rec_1(i32* %arg) {
; CHECK: Function Attrs: inaccessiblemem_or_argmemonly ; IS__TUNIT____: Function Attrs: inaccessiblemem_or_argmemonly
; CHECK-LABEL: define {{[^@]+}}@internal_argmem_only_rec_1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@internal_argmem_only_rec_1
; CHECK-SAME: (i32* nocapture nonnull align 4 dereferenceable(4) [[ARG:%.*]]) [[ATTR1]] { ; IS__TUNIT____-SAME: (i32* nocapture noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) [[ATTR1]] {
; CHECK-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; CHECK-NEXT: [[TMP:%.*]] = load i32, i32* [[ARG]], align 4 ; IS__TUNIT____-NEXT: [[TMP:%.*]] = load i32, i32* [[ARG]], align 4
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP]], 0 ; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP]], 0
; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; CHECK: if.then: ; IS__TUNIT____: if.then:
; CHECK-NEXT: br label [[RETURN:%.*]] ; IS__TUNIT____-NEXT: br label [[RETURN:%.*]]
; CHECK: if.end: ; IS__TUNIT____: if.end:
; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARG]], align 4 ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARG]], align 4
; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[TMP1]], 1 ; IS__TUNIT____-NEXT: [[CMP1:%.*]] = icmp eq i32 [[TMP1]], 1
; CHECK-NEXT: br i1 [[CMP1]], label [[IF_THEN2:%.*]], label [[IF_END3:%.*]] ; IS__TUNIT____-NEXT: br i1 [[CMP1]], label [[IF_THEN2:%.*]], label [[IF_END3:%.*]]
; CHECK: if.then2: ; IS__TUNIT____: if.then2:
; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 -1 ; IS__TUNIT____-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 -1
; CHECK-NEXT: [[CALL:%.*]] = call noalias i8* @internal_argmem_only_rec_2(i32* nocapture nonnull align 4 dereferenceable(4) [[ADD_PTR]]) ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call noalias i8* @internal_argmem_only_rec_2(i32* nocapture nonnull align 4 dereferenceable(4) [[ADD_PTR]])
; CHECK-NEXT: br label [[RETURN]] ; IS__TUNIT____-NEXT: br label [[RETURN]]
; CHECK: if.end3: ; IS__TUNIT____: if.end3:
; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG]], align 4 ; IS__TUNIT____-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG]], align 4
; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP2]] to i64 ; IS__TUNIT____-NEXT: [[CONV:%.*]] = sext i32 [[TMP2]] to i64
; CHECK-NEXT: [[CALL4:%.*]] = call noalias i8* @malloc(i64 [[CONV]]) ; IS__TUNIT____-NEXT: [[CALL4:%.*]] = call noalias i8* @malloc(i64 [[CONV]])
; CHECK-NEXT: br label [[RETURN]] ; IS__TUNIT____-NEXT: br label [[RETURN]]
; CHECK: return: ; IS__TUNIT____: return:
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i8* [ null, [[IF_THEN]] ], [ [[CALL]], [[IF_THEN2]] ], [ [[CALL4]], [[IF_END3]] ] ; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i8* [ null, [[IF_THEN]] ], [ [[CALL]], [[IF_THEN2]] ], [ [[CALL4]], [[IF_END3]] ]
; CHECK-NEXT: ret i8* [[RETVAL_0]] ; IS__TUNIT____-NEXT: ret i8* [[RETVAL_0]]
;
; IS__CGSCC____: Function Attrs: inaccessiblemem_or_argmemonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@internal_argmem_only_rec_1
; IS__CGSCC____-SAME: (i32* nocapture noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) [[ATTR1]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[TMP:%.*]] = load i32, i32* [[ARG]], align 4
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP]], 0
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: br label [[RETURN:%.*]]
; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARG]], align 4
; IS__CGSCC____-NEXT: [[CMP1:%.*]] = icmp eq i32 [[TMP1]], 1
; IS__CGSCC____-NEXT: br i1 [[CMP1]], label [[IF_THEN2:%.*]], label [[IF_END3:%.*]]
; IS__CGSCC____: if.then2:
; IS__CGSCC____-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 -1
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call noalias i8* @internal_argmem_only_rec_2(i32* nocapture noundef nonnull align 4 dereferenceable(4) [[ADD_PTR]])
; IS__CGSCC____-NEXT: br label [[RETURN]]
; IS__CGSCC____: if.end3:
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG]], align 4
; IS__CGSCC____-NEXT: [[CONV:%.*]] = sext i32 [[TMP2]] to i64
; IS__CGSCC____-NEXT: [[CALL4:%.*]] = call noalias i8* @malloc(i64 [[CONV]])
; IS__CGSCC____-NEXT: br label [[RETURN]]
; IS__CGSCC____: return:
; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i8* [ null, [[IF_THEN]] ], [ [[CALL]], [[IF_THEN2]] ], [ [[CALL4]], [[IF_END3]] ]
; IS__CGSCC____-NEXT: ret i8* [[RETVAL_0]]
; ;
entry: entry:
%tmp = load i32, i32* %arg, align 4 %tmp = load i32, i32* %arg, align 4
%cmp = icmp eq i32 %tmp, 0 %cmp = icmp eq i32 %tmp, 0
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
br label %return br label %return
Show All 17 Lines
return: ; preds = %if.end3, %if.then2, %if.then return: ; preds = %if.end3, %if.then2, %if.then
%retval.0 = phi i8* [ null, %if.then ], [ %call, %if.then2 ], [ %call4, %if.end3 ] %retval.0 = phi i8* [ null, %if.then ], [ %call, %if.then2 ], [ %call4, %if.end3 ]
ret i8* %retval.0 ret i8* %retval.0
} }
define internal i8* @internal_argmem_only_rec_2(i32* %arg) { define internal i8* @internal_argmem_only_rec_2(i32* %arg) {
; CHECK: Function Attrs: inaccessiblemem_or_argmemonly ; CHECK: Function Attrs: inaccessiblemem_or_argmemonly
; CHECK-LABEL: define {{[^@]+}}@internal_argmem_only_rec_2 ; CHECK-LABEL: define {{[^@]+}}@internal_argmem_only_rec_2
; CHECK-SAME: (i32* nocapture nonnull align 4 dereferenceable(4) [[ARG:%.*]]) [[ATTR1]] { ; CHECK-SAME: (i32* nocapture noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) [[ATTR1]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: store i32 0, i32* [[ARG]], align 4 ; CHECK-NEXT: store i32 0, i32* [[ARG]], align 4
; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 -1 ; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 -1
; CHECK-NEXT: [[CALL:%.*]] = call noalias i8* @internal_argmem_only_rec_1(i32* nocapture nonnull align 4 dereferenceable(4) [[ADD_PTR]]) ; CHECK-NEXT: [[CALL:%.*]] = call noalias i8* @internal_argmem_only_rec_1(i32* nocapture nonnull align 4 dereferenceable(4) [[ADD_PTR]])
; CHECK-NEXT: ret i8* [[CALL]] ; CHECK-NEXT: ret i8* [[CALL]]
; ;
entry: entry:
store i32 0, i32* %arg, align 4 store i32 0, i32* %arg, align 4
▲ Show 20 Lines • Show All 122 Lines • ▼ Show 20 Lines
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
store i32 0, i32* @G, align 4 store i32 0, i32* @G, align 4
ret void ret void
} }
define void @write_global_via_arg(i32* %GPtr) { define void @write_global_via_arg(i32* %GPtr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@write_global_via_arg ; IS__TUNIT____-LABEL: define {{[^@]+}}@write_global_via_arg
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[GPTR:%.*]]) [[ATTR7:#.*]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[GPTR:%.*]]) [[ATTR7:#.*]] {
; IS__TUNIT____-NEXT: store i32 0, i32* [[GPTR]], align 4 ; IS__TUNIT____-NEXT: store i32 0, i32* [[GPTR]], align 4
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@write_global_via_arg ; IS__CGSCC____-LABEL: define {{[^@]+}}@write_global_via_arg
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[GPTR:%.*]]) [[ATTR7:#.*]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[GPTR:%.*]]) [[ATTR7:#.*]] {
; IS__CGSCC____-NEXT: store i32 0, i32* [[GPTR]], align 4 ; IS__CGSCC____-NEXT: store i32 0, i32* [[GPTR]], align 4
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
store i32 0, i32* %GPtr, align 4 store i32 0, i32* %GPtr, align 4
ret void ret void
} }
define internal void @write_global_via_arg_internal(i32* %GPtr) { define internal void @write_global_via_arg_internal(i32* %GPtr) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly
▲ Show 20 Lines • Show All 250 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/misc.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; ;
; Mostly check we do not crash on these uses ; Mostly check we do not crash on these uses
define internal void @internal(void (i8*)* %fp) { define internal void @internal(void (i8*)* %fp) {
; ;
; ;
; CHECK-LABEL: define {{[^@]+}}@internal ; IS__TUNIT____-LABEL: define {{[^@]+}}@internal
; CHECK-SAME: (void (i8*)* nonnull [[FP:%.*]]) { ; IS__TUNIT____-SAME: (void (i8*)* nonnull [[FP:%.*]]) {
; CHECK-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4 ; IS__TUNIT____-NEXT: [[A:%.*]] = alloca i32, align 4
; CHECK-NEXT: call void @foo(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A]]) [[ATTR1:#.*]] ; IS__TUNIT____-NEXT: call void @foo(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A]]) [[ATTR1:#.*]]
; CHECK-NEXT: call void [[FP]](i8* bitcast (void (i32*)* @foo to i8*)) ; IS__TUNIT____-NEXT: call void [[FP]](i8* bitcast (void (i32*)* @foo to i8*))
; CHECK-NEXT: call void @callback1(void (i32*)* noundef nonnull @foo) ; IS__TUNIT____-NEXT: call void @callback1(void (i32*)* noundef nonnull @foo)
; CHECK-NEXT: call void @callback2(void (i8*)* noundef bitcast (void (i32*)* @foo to void (i8*)*)) ; IS__TUNIT____-NEXT: call void @callback2(void (i8*)* noundef bitcast (void (i32*)* @foo to void (i8*)*))
; CHECK-NEXT: call void @callback2(void (i8*)* nonnull [[FP]]) ; IS__TUNIT____-NEXT: call void @callback2(void (i8*)* nonnull [[FP]])
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[A]] to i8* ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = bitcast i32* [[A]] to i8*
; CHECK-NEXT: call void [[FP]](i8* [[TMP1]]) ; IS__TUNIT____-NEXT: call void [[FP]](i8* [[TMP1]])
; CHECK-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
;
; IS__CGSCC____-LABEL: define {{[^@]+}}@internal
; IS__CGSCC____-SAME: (void (i8*)* noundef nonnull [[FP:%.*]]) {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[A:%.*]] = alloca i32, align 4
; IS__CGSCC____-NEXT: call void @foo(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A]]) [[ATTR1:#.*]]
; IS__CGSCC____-NEXT: call void [[FP]](i8* bitcast (void (i32*)* @foo to i8*))
; IS__CGSCC____-NEXT: call void @callback1(void (i32*)* noundef nonnull @foo)
; IS__CGSCC____-NEXT: call void @callback2(void (i8*)* noundef bitcast (void (i32*)* @foo to void (i8*)*))
; IS__CGSCC____-NEXT: call void @callback2(void (i8*)* noundef nonnull [[FP]])
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = bitcast i32* [[A]] to i8*
; IS__CGSCC____-NEXT: call void [[FP]](i8* [[TMP1]])
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%a = alloca i32, align 4 %a = alloca i32, align 4
%tmp = bitcast i32* %a to i8* %tmp = bitcast i32* %a to i8*
call void @foo(i32* nonnull %a) call void @foo(i32* nonnull %a)
call void %fp(i8* bitcast (void (i32*)* @foo to i8*)) call void %fp(i8* bitcast (void (i32*)* @foo to i8*))
call void @callback1(void (i32*)* nonnull @foo) call void @callback1(void (i32*)* nonnull @foo)
call void @callback2(void (i8*)* bitcast (void (i32*)* @foo to void (i8*)*)) call void @callback2(void (i8*)* bitcast (void (i32*)* @foo to void (i8*)*))
call void @callback2(void (i8*)* %fp) call void @callback2(void (i8*)* %fp)
%tmp1 = bitcast i32* %a to i8* %tmp1 = bitcast i32* %a to i8*
call void %fp(i8* %tmp1) call void %fp(i8* %tmp1)
ret void ret void
} }
define void @external(void (i8*)* %fp) { define void @external(void (i8*)* %fp) {
; ;
; ;
; CHECK-LABEL: define {{[^@]+}}@external ; IS__TUNIT____-LABEL: define {{[^@]+}}@external
; CHECK-SAME: (void (i8*)* [[FP:%.*]]) { ; IS__TUNIT____-SAME: (void (i8*)* [[FP:%.*]]) {
; CHECK-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4 ; IS__TUNIT____-NEXT: [[A:%.*]] = alloca i32, align 4
; CHECK-NEXT: call void @foo(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A]]) [[ATTR1]] ; IS__TUNIT____-NEXT: call void @foo(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A]]) [[ATTR1]]
; CHECK-NEXT: call void @callback1(void (i32*)* noundef nonnull @foo) ; IS__TUNIT____-NEXT: call void @callback1(void (i32*)* noundef nonnull @foo)
; CHECK-NEXT: call void @callback2(void (i8*)* noundef bitcast (void (i32*)* @foo to void (i8*)*)) ; IS__TUNIT____-NEXT: call void @callback2(void (i8*)* noundef bitcast (void (i32*)* @foo to void (i8*)*))
; CHECK-NEXT: call void @callback2(void (i8*)* [[FP]]) ; IS__TUNIT____-NEXT: call void @callback2(void (i8*)* [[FP]])
; CHECK-NEXT: call void [[FP]](i8* bitcast (void (i32*)* @foo to i8*)) ; IS__TUNIT____-NEXT: call void [[FP]](i8* bitcast (void (i32*)* @foo to i8*))
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[A]] to i8* ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = bitcast i32* [[A]] to i8*
; CHECK-NEXT: call void [[FP]](i8* [[TMP1]]) ; IS__TUNIT____-NEXT: call void [[FP]](i8* [[TMP1]])
; CHECK-NEXT: call void @internal(void (i8*)* nonnull [[FP]]) ; IS__TUNIT____-NEXT: call void @internal(void (i8*)* nonnull [[FP]])
; CHECK-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
;
; IS__CGSCC____-LABEL: define {{[^@]+}}@external
; IS__CGSCC____-SAME: (void (i8*)* [[FP:%.*]]) {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[A:%.*]] = alloca i32, align 4
; IS__CGSCC____-NEXT: call void @foo(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A]]) [[ATTR1]]
; IS__CGSCC____-NEXT: call void @callback1(void (i32*)* noundef nonnull @foo)
; IS__CGSCC____-NEXT: call void @callback2(void (i8*)* noundef bitcast (void (i32*)* @foo to void (i8*)*))
; IS__CGSCC____-NEXT: call void @callback2(void (i8*)* [[FP]])
; IS__CGSCC____-NEXT: call void [[FP]](i8* bitcast (void (i32*)* @foo to i8*))
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = bitcast i32* [[A]] to i8*
; IS__CGSCC____-NEXT: call void [[FP]](i8* [[TMP1]])
; IS__CGSCC____-NEXT: call void @internal(void (i8*)* noundef nonnull [[FP]])
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%a = alloca i32, align 4 %a = alloca i32, align 4
%tmp = bitcast i32* %a to i8* %tmp = bitcast i32* %a to i8*
call void @foo(i32* nonnull %a) call void @foo(i32* nonnull %a)
call void @callback1(void (i32*)* nonnull @foo) call void @callback1(void (i32*)* nonnull @foo)
call void @callback2(void (i8*)* bitcast (void (i32*)* @foo to void (i8*)*)) call void @callback2(void (i8*)* bitcast (void (i32*)* @foo to void (i8*)*))
call void @callback2(void (i8*)* %fp) call void @callback2(void (i8*)* %fp)
call void %fp(i8* bitcast (void (i32*)* @foo to i8*)) call void %fp(i8* bitcast (void (i32*)* @foo to i8*))
%tmp1 = bitcast i32* %a to i8* %tmp1 = bitcast i32* %a to i8*
call void %fp(i8* %tmp1) call void %fp(i8* %tmp1)
call void @internal(void (i8*)* %fp) call void @internal(void (i8*)* %fp)
ret void ret void
} }
define internal void @foo(i32* %a) { define internal void @foo(i32* %a) {
; ;
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo ; IS__TUNIT____-LABEL: define {{[^@]+}}@foo
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[A:%.*]]) [[ATTR0:#.*]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A:%.*]]) [[ATTR0:#.*]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: store i32 0, i32* [[A]], align 4 ; IS__TUNIT____-NEXT: store i32 0, i32* [[A]], align 4
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo ; IS__CGSCC____-LABEL: define {{[^@]+}}@foo
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[A:%.*]]) [[ATTR0:#.*]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A:%.*]]) [[ATTR0:#.*]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: store i32 0, i32* [[A]], align 4 ; IS__CGSCC____-NEXT: store i32 0, i32* [[A]], align 4
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
store i32 0, i32* %a store i32 0, i32* %a
ret void ret void
} }
declare void @callback1(void (i32*)*) declare void @callback1(void (i32*)*)
declare void @callback2(void (i8*)*) declare void @callback2(void (i8*)*)

llvm/test/Transforms/Attributor/misc_crash.ll

Show First 20 Lines • Show All 45 Lines • ▼ Show 20 Lines
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
store i32 0, i32* %0 store i32 0, i32* %0
ret void ret void
} }
define i32 @func2() { define i32 @func2() {
; CHECK-LABEL: define {{[^@]+}}@func2() { ; CHECK-LABEL: define {{[^@]+}}@func2() {
; CHECK-NEXT: [[TMP1:%.*]] = tail call i32 (i32*, ...) bitcast (void (i32*)* @func2a to i32 (i32*, ...)*)(i32* noundef nonnull align 4 dereferenceable(4) @var2) ; CHECK-NEXT: [[TMP1:%.*]] = tail call i32 (i32*, ...) bitcast (void (i32*)* @func2a to i32 (i32*, ...)*)(i32* nonnull align 4 dereferenceable(4) @var2)
; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* @var2, align 4 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* @var2, align 4
; CHECK-NEXT: ret i32 [[TMP2]] ; CHECK-NEXT: ret i32 [[TMP2]]
; ;
%1 = tail call i32 (i32*, ...) bitcast (void (i32*)* @func2a to i32 (i32*, ...)*)(i32* @var2) %1 = tail call i32 (i32*, ...) bitcast (void (i32*)* @func2a to i32 (i32*, ...)*)(i32* @var2)
%2 = load i32, i32* @var2 %2 = load i32, i32* @var2
ret i32 %2 ret i32 %2
} }
define i32 @func3(i1 %false) { define i32 @func3(i1 %false) {
; CHECK-LABEL: define {{[^@]+}}@func3 ; CHECK-LABEL: define {{[^@]+}}@func3
; CHECK-SAME: (i1 [[FALSE:%.*]]) { ; CHECK-SAME: (i1 [[FALSE:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = tail call i32 (i32*, ...) bitcast (void (i32*)* @func2a to i32 (i32*, ...)*)(i32* noundef nonnull align 4 dereferenceable(4) @var2) ; CHECK-NEXT: [[TMP1:%.*]] = tail call i32 (i32*, ...) bitcast (void (i32*)* @func2a to i32 (i32*, ...)*)(i32* nonnull align 4 dereferenceable(4) @var2)
; CHECK-NEXT: br i1 [[FALSE]], label [[USE_BB:%.*]], label [[RET_BB:%.*]] ; CHECK-NEXT: br i1 [[FALSE]], label [[USE_BB:%.*]], label [[RET_BB:%.*]]
; CHECK: use_bb: ; CHECK: use_bb:
; CHECK-NEXT: ret i32 [[TMP1]] ; CHECK-NEXT: ret i32 [[TMP1]]
; CHECK: ret_bb: ; CHECK: ret_bb:
; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* @var2, align 4 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* @var2, align 4
; CHECK-NEXT: ret i32 [[TMP2]] ; CHECK-NEXT: ret i32 [[TMP2]]
; ;
%1 = tail call i32 (i32*, ...) bitcast (void (i32*)* @func2a to i32 (i32*, ...)*)(i32* @var2) %1 = tail call i32 (i32*, ...) bitcast (void (i32*)* @func2a to i32 (i32*, ...)*)(i32* @var2)
Show All 40 Lines

llvm/test/Transforms/Attributor/noalias.ll

Show First 20 Lines • Show All 530 Lines • ▼ Show 20 Lines
; NOT_CGSCC_NPM-NEXT: ret i32 [[CALL]] ; NOT_CGSCC_NPM-NEXT: ret i32 [[CALL]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@i2p ; IS__CGSCC____-LABEL: define {{[^@]+}}@i2p
; IS__CGSCC____-SAME: (i32* nofree readonly [[ARG:%.*]]) [[ATTR4:#.*]] { ; IS__CGSCC____-SAME: (i32* nofree readonly [[ARG:%.*]]) [[ATTR4:#.*]] {
; IS__CGSCC____-NEXT: [[C:%.*]] = call i32 @p2i(i32* noalias nofree readnone [[ARG]]) [[ATTR10:#.*]] ; IS__CGSCC____-NEXT: [[C:%.*]] = call i32 @p2i(i32* noalias nofree readnone [[ARG]]) [[ATTR10:#.*]]
; IS__CGSCC____-NEXT: [[I2P:%.*]] = inttoptr i32 [[C]] to i8* ; IS__CGSCC____-NEXT: [[I2P:%.*]] = inttoptr i32 [[C]] to i8*
; IS__CGSCC____-NEXT: [[BC:%.*]] = bitcast i8* [[I2P]] to i32* ; IS__CGSCC____-NEXT: [[BC:%.*]] = bitcast i8* [[I2P]] to i32*
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32 @ret(i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[BC]]) [[ATTR11:#.*]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32 @ret(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[BC]]) [[ATTR11:#.*]]
; IS__CGSCC____-NEXT: ret i32 [[CALL]] ; IS__CGSCC____-NEXT: ret i32 [[CALL]]
; ;
%c = call i32 @p2i(i32* %arg) %c = call i32 @p2i(i32* %arg)
%i2p = inttoptr i32 %c to i8* %i2p = inttoptr i32 %c to i8*
%bc = bitcast i8* %i2p to i32* %bc = bitcast i8* %i2p to i32*
%call = call i32 @ret(i32* %bc) %call = call i32 @ret(i32* %bc)
ret i32 %call ret i32 %call
} }
define internal i32 @ret(i32* %arg) { define internal i32 @ret(i32* %arg) {
; NOT_CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; NOT_CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@ret ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@ret
; NOT_CGSCC_NPM-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[ARG:%.*]]) [[ATTR5:#.*]] { ; NOT_CGSCC_NPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[ARG:%.*]]) [[ATTR5:#.*]] {
; NOT_CGSCC_NPM-NEXT: [[L:%.*]] = load i32, i32* [[ARG]], align 4 ; NOT_CGSCC_NPM-NEXT: [[L:%.*]] = load i32, i32* [[ARG]], align 4
; NOT_CGSCC_NPM-NEXT: ret i32 [[L]] ; NOT_CGSCC_NPM-NEXT: ret i32 [[L]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ret ; IS__CGSCC____-LABEL: define {{[^@]+}}@ret
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[ARG:%.*]]) [[ATTR5:#.*]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[ARG:%.*]]) [[ATTR5:#.*]] {
; IS__CGSCC____-NEXT: [[L:%.*]] = load i32, i32* [[ARG]], align 4 ; IS__CGSCC____-NEXT: [[L:%.*]] = load i32, i32* [[ARG]], align 4
; IS__CGSCC____-NEXT: ret i32 [[L]] ; IS__CGSCC____-NEXT: ret i32 [[L]]
; ;
%l = load i32, i32* %arg %l = load i32, i32* %arg
ret i32 %l ret i32 %l
} }
; Test to propagate noalias where value is assumed to be no-capture in all the ; Test to propagate noalias where value is assumed to be no-capture in all the
▲ Show 20 Lines • Show All 78 Lines • ▼ Show 20 Lines
; ;
store i32* %p, i32** @alias_of_p store i32* %p, i32** @alias_of_p
ret void ret void
} }
define void @only_store(i32* %p) { define void @only_store(i32* %p) {
; NOT_CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; NOT_CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@only_store ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@only_store
; NOT_CGSCC_NPM-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR8:#.*]] { ; NOT_CGSCC_NPM-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR8:#.*]] {
; NOT_CGSCC_NPM-NEXT: store i32 0, i32* [[P]], align 4 ; NOT_CGSCC_NPM-NEXT: store i32 0, i32* [[P]], align 4
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@only_store ; IS__CGSCC____-LABEL: define {{[^@]+}}@only_store
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR8:#.*]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR8:#.*]] {
; IS__CGSCC____-NEXT: store i32 0, i32* [[P]], align 4 ; IS__CGSCC____-NEXT: store i32 0, i32* [[P]], align 4
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
store i32 0, i32* %p store i32 0, i32* %p
ret void ret void
} }
define void @test15_caller(i32* noalias %p, i32 %c) { define void @test15_caller(i32* noalias %p, i32 %c) {
Show All 10 Lines
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test15_caller ; IS__CGSCC____-LABEL: define {{[^@]+}}@test15_caller
; IS__CGSCC____-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C:%.*]]) [[ATTR7]] { ; IS__CGSCC____-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C:%.*]]) [[ATTR7]] {
; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C]], 0 ; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C]], 0
; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC____: if.then: ; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: tail call void @only_store(i32* noalias nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[P]]) [[ATTR12:#.*]] ; IS__CGSCC____-NEXT: tail call void @only_store(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[P]]) [[ATTR12:#.*]]
; IS__CGSCC____-NEXT: br label [[IF_END]] ; IS__CGSCC____-NEXT: br label [[IF_END]]
; IS__CGSCC____: if.end: ; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: tail call void @make_alias(i32* nofree writeonly [[P]]) [[ATTR12]] ; IS__CGSCC____-NEXT: tail call void @make_alias(i32* nofree writeonly [[P]]) [[ATTR12]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
%tobool = icmp eq i32 %c, 0 %tobool = icmp eq i32 %c, 0
br i1 %tobool, label %if.end, label %if.then br i1 %tobool, label %if.end, label %if.then
▲ Show 20 Lines • Show All 46 Lines • ▼ Show 20 Lines
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test16_sub ; IS__CGSCC____-LABEL: define {{[^@]+}}@test16_sub
; IS__CGSCC____-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C1:%.*]], i32 [[C2:%.*]]) [[ATTR7]] { ; IS__CGSCC____-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C1:%.*]], i32 [[C2:%.*]]) [[ATTR7]] {
; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C1]], 0 ; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C1]], 0
; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC____: if.then: ; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: tail call void @only_store(i32* noalias nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[P]]) [[ATTR12]] ; IS__CGSCC____-NEXT: tail call void @only_store(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[P]]) [[ATTR12]]
; IS__CGSCC____-NEXT: tail call void @make_alias(i32* nofree nonnull writeonly align 4 dereferenceable(4) [[P]]) [[ATTR12]] ; IS__CGSCC____-NEXT: tail call void @make_alias(i32* nofree nonnull writeonly align 4 dereferenceable(4) [[P]]) [[ATTR12]]
; IS__CGSCC____-NEXT: br label [[IF_END]] ; IS__CGSCC____-NEXT: br label [[IF_END]]
; IS__CGSCC____: if.end: ; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[C2]], 0 ; IS__CGSCC____-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[C2]], 0
; IS__CGSCC____-NEXT: br i1 [[TOBOOL1]], label [[IF_THEN2:%.*]], label [[IF_END3:%.*]] ; IS__CGSCC____-NEXT: br i1 [[TOBOOL1]], label [[IF_THEN2:%.*]], label [[IF_END3:%.*]]
; IS__CGSCC____: if.then2: ; IS__CGSCC____: if.then2:
; IS__CGSCC____-NEXT: tail call void @only_store(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[P]]) [[ATTR12]] ; IS__CGSCC____-NEXT: tail call void @only_store(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[P]]) [[ATTR12]]
; IS__CGSCC____-NEXT: br label [[IF_END3]] ; IS__CGSCC____-NEXT: br label [[IF_END3]]
; IS__CGSCC____: if.end3: ; IS__CGSCC____: if.end3:
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
%tobool = icmp eq i32 %c1, 0 %tobool = icmp eq i32 %c1, 0
br i1 %tobool, label %if.end, label %if.then br i1 %tobool, label %if.end, label %if.then
if.then: if.then:
▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines
; IS__CGSCC____-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C:%.*]]) [[ATTR7]] { ; IS__CGSCC____-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C:%.*]]) [[ATTR7]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C]], 0 ; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C]], 0
; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[L1:%.*]], label [[L2:%.*]] ; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[L1:%.*]], label [[L2:%.*]]
; IS__CGSCC____: l1: ; IS__CGSCC____: l1:
; IS__CGSCC____-NEXT: tail call void @make_alias(i32* nofree writeonly [[P]]) [[ATTR12]] ; IS__CGSCC____-NEXT: tail call void @make_alias(i32* nofree writeonly [[P]]) [[ATTR12]]
; IS__CGSCC____-NEXT: br label [[L3:%.*]] ; IS__CGSCC____-NEXT: br label [[L3:%.*]]
; IS__CGSCC____: l2: ; IS__CGSCC____: l2:
; IS__CGSCC____-NEXT: tail call void @only_store(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[P]]) [[ATTR12]] ; IS__CGSCC____-NEXT: tail call void @only_store(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[P]]) [[ATTR12]]
; IS__CGSCC____-NEXT: br label [[L3]] ; IS__CGSCC____-NEXT: br label [[L3]]
; IS__CGSCC____: l3: ; IS__CGSCC____: l3:
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%tobool = icmp eq i32 %c, 0 %tobool = icmp eq i32 %c, 0
br i1 %tobool, label %l1, label %l2 br i1 %tobool, label %l1, label %l2
▲ Show 20 Lines • Show All 54 Lines • ▼ Show 20 Lines
; IS__CGSCC____-SAME: (i32* noalias nofree nonnull writeonly align 4 dereferenceable(4) [[P:%.*]], i32 [[C:%.*]]) [[ATTR7]] { ; IS__CGSCC____-SAME: (i32* noalias nofree nonnull writeonly align 4 dereferenceable(4) [[P:%.*]], i32 [[C:%.*]]) [[ATTR7]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C]], 0 ; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C]], 0
; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[L1:%.*]], label [[L2:%.*]] ; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[L1:%.*]], label [[L2:%.*]]
; IS__CGSCC____: l1: ; IS__CGSCC____: l1:
; IS__CGSCC____-NEXT: tail call void @make_alias(i32* nofree nonnull writeonly align 4 dereferenceable(4) [[P]]) [[ATTR12]] ; IS__CGSCC____-NEXT: tail call void @make_alias(i32* nofree nonnull writeonly align 4 dereferenceable(4) [[P]]) [[ATTR12]]
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: l2: ; IS__CGSCC____: l2:
; IS__CGSCC____-NEXT: tail call void @only_store(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[P]]) [[ATTR12]] ; IS__CGSCC____-NEXT: tail call void @only_store(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[P]]) [[ATTR12]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%tobool = icmp eq i32 %c, 0 %tobool = icmp eq i32 %c, 0
br i1 %tobool, label %l1, label %l2 br i1 %tobool, label %l1, label %l2
l1: l1:
tail call void @make_alias(i32* %p) tail call void @make_alias(i32* %p)
tail call void @noreturn() tail call void @noreturn()
br label %l2 br label %l2
l2: l2:
tail call void @only_store(i32* %p) tail call void @only_store(i32* %p)
ret void ret void
} }

llvm/test/Transforms/Attributor/nocapture-1.ll

Show First 20 Lines • Show All 334 Lines • ▼ Show 20 Lines
; ;
%1 = call i32 @nc1(i32* %q, i32* %p, i1 0) ; <i32> [#uses=0] %1 = call i32 @nc1(i32* %q, i32* %p, i1 0) ; <i32> [#uses=0]
ret void ret void
} }
define void @nc3(void ()* %p) { define void @nc3(void ()* %p) {
; CHECK-LABEL: define {{[^@]+}}@nc3 ; CHECK-LABEL: define {{[^@]+}}@nc3
; CHECK-SAME: (void ()* nocapture nofree nonnull [[P:%.*]]) { ; CHECK-SAME: (void ()* nocapture nofree noundef nonnull [[P:%.*]]) {
; CHECK-NEXT: call void [[P]]() ; CHECK-NEXT: call void [[P]]()
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void %p() call void %p()
ret void ret void
} }
; The following test is tricky because improvements to AAIsDead can cause the call to be removed. ; The following test is tricky because improvements to AAIsDead can cause the call to be removed.
Show All 13 Lines
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @external(i8* %p) call void @external(i8* %p)
ret void ret void
} }
define void @nc5(void (i8*)* %f, i8* %p) { define void @nc5(void (i8*)* %f, i8* %p) {
; CHECK-LABEL: define {{[^@]+}}@nc5 ; CHECK-LABEL: define {{[^@]+}}@nc5
; CHECK-SAME: (void (i8*)* nocapture nofree nonnull [[F:%.*]], i8* nocapture [[P:%.*]]) { ; CHECK-SAME: (void (i8*)* nocapture nofree noundef nonnull [[F:%.*]], i8* nocapture [[P:%.*]]) {
; CHECK-NEXT: call void [[F]](i8* nocapture [[P]]) ; CHECK-NEXT: call void [[F]](i8* nocapture [[P]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void %f(i8* %p) readonly nounwind call void %f(i8* %p) readonly nounwind
call void %f(i8* nocapture %p) call void %f(i8* nocapture %p)
ret void ret void
} }
▲ Show 20 Lines • Show All 146 Lines • ▼ Show 20 Lines;
call void (i8*, i8*, ...) @test6_1(i8* %x6_2, i8* %y6_2, i8* %z6_2) call void (i8*, i8*, ...) @test6_1(i8* %x6_2, i8* %y6_2, i8* %z6_2)
store i32* null, i32** @g store i32* null, i32** @g
ret void ret void
} }
define void @test_cmpxchg(i32* %p) { define void @test_cmpxchg(i32* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nounwind willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_cmpxchg ; IS__TUNIT____-LABEL: define {{[^@]+}}@test_cmpxchg
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull dereferenceable(4) [[P:%.*]]) [[ATTR9:#.*]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull dereferenceable(4) [[P:%.*]]) [[ATTR9:#.*]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = cmpxchg i32* [[P]], i32 0, i32 1 acquire monotonic ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = cmpxchg i32* [[P]], i32 0, i32 1 acquire monotonic, align 4
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nounwind willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_cmpxchg ; IS__CGSCC____-LABEL: define {{[^@]+}}@test_cmpxchg
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull dereferenceable(4) [[P:%.*]]) [[ATTR9:#.*]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull dereferenceable(4) [[P:%.*]]) [[ATTR9:#.*]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = cmpxchg i32* [[P]], i32 0, i32 1 acquire monotonic ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = cmpxchg i32* [[P]], i32 0, i32 1 acquire monotonic, align 4
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
cmpxchg i32* %p, i32 0, i32 1 acquire monotonic cmpxchg i32* %p, i32 0, i32 1 acquire monotonic
ret void ret void
} }
define void @test_cmpxchg_ptr(i32** %p, i32* %q) { define void @test_cmpxchg_ptr(i32** %p, i32* %q) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nounwind willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_cmpxchg_ptr ; IS__TUNIT____-LABEL: define {{[^@]+}}@test_cmpxchg_ptr
; IS__TUNIT____-SAME: (i32** nocapture nofree nonnull dereferenceable(8) [[P:%.*]], i32* nofree [[Q:%.*]]) [[ATTR9]] { ; IS__TUNIT____-SAME: (i32** nocapture nofree noundef nonnull dereferenceable(8) [[P:%.*]], i32* nofree [[Q:%.*]]) [[ATTR9]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = cmpxchg i32** [[P]], i32* null, i32* [[Q]] acquire monotonic ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = cmpxchg i32** [[P]], i32* null, i32* [[Q]] acquire monotonic, align 8
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nounwind willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_cmpxchg_ptr ; IS__CGSCC____-LABEL: define {{[^@]+}}@test_cmpxchg_ptr
; IS__CGSCC____-SAME: (i32** nocapture nofree nonnull dereferenceable(8) [[P:%.*]], i32* nofree [[Q:%.*]]) [[ATTR9]] { ; IS__CGSCC____-SAME: (i32** nocapture nofree noundef nonnull dereferenceable(8) [[P:%.*]], i32* nofree [[Q:%.*]]) [[ATTR9]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = cmpxchg i32** [[P]], i32* null, i32* [[Q]] acquire monotonic ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = cmpxchg i32** [[P]], i32* null, i32* [[Q]] acquire monotonic, align 8
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
cmpxchg i32** %p, i32* null, i32* %q acquire monotonic cmpxchg i32** %p, i32* null, i32* %q acquire monotonic
ret void ret void
} }
define void @test_atomicrmw(i32* %p) { define void @test_atomicrmw(i32* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nounwind willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_atomicrmw ; IS__TUNIT____-LABEL: define {{[^@]+}}@test_atomicrmw
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull dereferenceable(4) [[P:%.*]]) [[ATTR9]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull dereferenceable(4) [[P:%.*]]) [[ATTR9]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = atomicrmw add i32* [[P]], i32 1 seq_cst ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = atomicrmw add i32* [[P]], i32 1 seq_cst, align 4
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nounwind willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_atomicrmw ; IS__CGSCC____-LABEL: define {{[^@]+}}@test_atomicrmw
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull dereferenceable(4) [[P:%.*]]) [[ATTR9]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull dereferenceable(4) [[P:%.*]]) [[ATTR9]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = atomicrmw add i32* [[P]], i32 1 seq_cst ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = atomicrmw add i32* [[P]], i32 1 seq_cst, align 4
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
atomicrmw add i32* %p, i32 1 seq_cst atomicrmw add i32* %p, i32 1 seq_cst
ret void ret void
} }
define void @test_volatile(i32* %x) { define void @test_volatile(i32* %x) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nounwind willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree nounwind willreturn
▲ Show 20 Lines • Show All 257 Lines • ▼ Show 20 Lines
declare i8* @maybe_returned_ptr(i8* readonly %ptr) readonly nounwind willreturn declare i8* @maybe_returned_ptr(i8* readonly %ptr) readonly nounwind willreturn
declare i8 @maybe_returned_val(i8* %ptr) readonly nounwind willreturn declare i8 @maybe_returned_val(i8* %ptr) readonly nounwind willreturn
declare void @val_use(i8 %ptr) readonly nounwind willreturn declare void @val_use(i8 %ptr) readonly nounwind willreturn
; FIXME: Both pointers should be nocapture ; FIXME: Both pointers should be nocapture
define void @ptr_uses(i8* %ptr, i8* %wptr) { define void @ptr_uses(i8* %ptr, i8* %wptr) {
; CHECK: Function Attrs: nounwind willreturn ; CHECK: Function Attrs: nounwind willreturn
; CHECK-LABEL: define {{[^@]+}}@ptr_uses ; CHECK-LABEL: define {{[^@]+}}@ptr_uses
; CHECK-SAME: (i8* [[PTR:%.*]], i8* nocapture nonnull writeonly dereferenceable(1) [[WPTR:%.*]]) [[ATTR14:#.*]] { ; CHECK-SAME: (i8* [[PTR:%.*]], i8* nocapture noundef nonnull writeonly dereferenceable(1) [[WPTR:%.*]]) [[ATTR14:#.*]] {
; CHECK-NEXT: store i8 0, i8* [[WPTR]], align 1 ; CHECK-NEXT: store i8 0, i8* [[WPTR]], align 1
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%call_ptr = call i8* @maybe_returned_ptr(i8* %ptr) %call_ptr = call i8* @maybe_returned_ptr(i8* %ptr)
%call_val = call i8 @maybe_returned_val(i8* %call_ptr) %call_val = call i8 @maybe_returned_val(i8* %call_ptr)
call void @val_use(i8 %call_val) call void @val_use(i8 %call_val)
store i8 0, i8* %wptr store i8 0, i8* %wptr
ret void ret void
} }
declare i8* @llvm.launder.invariant.group.p0i8(i8*) declare i8* @llvm.launder.invariant.group.p0i8(i8*)
declare i8* @llvm.strip.invariant.group.p0i8(i8*) declare i8* @llvm.strip.invariant.group.p0i8(i8*)

llvm/test/Transforms/Attributor/nocapture-2.ll

Show First 20 Lines • Show All 400 Lines • ▼ Show 20 Lines
; *a1 = 0; ; *a1 = 0;
; return a; ; return a;
; } ; }
; ;
; There should *not* be a no-capture attribute on %a ; There should *not* be a no-capture attribute on %a
define i64* @not_captured_but_returned_0(i64* %a) #0 { define i64* @not_captured_but_returned_0(i64* %a) #0 {
; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind uwtable willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind uwtable willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@not_captured_but_returned_0 ; IS__TUNIT____-LABEL: define {{[^@]+}}@not_captured_but_returned_0
; IS__TUNIT____-SAME: (i64* nofree nonnull returned writeonly align 8 dereferenceable(8) "no-capture-maybe-returned" [[A:%.*]]) [[ATTR4:#.*]] { ; IS__TUNIT____-SAME: (i64* nofree noundef nonnull returned writeonly align 8 dereferenceable(8) "no-capture-maybe-returned" [[A:%.*]]) [[ATTR4:#.*]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: store i64 0, i64* [[A]], align 8 ; IS__TUNIT____-NEXT: store i64 0, i64* [[A]], align 8
; IS__TUNIT____-NEXT: ret i64* [[A]] ; IS__TUNIT____-NEXT: ret i64* [[A]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@not_captured_but_returned_0 ; IS__CGSCC____-LABEL: define {{[^@]+}}@not_captured_but_returned_0
; IS__CGSCC____-SAME: (i64* nofree nonnull returned writeonly align 8 dereferenceable(8) "no-capture-maybe-returned" [[A:%.*]]) [[ATTR4:#.*]] { ; IS__CGSCC____-SAME: (i64* nofree noundef nonnull returned writeonly align 8 dereferenceable(8) "no-capture-maybe-returned" [[A:%.*]]) [[ATTR4:#.*]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: store i64 0, i64* [[A]], align 8 ; IS__CGSCC____-NEXT: store i64 0, i64* [[A]], align 8
; IS__CGSCC____-NEXT: ret i64* [[A]] ; IS__CGSCC____-NEXT: ret i64* [[A]]
; ;
entry: entry:
store i64 0, i64* %a, align 8 store i64 0, i64* %a, align 8
ret i64* %a ret i64* %a
} }
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; IS__TUNIT____-SAME: (i64* nocapture nofree writeonly align 8 [[A:%.*]]) [[ATTR4]] { ; IS__TUNIT____-SAME: (i64* nocapture nofree writeonly align 8 [[A:%.*]]) [[ATTR4]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i64* @not_captured_but_returned_0(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) [[ATTR9:#.*]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i64* @not_captured_but_returned_0(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) [[ATTR9:#.*]]
; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i64* @not_captured_but_returned_1(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) [[ATTR9]] ; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i64* @not_captured_but_returned_1(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) [[ATTR9]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_not_captured_but_returned_calls ; IS__CGSCC____-LABEL: define {{[^@]+}}@test_not_captured_but_returned_calls
; IS__CGSCC____-SAME: (i64* nocapture nofree nonnull writeonly align 8 dereferenceable(16) [[A:%.*]]) [[ATTR4]] { ; IS__CGSCC____-SAME: (i64* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(16) [[A:%.*]]) [[ATTR4]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i64* @not_captured_but_returned_0(i64* nofree nonnull writeonly align 8 dereferenceable(16) "no-capture-maybe-returned" [[A]]) [[ATTR9:#.*]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i64* @not_captured_but_returned_0(i64* nofree noundef nonnull writeonly align 8 dereferenceable(16) "no-capture-maybe-returned" [[A]]) [[ATTR9:#.*]]
; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i64* @not_captured_but_returned_1(i64* nofree nonnull writeonly align 8 dereferenceable(16) "no-capture-maybe-returned" [[A]]) [[ATTR9]] ; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i64* @not_captured_but_returned_1(i64* nofree noundef nonnull writeonly align 8 dereferenceable(16) "no-capture-maybe-returned" [[A]]) [[ATTR9]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%call = call i64* @not_captured_but_returned_0(i64* %a) %call = call i64* @not_captured_but_returned_0(i64* %a)
%call1 = call i64* @not_captured_but_returned_1(i64* %a) %call1 = call i64* @not_captured_but_returned_1(i64* %a)
ret void ret void
} }
Show All 9 Lines
; IS__TUNIT____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_0a ; IS__TUNIT____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_0a
; IS__TUNIT____-SAME: (i64* nofree returned writeonly align 8 "no-capture-maybe-returned" [[A:%.*]]) [[ATTR4]] { ; IS__TUNIT____-SAME: (i64* nofree returned writeonly align 8 "no-capture-maybe-returned" [[A:%.*]]) [[ATTR4]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i64* @not_captured_but_returned_0(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) [[ATTR9]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i64* @not_captured_but_returned_0(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) [[ATTR9]]
; IS__TUNIT____-NEXT: ret i64* [[CALL]] ; IS__TUNIT____-NEXT: ret i64* [[CALL]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_0a ; IS__CGSCC____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_0a
; IS__CGSCC____-SAME: (i64* nofree nonnull returned writeonly align 8 dereferenceable(8) "no-capture-maybe-returned" [[A:%.*]]) [[ATTR4]] { ; IS__CGSCC____-SAME: (i64* nofree noundef nonnull returned writeonly align 8 dereferenceable(8) "no-capture-maybe-returned" [[A:%.*]]) [[ATTR4]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i64* @not_captured_but_returned_0(i64* nofree nonnull writeonly align 8 dereferenceable(8) "no-capture-maybe-returned" [[A]]) [[ATTR9]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i64* @not_captured_but_returned_0(i64* nofree noundef nonnull writeonly align 8 dereferenceable(8) "no-capture-maybe-returned" [[A]]) [[ATTR9]]
; IS__CGSCC____-NEXT: ret i64* [[CALL]] ; IS__CGSCC____-NEXT: ret i64* [[CALL]]
; ;
entry: entry:
%call = call i64* @not_captured_but_returned_0(i64* %a) %call = call i64* @not_captured_but_returned_0(i64* %a)
ret i64* %call ret i64* %call
} }
; TEST captured through write ; TEST captured through write
Show All 10 Lines
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i64* @not_captured_but_returned_0(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) [[ATTR9]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i64* @not_captured_but_returned_0(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) [[ATTR9]]
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = ptrtoint i64* [[CALL]] to i64 ; IS__TUNIT____-NEXT: [[TMP0:%.*]] = ptrtoint i64* [[CALL]] to i64
; IS__TUNIT____-NEXT: store i64 [[TMP0]], i64* [[A]], align 8 ; IS__TUNIT____-NEXT: store i64 [[TMP0]], i64* [[A]], align 8
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_0b ; IS__CGSCC____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_0b
; IS__CGSCC____-SAME: (i64* nofree nonnull writeonly align 8 dereferenceable(8) [[A:%.*]]) [[ATTR4]] { ; IS__CGSCC____-SAME: (i64* nofree noundef nonnull writeonly align 8 dereferenceable(8) [[A:%.*]]) [[ATTR4]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i64* @not_captured_but_returned_0(i64* nofree nonnull writeonly align 8 dereferenceable(8) "no-capture-maybe-returned" [[A]]) [[ATTR9]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i64* @not_captured_but_returned_0(i64* nofree noundef nonnull writeonly align 8 dereferenceable(8) "no-capture-maybe-returned" [[A]]) [[ATTR9]]
; IS__CGSCC____-NEXT: [[TMP0:%.*]] = ptrtoint i64* [[CALL]] to i64 ; IS__CGSCC____-NEXT: [[TMP0:%.*]] = ptrtoint i64* [[CALL]] to i64
; IS__CGSCC____-NEXT: store i64 [[TMP0]], i64* [[A]], align 8 ; IS__CGSCC____-NEXT: store i64 [[TMP0]], i64* [[A]], align 8
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%call = call i64* @not_captured_but_returned_0(i64* %a) %call = call i64* @not_captured_but_returned_0(i64* %a)
%0 = ptrtoint i64* %call to i64 %0 = ptrtoint i64* %call to i64
store i64 %0, i64* %a, align 8 store i64 %0, i64* %a, align 8
ret void ret void
} }
; TEST "captured" only through transitive return ; TEST "captured" only through transitive return
; ;
; long* negative_test_not_captured_but_returned_call_1a(long *a) { ; long* negative_test_not_captured_but_returned_call_1a(long *a) {
; return not_captured_but_returned_1(a); ; return not_captured_but_returned_1(a);
; } ; }
; ;
; There should *not* be a no-capture attribute on %a ; There should *not* be a no-capture attribute on %a
define i64* @negative_test_not_captured_but_returned_call_1a(i64* %a) #0 { define i64* @negative_test_not_captured_but_returned_call_1a(i64* %a) #0 {
; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind uwtable willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind uwtable willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_1a ; IS__TUNIT____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_1a
; IS__TUNIT____-SAME: (i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A:%.*]]) [[ATTR4]] { ; IS__TUNIT____-SAME: (i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A:%.*]]) [[ATTR4]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call nonnull align 8 dereferenceable(8) i64* @not_captured_but_returned_1(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) [[ATTR9]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call noundef nonnull align 8 dereferenceable(8) i64* @not_captured_but_returned_1(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) [[ATTR9]]
; IS__TUNIT____-NEXT: ret i64* [[CALL]] ; IS__TUNIT____-NEXT: ret i64* [[CALL]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_1a ; IS__CGSCC____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_1a
; IS__CGSCC____-SAME: (i64* nofree nonnull writeonly align 8 dereferenceable(16) "no-capture-maybe-returned" [[A:%.*]]) [[ATTR4]] { ; IS__CGSCC____-SAME: (i64* nofree noundef nonnull writeonly align 8 dereferenceable(16) "no-capture-maybe-returned" [[A:%.*]]) [[ATTR4]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call nonnull align 8 dereferenceable(8) i64* @not_captured_but_returned_1(i64* nofree nonnull writeonly align 8 dereferenceable(16) "no-capture-maybe-returned" [[A]]) [[ATTR9]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call noundef nonnull align 8 dereferenceable(8) i64* @not_captured_but_returned_1(i64* nofree noundef nonnull writeonly align 8 dereferenceable(16) "no-capture-maybe-returned" [[A]]) [[ATTR9]]
; IS__CGSCC____-NEXT: ret i64* [[CALL]] ; IS__CGSCC____-NEXT: ret i64* [[CALL]]
; ;
entry: entry:
%call = call i64* @not_captured_but_returned_1(i64* %a) %call = call i64* @not_captured_but_returned_1(i64* %a)
ret i64* %call ret i64* %call
} }
; TEST captured through write ; TEST captured through write
Show All 10 Lines
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call align 8 i64* @not_captured_but_returned_1(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) [[ATTR9]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call align 8 i64* @not_captured_but_returned_1(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) [[ATTR9]]
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = ptrtoint i64* [[CALL]] to i64 ; IS__TUNIT____-NEXT: [[TMP0:%.*]] = ptrtoint i64* [[CALL]] to i64
; IS__TUNIT____-NEXT: store i64 [[TMP0]], i64* [[CALL]], align 8 ; IS__TUNIT____-NEXT: store i64 [[TMP0]], i64* [[CALL]], align 8
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind uwtable willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_1b ; IS__CGSCC____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_1b
; IS__CGSCC____-SAME: (i64* nofree nonnull writeonly align 8 dereferenceable(16) [[A:%.*]]) [[ATTR5:#.*]] { ; IS__CGSCC____-SAME: (i64* nofree noundef nonnull writeonly align 8 dereferenceable(16) [[A:%.*]]) [[ATTR5:#.*]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call align 8 i64* @not_captured_but_returned_1(i64* nofree nonnull writeonly align 8 dereferenceable(16) "no-capture-maybe-returned" [[A]]) [[ATTR9]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call align 8 i64* @not_captured_but_returned_1(i64* nofree noundef nonnull writeonly align 8 dereferenceable(16) "no-capture-maybe-returned" [[A]]) [[ATTR9]]
; IS__CGSCC____-NEXT: [[TMP0:%.*]] = ptrtoint i64* [[CALL]] to i64 ; IS__CGSCC____-NEXT: [[TMP0:%.*]] = ptrtoint i64* [[CALL]] to i64
; IS__CGSCC____-NEXT: store i64 [[TMP0]], i64* [[CALL]], align 8 ; IS__CGSCC____-NEXT: store i64 [[TMP0]], i64* [[CALL]], align 8
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%call = call i64* @not_captured_but_returned_1(i64* %a) %call = call i64* @not_captured_but_returned_1(i64* %a)
%0 = ptrtoint i64* %call to i64 %0 = ptrtoint i64* %call to i64
store i64 %0, i64* %call, align 8 store i64 %0, i64* %call, align 8
▲ Show 20 Lines • Show All 180 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/nofree.ll

Show First 20 Lines • Show All 314 Lines • ▼ Show 20 Lines;
tail call void @f1() tail call void @f1()
ret void ret void
} }
; TEST 12 NoFree argument - positive. ; TEST 12 NoFree argument - positive.
define double @test12(double* nocapture readonly %a) { define double @test12(double* nocapture readonly %a) {
; CHECK: Function Attrs: nofree nounwind ; CHECK: Function Attrs: nofree nounwind
; CHECK-LABEL: define {{[^@]+}}@test12 ; CHECK-LABEL: define {{[^@]+}}@test12
; CHECK-SAME: (double* nocapture nofree nonnull readonly align 8 dereferenceable(8) [[A:%.*]]) [[ATTR8:#.*]] { ; CHECK-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[A:%.*]]) [[ATTR8:#.*]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load double, double* [[A]], align 8 ; CHECK-NEXT: [[TMP0:%.*]] = load double, double* [[A]], align 8
; CHECK-NEXT: [[CALL:%.*]] = tail call double @cos(double [[TMP0]]) [[ATTR2]] ; CHECK-NEXT: [[CALL:%.*]] = tail call double @cos(double [[TMP0]]) [[ATTR2]]
; CHECK-NEXT: ret double [[CALL]] ; CHECK-NEXT: ret double [[CALL]]
; ;
entry: entry:
%0 = load double, double* %a, align 8 %0 = load double, double* %a, align 8
%call = tail call double @cos(double %0) #2 %call = tail call double @cos(double %0) #2
ret double %call ret double %call
} }
declare double @cos(double) nobuiltin nounwind nofree declare double @cos(double) nobuiltin nounwind nofree
; FIXME: %a should be nofree. ; FIXME: %a should be nofree.
; TEST 13 NoFree argument - positive. ; TEST 13 NoFree argument - positive.
define noalias i32* @test13(i64* nocapture readonly %a) { define noalias i32* @test13(i64* nocapture readonly %a) {
; CHECK: Function Attrs: nounwind ; CHECK: Function Attrs: nounwind
; CHECK-LABEL: define {{[^@]+}}@test13 ; CHECK-LABEL: define {{[^@]+}}@test13
; CHECK-SAME: (i64* nocapture nonnull readonly align 8 dereferenceable(8) [[A:%.*]]) [[ATTR0]] { ; CHECK-SAME: (i64* nocapture noundef nonnull readonly align 8 dereferenceable(8) [[A:%.*]]) [[ATTR0]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 ; CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8
; CHECK-NEXT: [[CALL:%.*]] = tail call noalias i8* @malloc(i64 [[TMP0]]) [[ATTR2]] ; CHECK-NEXT: [[CALL:%.*]] = tail call noalias i8* @malloc(i64 [[TMP0]]) [[ATTR2]]
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[CALL]] to i32* ; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[CALL]] to i32*
; CHECK-NEXT: ret i32* [[TMP1]] ; CHECK-NEXT: ret i32* [[TMP1]]
; ;
entry: entry:
%0 = load i64, i64* %a, align 8 %0 = load i64, i64* %a, align 8
▲ Show 20 Lines • Show All 112 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/nonnull.ll

Show First 20 Lines • Show All 543 Lines • ▼ Show 20 Lines
; FIXME: missing nonnull. It should be @f1(i32* nonnull readonly %arg) ; FIXME: missing nonnull. It should be @f1(i32* nonnull readonly %arg)
%tmp = call i32* @f1(i32* %arg) %tmp = call i32* @f1(i32* %arg)
ret i32* %tmp ret i32* %tmp
} }
; TEST 15 ; TEST 15
define void @f15(i8* %arg) { define void @f15(i8* %arg) {
; CHECK-LABEL: define {{[^@]+}}@f15 ; CHECK-LABEL: define {{[^@]+}}@f15
; CHECK-SAME: (i8* nonnull dereferenceable(4) [[ARG:%.*]]) { ; CHECK-SAME: (i8* noundef nonnull dereferenceable(4) [[ARG:%.*]]) {
; CHECK-NEXT: tail call void @use1(i8* nonnull dereferenceable(4) [[ARG]]) ; CHECK-NEXT: tail call void @use1(i8* noundef nonnull dereferenceable(4) [[ARG]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
tail call void @use1(i8* dereferenceable(4) %arg) tail call void @use1(i8* dereferenceable(4) %arg)
ret void ret void
} }
declare void @fun0() #1 declare void @fun0() #1
▲ Show 20 Lines • Show All 317 Lines • ▼ Show 20 Linesf:
ret void ret void
} }
; The callsite must execute in order for the attribute to transfer to the parent. ; The callsite must execute in order for the attribute to transfer to the parent.
; The volatile load can't trap, so we can guarantee that we'll get to the call. ; The volatile load can't trap, so we can guarantee that we'll get to the call.
define i8 @parent6(i8* %a, i8* %b) { define i8 @parent6(i8* %a, i8* %b) {
; CHECK-LABEL: define {{[^@]+}}@parent6 ; CHECK-LABEL: define {{[^@]+}}@parent6
; CHECK-SAME: (i8* nonnull [[A:%.*]], i8* [[B:%.*]]) { ; CHECK-SAME: (i8* nonnull [[A:%.*]], i8* noundef [[B:%.*]]) {
; CHECK-NEXT: [[C:%.*]] = load volatile i8, i8* [[B]], align 1 ; CHECK-NEXT: [[C:%.*]] = load volatile i8, i8* [[B]], align 1
; CHECK-NEXT: call void @use1nonnull(i8* nonnull [[A]]) ; CHECK-NEXT: call void @use1nonnull(i8* nonnull [[A]])
; CHECK-NEXT: ret i8 [[C]] ; CHECK-NEXT: ret i8 [[C]]
; ;
%c = load volatile i8, i8* %b %c = load volatile i8, i8* %b
call void @use1nonnull(i8* %a) call void @use1nonnull(i8* %a)
ret i8 %c ret i8 %c
▲ Show 20 Lines • Show All 179 Lines • ▼ Show 20 Lines;
call void @called_by_weak(i32* %a) call void @called_by_weak(i32* %a)
ret void ret void
} }
; Expect nonnull ; Expect nonnull
define internal void @control(i32* dereferenceable(4) %a) { define internal void @control(i32* dereferenceable(4) %a) {
; NOT_CGSCC_OPM: Function Attrs: nounwind ; NOT_CGSCC_OPM: Function Attrs: nounwind
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@control ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@control
; NOT_CGSCC_OPM-SAME: (i32* noalias nocapture nonnull readnone align 16 dereferenceable(8) [[A:%.*]]) [[ATTR4]] { ; NOT_CGSCC_OPM-SAME: (i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A:%.*]]) [[ATTR4]] {
; NOT_CGSCC_OPM-NEXT: call void @use_i32_ptr(i32* noalias nocapture nonnull readnone align 16 dereferenceable(8) [[A]]) [[ATTR4]] ; NOT_CGSCC_OPM-NEXT: call void @use_i32_ptr(i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A]]) [[ATTR4]]
; NOT_CGSCC_OPM-NEXT: ret void ; NOT_CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nounwind ; IS__CGSCC_OPM: Function Attrs: nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@control ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@control
; IS__CGSCC_OPM-SAME: (i32* noalias nocapture nonnull readnone align 16 dereferenceable(8) [[A:%.*]]) [[ATTR5]] { ; IS__CGSCC_OPM-SAME: (i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A:%.*]]) [[ATTR5]] {
; IS__CGSCC_OPM-NEXT: call void @use_i32_ptr(i32* noalias nocapture nonnull readnone align 16 dereferenceable(8) [[A]]) [[ATTR5]] ; IS__CGSCC_OPM-NEXT: call void @use_i32_ptr(i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A]]) [[ATTR5]]
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
call void @use_i32_ptr(i32* %a) call void @use_i32_ptr(i32* %a)
ret void ret void
} }
; Avoid nonnull as we do not touch naked functions ; Avoid nonnull as we do not touch naked functions
define internal void @naked(i32* dereferenceable(4) %a) naked { define internal void @naked(i32* dereferenceable(4) %a) naked {
; CHECK: Function Attrs: naked ; CHECK: Function Attrs: naked
Show All 13 Lines
; CHECK-NEXT: call void @use_i32_ptr(i32* [[A]]) ; CHECK-NEXT: call void @use_i32_ptr(i32* [[A]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @use_i32_ptr(i32* %a) call void @use_i32_ptr(i32* %a)
ret void ret void
} }
define void @make_live(i32* nonnull dereferenceable(8) %a) { define void @make_live(i32* nonnull dereferenceable(8) %a) {
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@make_live ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@make_live
; NOT_CGSCC_OPM-SAME: (i32* nonnull align 16 dereferenceable(8) [[A:%.*]]) { ; NOT_CGSCC_OPM-SAME: (i32* noundef nonnull align 16 dereferenceable(8) [[A:%.*]]) {
; NOT_CGSCC_OPM-NEXT: call void @naked(i32* nonnull align 16 dereferenceable(8) [[A]]) ; NOT_CGSCC_OPM-NEXT: call void @naked(i32* noundef nonnull align 16 dereferenceable(8) [[A]])
; NOT_CGSCC_OPM-NEXT: call void @control(i32* noalias nocapture nonnull readnone align 16 dereferenceable(8) [[A]]) [[ATTR4]] ; NOT_CGSCC_OPM-NEXT: call void @control(i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A]]) [[ATTR4]]
; NOT_CGSCC_OPM-NEXT: call void @optnone(i32* nonnull align 16 dereferenceable(8) [[A]]) ; NOT_CGSCC_OPM-NEXT: call void @optnone(i32* noundef nonnull align 16 dereferenceable(8) [[A]])
; NOT_CGSCC_OPM-NEXT: ret void ; NOT_CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@make_live ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@make_live
; IS__CGSCC_OPM-SAME: (i32* nonnull align 16 dereferenceable(8) [[A:%.*]]) { ; IS__CGSCC_OPM-SAME: (i32* noundef nonnull align 16 dereferenceable(8) [[A:%.*]]) {
; IS__CGSCC_OPM-NEXT: call void @naked(i32* nonnull align 16 dereferenceable(8) [[A]]) ; IS__CGSCC_OPM-NEXT: call void @naked(i32* noundef nonnull align 16 dereferenceable(8) [[A]])
; IS__CGSCC_OPM-NEXT: call void @control(i32* noalias nocapture nonnull readnone align 16 dereferenceable(8) [[A]]) [[ATTR5]] ; IS__CGSCC_OPM-NEXT: call void @control(i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A]]) [[ATTR5]]
; IS__CGSCC_OPM-NEXT: call void @optnone(i32* nonnull align 16 dereferenceable(8) [[A]]) ; IS__CGSCC_OPM-NEXT: call void @optnone(i32* noundef nonnull align 16 dereferenceable(8) [[A]])
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
call void @naked(i32* nonnull dereferenceable(8) align 16 %a) call void @naked(i32* nonnull dereferenceable(8) align 16 %a)
call void @control(i32* nonnull dereferenceable(8) align 16 %a) call void @control(i32* nonnull dereferenceable(8) align 16 %a)
call void @optnone(i32* nonnull dereferenceable(8) align 16 %a) call void @optnone(i32* nonnull dereferenceable(8) align 16 %a)
ret void ret void
} }
▲ Show 20 Lines • Show All 525 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/norecurse.ll

Show First 20 Lines • Show All 208 Lines • ▼ Show 20 Lines
; CHECK-NEXT: ret i32 1 ; CHECK-NEXT: ret i32 1
; ;
ret i32 1 ret i32 1
} }
; Call through a function pointer ; Call through a function pointer
define i32 @eval_func1(i32 (i32)* , i32) local_unnamed_addr { define i32 @eval_func1(i32 (i32)* , i32) local_unnamed_addr {
; CHECK-LABEL: define {{[^@]+}}@eval_func1 ; CHECK-LABEL: define {{[^@]+}}@eval_func1
; CHECK-SAME: (i32 (i32)* nocapture nofree nonnull [[TMP0:%.*]], i32 [[TMP1:%.*]]) local_unnamed_addr { ; CHECK-SAME: (i32 (i32)* nocapture nofree noundef nonnull [[TMP0:%.*]], i32 [[TMP1:%.*]]) local_unnamed_addr {
; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 [[TMP0]](i32 [[TMP1]]) ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 [[TMP0]](i32 [[TMP1]])
; CHECK-NEXT: ret i32 [[TMP3]] ; CHECK-NEXT: ret i32 [[TMP3]]
; ;
%3 = tail call i32 %0(i32 %1) #2 %3 = tail call i32 %0(i32 %1) #2
ret i32 %3 ret i32 %3
} }
define i32 @eval_func2(i32 (i32)* , i32) local_unnamed_addr null_pointer_is_valid{ define i32 @eval_func2(i32 (i32)* , i32) local_unnamed_addr null_pointer_is_valid{
; CHECK: Function Attrs: null_pointer_is_valid ; CHECK: Function Attrs: null_pointer_is_valid
; CHECK-LABEL: define {{[^@]+}}@eval_func2 ; CHECK-LABEL: define {{[^@]+}}@eval_func2
; CHECK-SAME: (i32 (i32)* nocapture nofree [[TMP0:%.*]], i32 [[TMP1:%.*]]) local_unnamed_addr [[ATTR9:#.*]] { ; CHECK-SAME: (i32 (i32)* nocapture nofree noundef [[TMP0:%.*]], i32 [[TMP1:%.*]]) local_unnamed_addr [[ATTR9:#.*]] {
; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 [[TMP0]](i32 [[TMP1]]) ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 [[TMP0]](i32 [[TMP1]])
; CHECK-NEXT: ret i32 [[TMP3]] ; CHECK-NEXT: ret i32 [[TMP3]]
; ;
%3 = tail call i32 %0(i32 %1) #2 %3 = tail call i32 %0(i32 %1) #2
ret i32 %3 ret i32 %3
} }
; Call an unknown function in a dead block. ; Call an unknown function in a dead block.
Show All 22 Lines

llvm/test/Transforms/Attributor/nosync.ll

Show First 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; int load_monotonic(_Atomic int *num) { ; int load_monotonic(_Atomic int *num) {
; int n = atomic_load_explicit(num, memory_order_relaxed); ; int n = atomic_load_explicit(num, memory_order_relaxed);
; return n; ; return n;
; } ; }
define i32 @load_monotonic(i32* nocapture readonly %0) norecurse nounwind uwtable { define i32 @load_monotonic(i32* nocapture readonly %0) norecurse nounwind uwtable {
; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind uwtable willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind uwtable willreturn
; CHECK-LABEL: define {{[^@]+}}@load_monotonic ; CHECK-LABEL: define {{[^@]+}}@load_monotonic
; CHECK-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[TMP0:%.*]]) [[ATTR1:#.*]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[TMP0:%.*]]) [[ATTR1:#.*]] {
; CHECK-NEXT: [[TMP2:%.*]] = load atomic i32, i32* [[TMP0]] monotonic, align 4 ; CHECK-NEXT: [[TMP2:%.*]] = load atomic i32, i32* [[TMP0]] monotonic, align 4
; CHECK-NEXT: ret i32 [[TMP2]] ; CHECK-NEXT: ret i32 [[TMP2]]
; ;
%2 = load atomic i32, i32* %0 monotonic, align 4 %2 = load atomic i32, i32* %0 monotonic, align 4
ret i32 %2 ret i32 %2
} }
; TEST 3 ; TEST 3
; atomic store with monotonic ordering. ; atomic store with monotonic ordering.
; void store_monotonic(_Atomic int *num) { ; void store_monotonic(_Atomic int *num) {
; atomic_load_explicit(num, memory_order_relaxed); ; atomic_load_explicit(num, memory_order_relaxed);
; } ; }
define void @store_monotonic(i32* nocapture %0) norecurse nounwind uwtable { define void @store_monotonic(i32* nocapture %0) norecurse nounwind uwtable {
; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind uwtable willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind uwtable willreturn
; CHECK-LABEL: define {{[^@]+}}@store_monotonic ; CHECK-LABEL: define {{[^@]+}}@store_monotonic
; CHECK-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]]) [[ATTR1]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]]) [[ATTR1]] {
; CHECK-NEXT: store atomic i32 10, i32* [[TMP0]] monotonic, align 4 ; CHECK-NEXT: store atomic i32 10, i32* [[TMP0]] monotonic, align 4
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
store atomic i32 10, i32* %0 monotonic, align 4 store atomic i32 10, i32* %0 monotonic, align 4
ret void ret void
} }
; TEST 4 - negative, should not deduce nosync ; TEST 4 - negative, should not deduce nosync
; atomic load with acquire ordering. ; atomic load with acquire ordering.
; int load_acquire(_Atomic int *num) { ; int load_acquire(_Atomic int *num) {
; int n = atomic_load_explicit(num, memory_order_acquire); ; int n = atomic_load_explicit(num, memory_order_acquire);
; return n; ; return n;
; } ; }
define i32 @load_acquire(i32* nocapture readonly %0) norecurse nounwind uwtable { define i32 @load_acquire(i32* nocapture readonly %0) norecurse nounwind uwtable {
; CHECK: Function Attrs: argmemonly nofree norecurse nounwind uwtable willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nounwind uwtable willreturn
; CHECK-LABEL: define {{[^@]+}}@load_acquire ; CHECK-LABEL: define {{[^@]+}}@load_acquire
; CHECK-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[TMP0:%.*]]) [[ATTR2:#.*]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[TMP0:%.*]]) [[ATTR2:#.*]] {
; CHECK-NEXT: [[TMP2:%.*]] = load atomic i32, i32* [[TMP0]] acquire, align 4 ; CHECK-NEXT: [[TMP2:%.*]] = load atomic i32, i32* [[TMP0]] acquire, align 4
; CHECK-NEXT: ret i32 [[TMP2]] ; CHECK-NEXT: ret i32 [[TMP2]]
; ;
%2 = load atomic i32, i32* %0 acquire, align 4 %2 = load atomic i32, i32* %0 acquire, align 4
ret i32 %2 ret i32 %2
} }
; TEST 5 - negative, should not deduce nosync ; TEST 5 - negative, should not deduce nosync
; atomic load with release ordering ; atomic load with release ordering
; void load_release(_Atomic int *num) { ; void load_release(_Atomic int *num) {
; atomic_store_explicit(num, 10, memory_order_release); ; atomic_store_explicit(num, 10, memory_order_release);
; } ; }
define void @load_release(i32* nocapture %0) norecurse nounwind uwtable { define void @load_release(i32* nocapture %0) norecurse nounwind uwtable {
; CHECK: Function Attrs: argmemonly nofree norecurse nounwind uwtable willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nounwind uwtable willreturn
; CHECK-LABEL: define {{[^@]+}}@load_release ; CHECK-LABEL: define {{[^@]+}}@load_release
; CHECK-SAME: (i32* nocapture nofree writeonly align 4 [[TMP0:%.*]]) [[ATTR2]] { ; CHECK-SAME: (i32* nocapture nofree noundef writeonly align 4 [[TMP0:%.*]]) [[ATTR2]] {
; CHECK-NEXT: store atomic volatile i32 10, i32* [[TMP0]] release, align 4 ; CHECK-NEXT: store atomic volatile i32 10, i32* [[TMP0]] release, align 4
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
store atomic volatile i32 10, i32* %0 release, align 4 store atomic volatile i32 10, i32* %0 release, align 4
ret void ret void
} }
; TEST 6 - negative volatile, relaxed atomic ; TEST 6 - negative volatile, relaxed atomic
define void @load_volatile_release(i32* nocapture %0) norecurse nounwind uwtable { define void @load_volatile_release(i32* nocapture %0) norecurse nounwind uwtable {
; CHECK: Function Attrs: argmemonly nofree norecurse nounwind uwtable willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nounwind uwtable willreturn
; CHECK-LABEL: define {{[^@]+}}@load_volatile_release ; CHECK-LABEL: define {{[^@]+}}@load_volatile_release
; CHECK-SAME: (i32* nocapture nofree writeonly align 4 [[TMP0:%.*]]) [[ATTR2]] { ; CHECK-SAME: (i32* nocapture nofree noundef writeonly align 4 [[TMP0:%.*]]) [[ATTR2]] {
; CHECK-NEXT: store atomic volatile i32 10, i32* [[TMP0]] release, align 4 ; CHECK-NEXT: store atomic volatile i32 10, i32* [[TMP0]] release, align 4
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
store atomic volatile i32 10, i32* %0 release, align 4 store atomic volatile i32 10, i32* %0 release, align 4
ret void ret void
} }
; TEST 7 - negative, should not deduce nosync ; TEST 7 - negative, should not deduce nosync
; volatile store. ; volatile store.
; void volatile_store(volatile int *num) { ; void volatile_store(volatile int *num) {
; *num = 14; ; *num = 14;
; } ; }
define void @volatile_store(i32* %0) norecurse nounwind uwtable { define void @volatile_store(i32* %0) norecurse nounwind uwtable {
; CHECK: Function Attrs: argmemonly nofree norecurse nounwind uwtable willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nounwind uwtable willreturn
; CHECK-LABEL: define {{[^@]+}}@volatile_store ; CHECK-LABEL: define {{[^@]+}}@volatile_store
; CHECK-SAME: (i32* nofree align 4 [[TMP0:%.*]]) [[ATTR2]] { ; CHECK-SAME: (i32* nofree noundef align 4 [[TMP0:%.*]]) [[ATTR2]] {
; CHECK-NEXT: store volatile i32 14, i32* [[TMP0]], align 4 ; CHECK-NEXT: store volatile i32 14, i32* [[TMP0]], align 4
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
store volatile i32 14, i32* %0, align 4 store volatile i32 14, i32* %0, align 4
ret void ret void
} }
; TEST 8 - negative, should not deduce nosync ; TEST 8 - negative, should not deduce nosync
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; } ; }
%"struct.std::atomic" = type { %"struct.std::__atomic_base" } %"struct.std::atomic" = type { %"struct.std::__atomic_base" }
%"struct.std::__atomic_base" = type { i8 } %"struct.std::__atomic_base" = type { i8 }
define void @foo1(i32* %0, %"struct.std::atomic"* %1) { define void @foo1(i32* %0, %"struct.std::atomic"* %1) {
; IS__TUNIT____: Function Attrs: nofree nounwind willreturn ; IS__TUNIT____: Function Attrs: nofree nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@foo1
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull writeonly dereferenceable(1) [[TMP1:%.*]]) [[ATTR6:#.*]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull writeonly dereferenceable(1) [[TMP1:%.*]]) [[ATTR6:#.*]] {
; IS__TUNIT____-NEXT: store i32 100, i32* [[TMP0]], align 4 ; IS__TUNIT____-NEXT: store i32 100, i32* [[TMP0]], align 4
; IS__TUNIT____-NEXT: fence release ; IS__TUNIT____-NEXT: fence release
; IS__TUNIT____-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0 ; IS__TUNIT____-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0
; IS__TUNIT____-NEXT: store atomic i8 1, i8* [[TMP3]] monotonic, align 1 ; IS__TUNIT____-NEXT: store atomic i8 1, i8* [[TMP3]] monotonic, align 1
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@foo1
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull writeonly dereferenceable(1) [[TMP1:%.*]]) [[ATTR6:#.*]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull writeonly dereferenceable(1) [[TMP1:%.*]]) [[ATTR6:#.*]] {
; IS__CGSCC____-NEXT: store i32 100, i32* [[TMP0]], align 4 ; IS__CGSCC____-NEXT: store i32 100, i32* [[TMP0]], align 4
; IS__CGSCC____-NEXT: fence release ; IS__CGSCC____-NEXT: fence release
; IS__CGSCC____-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0 ; IS__CGSCC____-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0
; IS__CGSCC____-NEXT: store atomic i8 1, i8* [[TMP3]] monotonic, align 1 ; IS__CGSCC____-NEXT: store atomic i8 1, i8* [[TMP3]] monotonic, align 1
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
store i32 100, i32* %0, align 4 store i32 100, i32* %0, align 4
fence release fence release
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines8: ; preds = %4
fence acquire fence acquire
ret void ret void
} }
; TEST 13 - Fence syncscope("singlethread") seq_cst ; TEST 13 - Fence syncscope("singlethread") seq_cst
define void @foo1_singlethread(i32* %0, %"struct.std::atomic"* %1) { define void @foo1_singlethread(i32* %0, %"struct.std::atomic"* %1) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo1_singlethread ; IS__TUNIT____-LABEL: define {{[^@]+}}@foo1_singlethread
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull writeonly dereferenceable(1) [[TMP1:%.*]]) [[ATTR8:#.*]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull writeonly dereferenceable(1) [[TMP1:%.*]]) [[ATTR8:#.*]] {
; IS__TUNIT____-NEXT: store i32 100, i32* [[TMP0]], align 4 ; IS__TUNIT____-NEXT: store i32 100, i32* [[TMP0]], align 4
; IS__TUNIT____-NEXT: fence syncscope("singlethread") release ; IS__TUNIT____-NEXT: fence syncscope("singlethread") release
; IS__TUNIT____-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0 ; IS__TUNIT____-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0
; IS__TUNIT____-NEXT: store atomic i8 1, i8* [[TMP3]] monotonic, align 1 ; IS__TUNIT____-NEXT: store atomic i8 1, i8* [[TMP3]] monotonic, align 1
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo1_singlethread ; IS__CGSCC____-LABEL: define {{[^@]+}}@foo1_singlethread
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull writeonly dereferenceable(1) [[TMP1:%.*]]) [[ATTR8:#.*]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull writeonly dereferenceable(1) [[TMP1:%.*]]) [[ATTR8:#.*]] {
; IS__CGSCC____-NEXT: store i32 100, i32* [[TMP0]], align 4 ; IS__CGSCC____-NEXT: store i32 100, i32* [[TMP0]], align 4
; IS__CGSCC____-NEXT: fence syncscope("singlethread") release ; IS__CGSCC____-NEXT: fence syncscope("singlethread") release
; IS__CGSCC____-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0 ; IS__CGSCC____-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0
; IS__CGSCC____-NEXT: store atomic i8 1, i8* [[TMP3]] monotonic, align 1 ; IS__CGSCC____-NEXT: store atomic i8 1, i8* [[TMP3]] monotonic, align 1
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
store i32 100, i32* %0, align 4 store i32 100, i32* %0, align 4
fence syncscope("singlethread") release fence syncscope("singlethread") release
▲ Show 20 Lines • Show All 172 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/range.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=25 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=25 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=31 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=31 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; FIXME: CGSCC is not looking at callees and calleers even though it could be allowed. ; FIXME: CGSCC is not looking at callees and calleers even though it could be allowed.
define i32 @test0(i32* %p) { define i32 @test0(i32* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test0 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test0
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0:#.*]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0:#.*]] {
; IS__TUNIT____-NEXT: [[A:%.*]] = load i32, i32* [[P]], align 4, [[RNG0:!range !.*]] ; IS__TUNIT____-NEXT: [[A:%.*]] = load i32, i32* [[P]], align 4, [[RNG0:!range !.*]]
; IS__TUNIT____-NEXT: ret i32 [[A]] ; IS__TUNIT____-NEXT: ret i32 [[A]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test0 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test0
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0:#.*]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0:#.*]] {
; IS__CGSCC____-NEXT: [[A:%.*]] = load i32, i32* [[P]], align 4, [[RNG0:!range !.*]] ; IS__CGSCC____-NEXT: [[A:%.*]] = load i32, i32* [[P]], align 4, [[RNG0:!range !.*]]
; IS__CGSCC____-NEXT: ret i32 [[A]] ; IS__CGSCC____-NEXT: ret i32 [[A]]
; ;
%a = load i32, i32* %p, !range !0 %a = load i32, i32* %p, !range !0
ret i32 %a ret i32 %a
} }
define i32 @test0-range-check(i32* %p) { define i32 @test0-range-check(i32* %p) {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test0-range-check ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test0-range-check
; IS__TUNIT_OPM-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) [[ATTR0:#.*]] { ; IS__TUNIT_OPM-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) [[ATTR0:#.*]] {
; IS__TUNIT_OPM-NEXT: [[A:%.*]] = tail call i32 @test0(i32* nocapture nofree readonly align 4 [[P]]) [[ATTR3:#.*]], [[RNG0:!range !.*]] ; IS__TUNIT_OPM-NEXT: [[A:%.*]] = tail call i32 @test0(i32* nocapture nofree readonly align 4 [[P]]) [[ATTR3:#.*]], [[RNG0:!range !.*]]
; IS__TUNIT_OPM-NEXT: ret i32 [[A]] ; IS__TUNIT_OPM-NEXT: ret i32 [[A]]
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test0-range-check ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test0-range-check
; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) [[ATTR0:#.*]] { ; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) [[ATTR0:#.*]] {
; IS__TUNIT_NPM-NEXT: [[A:%.*]] = tail call i32 @test0(i32* nocapture nofree readonly align 4 [[P]]) [[ATTR2:#.*]], [[RNG0:!range !.*]] ; IS__TUNIT_NPM-NEXT: [[A:%.*]] = tail call i32 @test0(i32* nocapture nofree readonly align 4 [[P]]) [[ATTR2:#.*]], [[RNG0:!range !.*]]
; IS__TUNIT_NPM-NEXT: ret i32 [[A]] ; IS__TUNIT_NPM-NEXT: ret i32 [[A]]
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test0-range-check ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test0-range-check
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0:#.*]] { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0:#.*]] {
; IS__CGSCC_OPM-NEXT: [[A:%.*]] = tail call i32 @test0(i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P]]) [[ATTR3:#.*]], [[RNG0:!range !.*]] ; IS__CGSCC_OPM-NEXT: [[A:%.*]] = tail call i32 @test0(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) [[ATTR3:#.*]], [[RNG0:!range !.*]]
; IS__CGSCC_OPM-NEXT: ret i32 [[A]] ; IS__CGSCC_OPM-NEXT: ret i32 [[A]]
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test0-range-check ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test0-range-check
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0:#.*]] { ; IS__CGSCC_NPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0:#.*]] {
; IS__CGSCC_NPM-NEXT: [[A:%.*]] = tail call i32 @test0(i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P]]) [[ATTR2:#.*]], [[RNG0:!range !.*]] ; IS__CGSCC_NPM-NEXT: [[A:%.*]] = tail call i32 @test0(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) [[ATTR2:#.*]], [[RNG0:!range !.*]]
; IS__CGSCC_NPM-NEXT: ret i32 [[A]] ; IS__CGSCC_NPM-NEXT: ret i32 [[A]]
; ;
%a = tail call i32 @test0(i32* %p) %a = tail call i32 @test0(i32* %p)
ret i32 %a ret i32 %a
} }
declare void @use3-dummy(i1, i1, i1) declare void @use3-dummy(i1, i1, i1)
define void @use3(i1, i1, i1) { define void @use3(i1, i1, i1) {
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; IS__TUNIT_NPM-NEXT: [[CMP_LTE_3:%.*]] = icmp sle i32 [[RET]], 8 ; IS__TUNIT_NPM-NEXT: [[CMP_LTE_3:%.*]] = icmp sle i32 [[RET]], 8
; IS__TUNIT_NPM-NEXT: [[CMP_LTE_4:%.*]] = icmp sle i32 [[RET]], 1 ; IS__TUNIT_NPM-NEXT: [[CMP_LTE_4:%.*]] = icmp sle i32 [[RET]], 1
; IS__TUNIT_NPM-NEXT: [[CMP_LTE_5:%.*]] = icmp sle i32 [[RET]], 0 ; IS__TUNIT_NPM-NEXT: [[CMP_LTE_5:%.*]] = icmp sle i32 [[RET]], 0
; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 noundef true, i1 noundef true, i1 [[CMP_LTE_3]]) ; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 noundef true, i1 noundef true, i1 [[CMP_LTE_3]])
; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_LTE_4]], i1 [[CMP_LTE_5]], i1 noundef false) ; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_LTE_4]], i1 [[CMP_LTE_5]], i1 noundef false)
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test0-icmp-check ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test0-icmp-check
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) {
; IS__CGSCC_OPM-NEXT: [[RET:%.*]] = tail call i32 @test0(i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P]]) [[ATTR3]], [[RNG0]] ; IS__CGSCC_OPM-NEXT: [[RET:%.*]] = tail call i32 @test0(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) [[ATTR3]], [[RNG0]]
; IS__CGSCC_OPM-NEXT: [[CMP_EQ_2:%.*]] = icmp eq i32 [[RET]], 9 ; IS__CGSCC_OPM-NEXT: [[CMP_EQ_2:%.*]] = icmp eq i32 [[RET]], 9
; IS__CGSCC_OPM-NEXT: [[CMP_EQ_3:%.*]] = icmp eq i32 [[RET]], 8 ; IS__CGSCC_OPM-NEXT: [[CMP_EQ_3:%.*]] = icmp eq i32 [[RET]], 8
; IS__CGSCC_OPM-NEXT: [[CMP_EQ_4:%.*]] = icmp eq i32 [[RET]], 1 ; IS__CGSCC_OPM-NEXT: [[CMP_EQ_4:%.*]] = icmp eq i32 [[RET]], 1
; IS__CGSCC_OPM-NEXT: [[CMP_EQ_5:%.*]] = icmp eq i32 [[RET]], 0 ; IS__CGSCC_OPM-NEXT: [[CMP_EQ_5:%.*]] = icmp eq i32 [[RET]], 0
; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_EQ_2]], i1 [[CMP_EQ_3]]) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_EQ_2]], i1 [[CMP_EQ_3]])
; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_EQ_4]], i1 [[CMP_EQ_5]], i1 noundef false) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_EQ_4]], i1 [[CMP_EQ_5]], i1 noundef false)
; IS__CGSCC_OPM-NEXT: [[CMP_NE_2:%.*]] = icmp ne i32 [[RET]], 9 ; IS__CGSCC_OPM-NEXT: [[CMP_NE_2:%.*]] = icmp ne i32 [[RET]], 9
; IS__CGSCC_OPM-NEXT: [[CMP_NE_3:%.*]] = icmp ne i32 [[RET]], 8 ; IS__CGSCC_OPM-NEXT: [[CMP_NE_3:%.*]] = icmp ne i32 [[RET]], 8
Show All 29 Lines
; IS__CGSCC_OPM-NEXT: [[CMP_LTE_3:%.*]] = icmp sle i32 [[RET]], 8 ; IS__CGSCC_OPM-NEXT: [[CMP_LTE_3:%.*]] = icmp sle i32 [[RET]], 8
; IS__CGSCC_OPM-NEXT: [[CMP_LTE_4:%.*]] = icmp sle i32 [[RET]], 1 ; IS__CGSCC_OPM-NEXT: [[CMP_LTE_4:%.*]] = icmp sle i32 [[RET]], 1
; IS__CGSCC_OPM-NEXT: [[CMP_LTE_5:%.*]] = icmp sle i32 [[RET]], 0 ; IS__CGSCC_OPM-NEXT: [[CMP_LTE_5:%.*]] = icmp sle i32 [[RET]], 0
; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef true, i1 noundef true, i1 [[CMP_LTE_3]]) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef true, i1 noundef true, i1 [[CMP_LTE_3]])
; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_LTE_4]], i1 [[CMP_LTE_5]], i1 noundef false) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_LTE_4]], i1 [[CMP_LTE_5]], i1 noundef false)
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test0-icmp-check ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test0-icmp-check
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) { ; IS__CGSCC_NPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) {
; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = tail call i32 @test0(i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P]]) [[ATTR2]], [[RNG0]] ; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = tail call i32 @test0(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) [[ATTR2]], [[RNG0]]
; IS__CGSCC_NPM-NEXT: [[CMP_EQ_2:%.*]] = icmp eq i32 [[RET]], 9 ; IS__CGSCC_NPM-NEXT: [[CMP_EQ_2:%.*]] = icmp eq i32 [[RET]], 9
; IS__CGSCC_NPM-NEXT: [[CMP_EQ_3:%.*]] = icmp eq i32 [[RET]], 8 ; IS__CGSCC_NPM-NEXT: [[CMP_EQ_3:%.*]] = icmp eq i32 [[RET]], 8
; IS__CGSCC_NPM-NEXT: [[CMP_EQ_4:%.*]] = icmp eq i32 [[RET]], 1 ; IS__CGSCC_NPM-NEXT: [[CMP_EQ_4:%.*]] = icmp eq i32 [[RET]], 1
; IS__CGSCC_NPM-NEXT: [[CMP_EQ_5:%.*]] = icmp eq i32 [[RET]], 0 ; IS__CGSCC_NPM-NEXT: [[CMP_EQ_5:%.*]] = icmp eq i32 [[RET]], 0
; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_EQ_2]], i1 [[CMP_EQ_3]]) ; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_EQ_2]], i1 [[CMP_EQ_3]])
; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 [[CMP_EQ_4]], i1 [[CMP_EQ_5]], i1 noundef false) ; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 [[CMP_EQ_4]], i1 [[CMP_EQ_5]], i1 noundef false)
; IS__CGSCC_NPM-NEXT: [[CMP_NE_2:%.*]] = icmp ne i32 [[RET]], 9 ; IS__CGSCC_NPM-NEXT: [[CMP_NE_2:%.*]] = icmp ne i32 [[RET]], 9
; IS__CGSCC_NPM-NEXT: [[CMP_NE_3:%.*]] = icmp ne i32 [[RET]], 8 ; IS__CGSCC_NPM-NEXT: [[CMP_NE_3:%.*]] = icmp ne i32 [[RET]], 8
▲ Show 20 Lines • Show All 115 Lines • ▼ Show 20 Lines;
tail call void @use3(i1 %cmp-lte-1, i1 %cmp-lte-2, i1 %cmp-lte-3) tail call void @use3(i1 %cmp-lte-1, i1 %cmp-lte-2, i1 %cmp-lte-3)
tail call void @use3(i1 %cmp-lte-4, i1 %cmp-lte-5, i1 %cmp-lte-6) tail call void @use3(i1 %cmp-lte-4, i1 %cmp-lte-5, i1 %cmp-lte-6)
ret void ret void
} }
define i32 @test1(i32* %p) { define i32 @test1(i32* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test1
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0]] {
; IS__TUNIT____-NEXT: [[LOAD_10_100:%.*]] = load i32, i32* [[P]], align 4, [[RNG1:!range !.*]] ; IS__TUNIT____-NEXT: [[LOAD_10_100:%.*]] = load i32, i32* [[P]], align 4, [[RNG1:!range !.*]]
; IS__TUNIT____-NEXT: [[ADD_10_THEN_20_110:%.*]] = add i32 [[LOAD_10_100]], 10 ; IS__TUNIT____-NEXT: [[ADD_10_THEN_20_110:%.*]] = add i32 [[LOAD_10_100]], 10
; IS__TUNIT____-NEXT: [[MUL_10_THEN_200_1091:%.*]] = mul i32 [[ADD_10_THEN_20_110]], 10 ; IS__TUNIT____-NEXT: [[MUL_10_THEN_200_1091:%.*]] = mul i32 [[ADD_10_THEN_20_110]], 10
; IS__TUNIT____-NEXT: ret i32 [[MUL_10_THEN_200_1091]] ; IS__TUNIT____-NEXT: ret i32 [[MUL_10_THEN_200_1091]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test1
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0]] {
; IS__CGSCC____-NEXT: [[LOAD_10_100:%.*]] = load i32, i32* [[P]], align 4, [[RNG1:!range !.*]] ; IS__CGSCC____-NEXT: [[LOAD_10_100:%.*]] = load i32, i32* [[P]], align 4, [[RNG1:!range !.*]]
; IS__CGSCC____-NEXT: [[ADD_10_THEN_20_110:%.*]] = add i32 [[LOAD_10_100]], 10 ; IS__CGSCC____-NEXT: [[ADD_10_THEN_20_110:%.*]] = add i32 [[LOAD_10_100]], 10
; IS__CGSCC____-NEXT: [[MUL_10_THEN_200_1091:%.*]] = mul i32 [[ADD_10_THEN_20_110]], 10 ; IS__CGSCC____-NEXT: [[MUL_10_THEN_200_1091:%.*]] = mul i32 [[ADD_10_THEN_20_110]], 10
; IS__CGSCC____-NEXT: ret i32 [[MUL_10_THEN_200_1091]] ; IS__CGSCC____-NEXT: ret i32 [[MUL_10_THEN_200_1091]]
; ;
%load-10-100 = load i32, i32* %p, !range !1 %load-10-100 = load i32, i32* %p, !range !1
%add-10-then-20-110 = add i32 %load-10-100, 10 %add-10-then-20-110 = add i32 %load-10-100, 10
%mul-10-then-200-1091 = mul i32 %add-10-then-20-110, 10 %mul-10-then-200-1091 = mul i32 %add-10-then-20-110, 10
Show All 13 Lines
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test1-check ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test1-check
; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) [[ATTR0]] { ; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) [[ATTR0]] {
; IS__TUNIT_NPM-NEXT: [[RES:%.*]] = tail call i32 @test1(i32* nocapture nofree readonly align 4 [[P]]) [[ATTR2]], [[RNG2:!range !.*]] ; IS__TUNIT_NPM-NEXT: [[RES:%.*]] = tail call i32 @test1(i32* nocapture nofree readonly align 4 [[P]]) [[ATTR2]], [[RNG2:!range !.*]]
; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp eq i32 [[RES]], 500 ; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp eq i32 [[RES]], 500
; IS__TUNIT_NPM-NEXT: ret i1 [[CMP]] ; IS__TUNIT_NPM-NEXT: ret i1 [[CMP]]
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test1-check ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test1-check
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0]] { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0]] {
; IS__CGSCC_OPM-NEXT: [[RES:%.*]] = tail call i32 @test1(i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P]]) [[ATTR3]], [[RNG2:!range !.*]] ; IS__CGSCC_OPM-NEXT: [[RES:%.*]] = tail call i32 @test1(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) [[ATTR3]], [[RNG2:!range !.*]]
; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp eq i32 [[RES]], 500 ; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp eq i32 [[RES]], 500
; IS__CGSCC_OPM-NEXT: ret i1 [[CMP]] ; IS__CGSCC_OPM-NEXT: ret i1 [[CMP]]
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test1-check ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test1-check
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0]] { ; IS__CGSCC_NPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[RES:%.*]] = tail call i32 @test1(i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P]]) [[ATTR2]], [[RNG2:!range !.*]] ; IS__CGSCC_NPM-NEXT: [[RES:%.*]] = tail call i32 @test1(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) [[ATTR2]], [[RNG2:!range !.*]]
; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp eq i32 [[RES]], 500 ; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp eq i32 [[RES]], 500
; IS__CGSCC_NPM-NEXT: ret i1 [[CMP]] ; IS__CGSCC_NPM-NEXT: ret i1 [[CMP]]
; ;
%res = tail call i32 @test1(i32* %p) %res = tail call i32 @test1(i32* %p)
%cmp = icmp eq i32 %res, 500 %cmp = icmp eq i32 %res, 500
ret i1 %cmp ret i1 %cmp
} }
; TEST2 ; TEST2
; int test2(int *p) { return *p == 0 ? 4 : 3; } ; int test2(int *p) { return *p == 0 ? 4 : 3; }
; int test2_check(int *p) { ; int test2_check(int *p) {
; int call = test2(p); ; int call = test2(p);
; if (call == 5) { ; if (call == 5) {
; // dead block ; // dead block
; return 2; ; return 2;
; } else { ; } else {
; return 3; ; return 3;
; } ; }
; } ; }
define i32 @test2(i32* %p) { define i32 @test2(i32* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test2
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[P]], align 4 ; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[P]], align 4
; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0 ; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0
; IS__TUNIT____-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 4, i32 3 ; IS__TUNIT____-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 4, i32 3
; IS__TUNIT____-NEXT: ret i32 [[COND]] ; IS__TUNIT____-NEXT: ret i32 [[COND]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test2
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* [[P]], align 4 ; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* [[P]], align 4
; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0 ; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0
; IS__CGSCC____-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 4, i32 3 ; IS__CGSCC____-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 4, i32 3
; IS__CGSCC____-NEXT: ret i32 [[COND]] ; IS__CGSCC____-NEXT: ret i32 [[COND]]
; ;
entry: entry:
%0 = load i32, i32* %p, align 4 %0 = load i32, i32* %p, align 4
Show All 12 Lines
; IS__TUNIT____-NEXT: br label [[RETURN:%.*]] ; IS__TUNIT____-NEXT: br label [[RETURN:%.*]]
; IS__TUNIT____: if.end: ; IS__TUNIT____: if.end:
; IS__TUNIT____-NEXT: unreachable ; IS__TUNIT____-NEXT: unreachable
; IS__TUNIT____: return: ; IS__TUNIT____: return:
; IS__TUNIT____-NEXT: ret i32 2 ; IS__TUNIT____-NEXT: ret i32 2
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test2_check ; IS__CGSCC____-LABEL: define {{[^@]+}}@test2_check
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) [[ATTR0]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: br label [[IF_THEN:%.*]] ; IS__CGSCC____-NEXT: br label [[IF_THEN:%.*]]
; IS__CGSCC____: if.then: ; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: br label [[RETURN:%.*]] ; IS__CGSCC____-NEXT: br label [[RETURN:%.*]]
; IS__CGSCC____: if.end: ; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: return: ; IS__CGSCC____: return:
; IS__CGSCC____-NEXT: ret i32 2 ; IS__CGSCC____-NEXT: ret i32 2
▲ Show 20 Lines • Show All 1,436 Lines • ▼ Show 20 Lines;
%r = icmp ne i8 %v, 0 %r = icmp ne i8 %v, 0
ret i1 %r ret i1 %r
} }
; Avoid range metadata for %l below ; Avoid range metadata for %l below
define i1 @context(i8* %p) { define i1 @context(i8* %p) {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@context ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@context
; IS__TUNIT_OPM-SAME: (i8* nocapture nofree nonnull readonly dereferenceable(1) [[P:%.*]]) [[ATTR0]] { ; IS__TUNIT_OPM-SAME: (i8* nocapture nofree noundef nonnull readonly dereferenceable(1) [[P:%.*]]) [[ATTR0]] {
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1
; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]] ; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]]
; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT_OPM: t: ; IS__TUNIT_OPM: t:
; IS__TUNIT_OPM-NEXT: [[R:%.*]] = call i1 @non_zero(i8 [[L]]) [[ATTR2]] ; IS__TUNIT_OPM-NEXT: [[R:%.*]] = call i1 @non_zero(i8 [[L]]) [[ATTR2]]
; IS__TUNIT_OPM-NEXT: ret i1 [[R]] ; IS__TUNIT_OPM-NEXT: ret i1 [[R]]
; IS__TUNIT_OPM: f: ; IS__TUNIT_OPM: f:
; IS__TUNIT_OPM-NEXT: ret i1 false ; IS__TUNIT_OPM-NEXT: ret i1 false
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@context ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@context
; IS__TUNIT_NPM-SAME: (i8* nocapture nofree nonnull readonly dereferenceable(1) [[P:%.*]]) [[ATTR0]] { ; IS__TUNIT_NPM-SAME: (i8* nocapture nofree noundef nonnull readonly dereferenceable(1) [[P:%.*]]) [[ATTR0]] {
; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1 ; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1
; IS__TUNIT_NPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]] ; IS__TUNIT_NPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]]
; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT_NPM: t: ; IS__TUNIT_NPM: t:
; IS__TUNIT_NPM-NEXT: ret i1 true ; IS__TUNIT_NPM-NEXT: ret i1 true
; IS__TUNIT_NPM: f: ; IS__TUNIT_NPM: f:
; IS__TUNIT_NPM-NEXT: ret i1 false ; IS__TUNIT_NPM-NEXT: ret i1 false
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@context ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@context
; IS__CGSCC_OPM-SAME: (i8* nocapture nofree nonnull readonly dereferenceable(1) [[P:%.*]]) [[ATTR0]] { ; IS__CGSCC_OPM-SAME: (i8* nocapture nofree noundef nonnull readonly dereferenceable(1) [[P:%.*]]) [[ATTR0]] {
; IS__CGSCC_OPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1 ; IS__CGSCC_OPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]] ; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]]
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_OPM: t: ; IS__CGSCC_OPM: t:
; IS__CGSCC_OPM-NEXT: [[R:%.*]] = call i1 @non_zero(i8 [[L]]) [[ATTR5]] ; IS__CGSCC_OPM-NEXT: [[R:%.*]] = call i1 @non_zero(i8 [[L]]) [[ATTR5]]
; IS__CGSCC_OPM-NEXT: ret i1 [[R]] ; IS__CGSCC_OPM-NEXT: ret i1 [[R]]
; IS__CGSCC_OPM: f: ; IS__CGSCC_OPM: f:
; IS__CGSCC_OPM-NEXT: ret i1 false ; IS__CGSCC_OPM-NEXT: ret i1 false
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@context ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@context
; IS__CGSCC_NPM-SAME: (i8* nocapture nofree nonnull readonly dereferenceable(1) [[P:%.*]]) [[ATTR0]] { ; IS__CGSCC_NPM-SAME: (i8* nocapture nofree noundef nonnull readonly dereferenceable(1) [[P:%.*]]) [[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1 ; IS__CGSCC_NPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]] ; IS__CGSCC_NPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]]
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_NPM: t: ; IS__CGSCC_NPM: t:
; IS__CGSCC_NPM-NEXT: ret i1 true ; IS__CGSCC_NPM-NEXT: ret i1 true
; IS__CGSCC_NPM: f: ; IS__CGSCC_NPM: f:
; IS__CGSCC_NPM-NEXT: ret i1 false ; IS__CGSCC_NPM-NEXT: ret i1 false
; ;
%l = load i8, i8* %p %l = load i8, i8* %p
%c = icmp slt i8 0, %l %c = icmp slt i8 0, %l
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
%r = call i1 @non_zero(i8 %l) %r = call i1 @non_zero(i8 %l)
ret i1 %r ret i1 %r
f: f:
ret i1 false ret i1 false
} }
define void @spam(i32* %arg, i32* %arg1) { define void @spam(i32* %arg, i32* %arg1) {
; CHECK-LABEL: define {{[^@]+}}@spam ; CHECK-LABEL: define {{[^@]+}}@spam
; CHECK-SAME: (i32* nocapture nonnull readonly align 8 dereferenceable(4) [[ARG:%.*]], i32* nocapture nofree readnone [[ARG1:%.*]]) { ; CHECK-SAME: (i32* nocapture noundef nonnull readonly align 8 dereferenceable(4) [[ARG:%.*]], i32* nocapture nofree readnone [[ARG1:%.*]]) {
; CHECK-NEXT: bb: ; CHECK-NEXT: bb:
; CHECK-NEXT: [[TMP:%.*]] = load i32, i32* [[ARG]], align 8 ; CHECK-NEXT: [[TMP:%.*]] = load i32, i32* [[ARG]], align 8
; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP]], 4 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP]], 4
; CHECK-NEXT: br i1 [[TMP2]], label [[BB3:%.*]], label [[BB4:%.*]] ; CHECK-NEXT: br i1 [[TMP2]], label [[BB3:%.*]], label [[BB4:%.*]]
; CHECK: bb3: ; CHECK: bb3:
; CHECK-NEXT: call fastcc void @wobble(i32 signext [[TMP]]) ; CHECK-NEXT: call fastcc void @wobble(i32 signext [[TMP]])
; CHECK-NEXT: br label [[BB5:%.*]] ; CHECK-NEXT: br label [[BB5:%.*]]
; CHECK: bb4: ; CHECK: bb4:
▲ Show 20 Lines • Show All 80 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/read_write_returned_arguments_scc.ll

Show First 20 Lines • Show All 137 Lines • ▼ Show 20 Lines
return: ; preds = %if.end, %if.then return: ; preds = %if.end, %if.then
%retval.0 = phi i32* [ %call5, %if.end ], [ %n0, %if.then ] %retval.0 = phi i32* [ %call5, %if.end ], [ %n0, %if.then ]
ret i32* %retval.0 ret i32* %retval.0
} }
define internal i32* @internal_ret1_rrw(i32* %r0, i32* %r1, i32* %w0) { define internal i32* @internal_ret1_rrw(i32* %r0, i32* %r1, i32* %w0) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind
; IS__TUNIT____-LABEL: define {{[^@]+}}@internal_ret1_rrw ; IS__TUNIT____-LABEL: define {{[^@]+}}@internal_ret1_rrw
; IS__TUNIT____-SAME: (i32* nofree nonnull align 4 dereferenceable(4) [[R0:%.*]], i32* nofree returned [[R1:%.*]], i32* nofree [[W0:%.*]]) [[ATTR0]] { ; IS__TUNIT____-SAME: (i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0:%.*]], i32* nofree returned [[R1:%.*]], i32* nofree [[W0:%.*]]) [[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[R0]], align 4 ; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[R0]], align 4
; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 ; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
; IS__TUNIT____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__TUNIT____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT____: if.then: ; IS__TUNIT____: if.then:
; IS__TUNIT____-NEXT: br label [[RETURN:%.*]] ; IS__TUNIT____-NEXT: br label [[RETURN:%.*]]
; IS__TUNIT____: if.end: ; IS__TUNIT____: if.end:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rw(i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nofree [[W0]]) [[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree [[W0]]) [[ATTR2]]
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* [[R0]], align 4 ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* [[R0]], align 4
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = load i32, i32* [[R1]], align 4 ; IS__TUNIT____-NEXT: [[TMP2:%.*]] = load i32, i32* [[R1]], align 4
; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]] ; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]]
; IS__TUNIT____-NEXT: store i32 [[ADD]], i32* [[W0]], align 4 ; IS__TUNIT____-NEXT: store i32 [[ADD]], i32* [[W0]], align 4
; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret1_rw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret1_rw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]]
; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32* @internal_ret0_nw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]]
; IS__TUNIT____-NEXT: [[CALL3:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[W0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL3:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[W0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]]
; IS__TUNIT____-NEXT: [[CALL4:%.*]] = call i32* @external_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL4:%.*]] = call i32* @external_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]]
; IS__TUNIT____-NEXT: [[CALL5:%.*]] = call i32* @external_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL5:%.*]] = call i32* @external_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]]
; IS__TUNIT____-NEXT: [[CALL6:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[R1]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) [[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL6:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[R1]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) [[ATTR2]]
; IS__TUNIT____-NEXT: [[CALL7:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) [[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL7:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) [[ATTR2]]
; IS__TUNIT____-NEXT: [[CALL8:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL8:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]]
; IS__TUNIT____-NEXT: br label [[RETURN]] ; IS__TUNIT____-NEXT: br label [[RETURN]]
; IS__TUNIT____: return: ; IS__TUNIT____: return:
; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL8]], [[IF_END]] ], [ [[R1]], [[IF_THEN]] ] ; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL8]], [[IF_END]] ], [ [[R1]], [[IF_THEN]] ]
; IS__TUNIT____-NEXT: ret i32* undef ; IS__TUNIT____-NEXT: ret i32* undef
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind ; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@internal_ret1_rrw ; IS__CGSCC____-LABEL: define {{[^@]+}}@internal_ret1_rrw
; IS__CGSCC____-SAME: (i32* nofree nonnull align 4 dereferenceable(4) [[R0:%.*]], i32* nofree nonnull returned align 4 dereferenceable(4) [[R1:%.*]], i32* nofree [[W0:%.*]]) [[ATTR0]] { ; IS__CGSCC____-SAME: (i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0:%.*]], i32* nofree nonnull returned align 4 dereferenceable(4) [[R1:%.*]], i32* nofree [[W0:%.*]]) [[ATTR0]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* [[R0]], align 4 ; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* [[R0]], align 4
; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 ; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC____: if.then: ; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: br label [[RETURN:%.*]] ; IS__CGSCC____-NEXT: br label [[RETURN:%.*]]
; IS__CGSCC____: if.end: ; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rw(i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nofree [[W0]]) [[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree [[W0]]) [[ATTR2]]
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* [[R0]], align 4 ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* [[R0]], align 4
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = load i32, i32* [[R1]], align 4 ; IS__CGSCC____-NEXT: [[TMP2:%.*]] = load i32, i32* [[R1]], align 4
; IS__CGSCC____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]] ; IS__CGSCC____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]]
; IS__CGSCC____-NEXT: store i32 [[ADD]], i32* [[W0]], align 4 ; IS__CGSCC____-NEXT: store i32 [[ADD]], i32* [[W0]], align 4
; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret1_rw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret1_rw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]]
; IS__CGSCC____-NEXT: [[CALL2:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL2:%.*]] = call i32* @internal_ret0_nw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]]
; IS__CGSCC____-NEXT: [[CALL3:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[W0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL3:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[W0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]]
; IS__CGSCC____-NEXT: [[CALL4:%.*]] = call i32* @external_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL4:%.*]] = call i32* @external_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]]
; IS__CGSCC____-NEXT: [[CALL5:%.*]] = call i32* @external_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL5:%.*]] = call i32* @external_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]]
; IS__CGSCC____-NEXT: [[CALL6:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[R1]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) [[ATTR3]] ; IS__CGSCC____-NEXT: [[CALL6:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[R1]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) [[ATTR3]]
; IS__CGSCC____-NEXT: [[CALL7:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) [[ATTR3]] ; IS__CGSCC____-NEXT: [[CALL7:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) [[ATTR3]]
; IS__CGSCC____-NEXT: [[CALL8:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL8:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]]
; IS__CGSCC____-NEXT: br label [[RETURN]] ; IS__CGSCC____-NEXT: br label [[RETURN]]
; IS__CGSCC____: return: ; IS__CGSCC____: return:
; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL8]], [[IF_END]] ], [ [[R1]], [[IF_THEN]] ] ; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL8]], [[IF_END]] ], [ [[R1]], [[IF_THEN]] ]
; IS__CGSCC____-NEXT: ret i32* undef ; IS__CGSCC____-NEXT: ret i32* undef
; ;
entry: entry:
%0 = load i32, i32* %r0, align 4 %0 = load i32, i32* %r0, align 4
▲ Show 20 Lines • Show All 69 Lines • ▼ Show 20 Lines
return: ; preds = %if.end, %if.then return: ; preds = %if.end, %if.then
ret i32* %w0 ret i32* %w0
} }
define internal i32* @internal_ret1_rw(i32* %r0, i32* %w0) { define internal i32* @internal_ret1_rw(i32* %r0, i32* %w0) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind
; IS__TUNIT____-LABEL: define {{[^@]+}}@internal_ret1_rw ; IS__TUNIT____-LABEL: define {{[^@]+}}@internal_ret1_rw
; IS__TUNIT____-SAME: (i32* nofree nonnull align 4 dereferenceable(4) [[R0:%.*]], i32* nofree returned [[W0:%.*]]) [[ATTR0]] { ; IS__TUNIT____-SAME: (i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0:%.*]], i32* nofree returned [[W0:%.*]]) [[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[R0]], align 4 ; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[R0]], align 4
; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 ; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
; IS__TUNIT____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__TUNIT____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT____: if.then: ; IS__TUNIT____: if.then:
; IS__TUNIT____-NEXT: br label [[RETURN:%.*]] ; IS__TUNIT____-NEXT: br label [[RETURN:%.*]]
; IS__TUNIT____: if.end: ; IS__TUNIT____: if.end:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rrw(i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nofree [[W0]]) [[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree [[W0]]) [[ATTR2]]
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* [[R0]], align 4 ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* [[R0]], align 4
; IS__TUNIT____-NEXT: store i32 [[TMP1]], i32* [[W0]], align 4 ; IS__TUNIT____-NEXT: store i32 [[TMP1]], i32* [[W0]], align 4
; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret0_nw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]]
; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[W0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[W0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]]
; IS__TUNIT____-NEXT: [[CALL3:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) [[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL3:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) [[ATTR2]]
; IS__TUNIT____-NEXT: [[CALL4:%.*]] = call i32* @external_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL4:%.*]] = call i32* @external_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]]
; IS__TUNIT____-NEXT: br label [[RETURN]] ; IS__TUNIT____-NEXT: br label [[RETURN]]
; IS__TUNIT____: return: ; IS__TUNIT____: return:
; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL4]], [[IF_END]] ], [ [[W0]], [[IF_THEN]] ] ; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL4]], [[IF_END]] ], [ [[W0]], [[IF_THEN]] ]
; IS__TUNIT____-NEXT: ret i32* [[RETVAL_0]] ; IS__TUNIT____-NEXT: ret i32* [[RETVAL_0]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind ; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@internal_ret1_rw ; IS__CGSCC____-LABEL: define {{[^@]+}}@internal_ret1_rw
; IS__CGSCC____-SAME: (i32* nofree nonnull align 4 dereferenceable(4) [[R0:%.*]], i32* nofree returned [[W0:%.*]]) [[ATTR0]] { ; IS__CGSCC____-SAME: (i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0:%.*]], i32* nofree returned [[W0:%.*]]) [[ATTR0]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* [[R0]], align 4 ; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* [[R0]], align 4
; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 ; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC____: if.then: ; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: br label [[RETURN:%.*]] ; IS__CGSCC____-NEXT: br label [[RETURN:%.*]]
; IS__CGSCC____: if.end: ; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rrw(i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nofree [[W0]]) [[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree [[W0]]) [[ATTR2]]
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* [[R0]], align 4 ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* [[R0]], align 4
; IS__CGSCC____-NEXT: store i32 [[TMP1]], i32* [[W0]], align 4 ; IS__CGSCC____-NEXT: store i32 [[TMP1]], i32* [[W0]], align 4
; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret0_nw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]]
; IS__CGSCC____-NEXT: [[CALL2:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[W0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL2:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[W0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]]
; IS__CGSCC____-NEXT: [[CALL3:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) [[ATTR3]] ; IS__CGSCC____-NEXT: [[CALL3:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) [[ATTR3]]
; IS__CGSCC____-NEXT: [[CALL4:%.*]] = call i32* @external_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL4:%.*]] = call i32* @external_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) [[ATTR2]]
; IS__CGSCC____-NEXT: br label [[RETURN]] ; IS__CGSCC____-NEXT: br label [[RETURN]]
; IS__CGSCC____: return: ; IS__CGSCC____: return:
; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL4]], [[IF_END]] ], [ [[W0]], [[IF_THEN]] ] ; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL4]], [[IF_END]] ], [ [[W0]], [[IF_THEN]] ]
; IS__CGSCC____-NEXT: ret i32* [[RETVAL_0]] ; IS__CGSCC____-NEXT: ret i32* [[RETVAL_0]]
; ;
entry: entry:
%0 = load i32, i32* %r0, align 4 %0 = load i32, i32* %r0, align 4
%tobool = icmp ne i32 %0, 0 %tobool = icmp ne i32 %0, 0
▲ Show 20 Lines • Show All 60 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/readattrs.ll

Show First 20 Lines • Show All 68 Lines • ▼ Show 20 Lines;
call void @test4_1(i8* %p) call void @test4_1(i8* %p)
ret void ret void
} }
; Missed optz'n: we could make %q readnone, but don't break test6! ; Missed optz'n: we could make %q readnone, but don't break test6!
define void @test5(i8** %p, i8* %q) { define void @test5(i8** %p, i8* %q) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@test5 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test5
; IS__TUNIT____-SAME: (i8** nocapture nofree nonnull writeonly align 8 dereferenceable(8) [[P:%.*]], i8* nofree writeonly [[Q:%.*]]) [[ATTR3:#.*]] { ; IS__TUNIT____-SAME: (i8** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[P:%.*]], i8* nofree writeonly [[Q:%.*]]) [[ATTR3:#.*]] {
; IS__TUNIT____-NEXT: store i8* [[Q]], i8** [[P]], align 8 ; IS__TUNIT____-NEXT: store i8* [[Q]], i8** [[P]], align 8
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test5 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test5
; IS__CGSCC____-SAME: (i8** nocapture nofree nonnull writeonly align 8 dereferenceable(8) [[P:%.*]], i8* nofree writeonly [[Q:%.*]]) [[ATTR3:#.*]] { ; IS__CGSCC____-SAME: (i8** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[P:%.*]], i8* nofree writeonly [[Q:%.*]]) [[ATTR3:#.*]] {
; IS__CGSCC____-NEXT: store i8* [[Q]], i8** [[P]], align 8 ; IS__CGSCC____-NEXT: store i8* [[Q]], i8** [[P]], align 8
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
store i8* %q, i8** %p store i8* %q, i8** %p
ret void ret void
} }
declare void @test6_1() declare void @test6_1()
; This is not a missed optz'n. ; This is not a missed optz'n.
define void @test6_2(i8** %p, i8* %q) { define void @test6_2(i8** %p, i8* %q) {
; CHECK-LABEL: define {{[^@]+}}@test6_2 ; CHECK-LABEL: define {{[^@]+}}@test6_2
; CHECK-SAME: (i8** nocapture nonnull writeonly align 8 dereferenceable(8) [[P:%.*]], i8* [[Q:%.*]]) { ; CHECK-SAME: (i8** nocapture noundef nonnull writeonly align 8 dereferenceable(8) [[P:%.*]], i8* [[Q:%.*]]) {
; CHECK-NEXT: store i8* [[Q]], i8** [[P]], align 8 ; CHECK-NEXT: store i8* [[Q]], i8** [[P]], align 8
; CHECK-NEXT: call void @test6_1() ; CHECK-NEXT: call void @test6_1()
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
store i8* %q, i8** %p store i8* %q, i8** %p
call void @test6_1() call void @test6_1()
ret void ret void
} }
▲ Show 20 Lines • Show All 92 Lines • ▼ Show 20 Lines
; ;
%res = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> %ptrs, i32 4, <4 x i1><i1 true, i1 false, i1 true, i1 false>, <4 x i32>undef) %res = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> %ptrs, i32 4, <4 x i1><i1 true, i1 false, i1 true, i1 false>, <4 x i32>undef)
ret <4 x i32> %res ret <4 x i32> %res
} }
; CHECK: declare <4 x i32> @test11_1 ; CHECK: declare <4 x i32> @test11_1
declare <4 x i32> @test11_1(<4 x i32*>) argmemonly nounwind readonly declare <4 x i32> @test11_1(<4 x i32*>) argmemonly nounwind readonly
define <4 x i32> @test11_2(<4 x i32*> %ptrs) { define <4 x i32> @test11_2(<4 x i32*> %ptrs) {
; CHECK: Function Attrs: argmemonly nounwind readonly ; IS__TUNIT____: Function Attrs: argmemonly nounwind readonly
; CHECK-LABEL: define {{[^@]+}}@test11_2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test11_2
; CHECK-SAME: (<4 x i32*> [[PTRS:%.*]]) [[ATTR6:#.*]] { ; IS__TUNIT____-SAME: (<4 x i32*> [[PTRS:%.*]]) [[ATTR5:#.*]] {
; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @test11_1(<4 x i32*> [[PTRS]]) [[ATTR9:#.*]] ; IS__TUNIT____-NEXT: [[RES:%.*]] = call <4 x i32> @test11_1(<4 x i32*> [[PTRS]]) [[ATTR9:#.*]]
; CHECK-NEXT: ret <4 x i32> [[RES]] ; IS__TUNIT____-NEXT: ret <4 x i32> [[RES]]
;
; IS__CGSCC____: Function Attrs: argmemonly nounwind readonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test11_2
; IS__CGSCC____-SAME: (<4 x i32*> [[PTRS:%.*]]) [[ATTR6:#.*]] {
; IS__CGSCC____-NEXT: [[RES:%.*]] = call <4 x i32> @test11_1(<4 x i32*> [[PTRS]]) [[ATTR10:#.*]]
; IS__CGSCC____-NEXT: ret <4 x i32> [[RES]]
; ;
%res = call <4 x i32> @test11_1(<4 x i32*> %ptrs) %res = call <4 x i32> @test11_1(<4 x i32*> %ptrs)
ret <4 x i32> %res ret <4 x i32> %res
} }
declare <4 x i32> @test12_1(<4 x i32*>) argmemonly nounwind declare <4 x i32> @test12_1(<4 x i32*>) argmemonly nounwind
; CHECK-NOT: readnone ; CHECK-NOT: readnone
define <4 x i32> @test12_2(<4 x i32*> %ptrs) { define <4 x i32> @test12_2(<4 x i32*> %ptrs) {
Show All 11 Lines
; ;
%res = call <4 x i32> @test12_1(<4 x i32*> %ptrs) %res = call <4 x i32> @test12_1(<4 x i32*> %ptrs)
ret <4 x i32> %res ret <4 x i32> %res
} }
define i32 @volatile_load(i32* %p) { define i32 @volatile_load(i32* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nounwind willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@volatile_load ; IS__TUNIT____-LABEL: define {{[^@]+}}@volatile_load
; IS__TUNIT____-SAME: (i32* nofree align 4 [[P:%.*]]) [[ATTR7:#.*]] { ; IS__TUNIT____-SAME: (i32* nofree noundef align 4 [[P:%.*]]) [[ATTR7:#.*]] {
; IS__TUNIT____-NEXT: [[LOAD:%.*]] = load volatile i32, i32* [[P]], align 4 ; IS__TUNIT____-NEXT: [[LOAD:%.*]] = load volatile i32, i32* [[P]], align 4
; IS__TUNIT____-NEXT: ret i32 [[LOAD]] ; IS__TUNIT____-NEXT: ret i32 [[LOAD]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nounwind willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@volatile_load ; IS__CGSCC____-LABEL: define {{[^@]+}}@volatile_load
; IS__CGSCC____-SAME: (i32* nofree align 4 [[P:%.*]]) [[ATTR8:#.*]] { ; IS__CGSCC____-SAME: (i32* nofree noundef align 4 [[P:%.*]]) [[ATTR8:#.*]] {
; IS__CGSCC____-NEXT: [[LOAD:%.*]] = load volatile i32, i32* [[P]], align 4 ; IS__CGSCC____-NEXT: [[LOAD:%.*]] = load volatile i32, i32* [[P]], align 4
; IS__CGSCC____-NEXT: ret i32 [[LOAD]] ; IS__CGSCC____-NEXT: ret i32 [[LOAD]]
; ;
%load = load volatile i32, i32* %p %load = load volatile i32, i32* %p
ret i32 %load ret i32 %load
} }
declare void @escape_readnone_ptr(i8** %addr, i8* readnone %ptr) declare void @escape_readnone_ptr(i8** %addr, i8* readnone %ptr)
▲ Show 20 Lines • Show All 50 Lines • ▼ Show 20 Lines
; ;
call void @escape_i8(i8* %written) call void @escape_i8(i8* %written)
ret void ret void
} }
define void @byval_not_readonly_2(i8* byval(i8) %written) readonly { define void @byval_not_readonly_2(i8* byval(i8) %written) readonly {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@byval_not_readonly_2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@byval_not_readonly_2
; IS__TUNIT____-SAME: (i8* noalias nocapture nofree nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) [[ATTR1]] { ; IS__TUNIT____-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) [[ATTR1]] {
; IS__TUNIT____-NEXT: store i8 0, i8* [[WRITTEN]], align 1 ; IS__TUNIT____-NEXT: store i8 0, i8* [[WRITTEN]], align 1
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@byval_not_readonly_2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@byval_not_readonly_2
; IS__CGSCC____-SAME: (i8* noalias nocapture nofree nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) [[ATTR1]] { ; IS__CGSCC____-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) [[ATTR1]] {
; IS__CGSCC____-NEXT: store i8 0, i8* [[WRITTEN]], align 1 ; IS__CGSCC____-NEXT: store i8 0, i8* [[WRITTEN]], align 1
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
store i8 0, i8* %written store i8 0, i8* %written
ret void ret void
} }
define void @byval_not_readnone_1(i8* byval(i8) %written) readnone { define void @byval_not_readnone_1(i8* byval(i8) %written) readnone {
; CHECK: Function Attrs: readnone ; CHECK: Function Attrs: readnone
; CHECK-LABEL: define {{[^@]+}}@byval_not_readnone_1 ; CHECK-LABEL: define {{[^@]+}}@byval_not_readnone_1
; CHECK-SAME: (i8* noalias nonnull byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) [[ATTR8:#.*]] { ; CHECK-SAME: (i8* noalias nonnull byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) [[ATTR9:#.*]] {
; CHECK-NEXT: call void @escape_i8(i8* nonnull dereferenceable(1) [[WRITTEN]]) ; CHECK-NEXT: call void @escape_i8(i8* nonnull dereferenceable(1) [[WRITTEN]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @escape_i8(i8* %written) call void @escape_i8(i8* %written)
ret void ret void
} }
define void @byval_not_readnone_2(i8* byval(i8) %written) readnone { define void @byval_not_readnone_2(i8* byval(i8) %written) readnone {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@byval_not_readnone_2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@byval_not_readnone_2
; IS__TUNIT____-SAME: (i8* noalias nocapture nofree nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) [[ATTR1]] { ; IS__TUNIT____-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) [[ATTR1]] {
; IS__TUNIT____-NEXT: store i8 0, i8* [[WRITTEN]], align 1 ; IS__TUNIT____-NEXT: store i8 0, i8* [[WRITTEN]], align 1
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@byval_not_readnone_2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@byval_not_readnone_2
; IS__CGSCC____-SAME: (i8* noalias nocapture nofree nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) [[ATTR1]] { ; IS__CGSCC____-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) [[ATTR1]] {
; IS__CGSCC____-NEXT: store i8 0, i8* [[WRITTEN]], align 1 ; IS__CGSCC____-NEXT: store i8 0, i8* [[WRITTEN]], align 1
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
store i8 0, i8* %written store i8 0, i8* %written
ret void ret void
} }
define void @byval_no_fnarg(i8* byval(i8) %written) { define void @byval_no_fnarg(i8* byval(i8) %written) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@byval_no_fnarg ; IS__TUNIT____-LABEL: define {{[^@]+}}@byval_no_fnarg
; IS__TUNIT____-SAME: (i8* noalias nocapture nofree nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) [[ATTR1]] { ; IS__TUNIT____-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) [[ATTR1]] {
; IS__TUNIT____-NEXT: store i8 0, i8* [[WRITTEN]], align 1 ; IS__TUNIT____-NEXT: store i8 0, i8* [[WRITTEN]], align 1
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@byval_no_fnarg ; IS__CGSCC____-LABEL: define {{[^@]+}}@byval_no_fnarg
; IS__CGSCC____-SAME: (i8* noalias nocapture nofree nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) [[ATTR1]] { ; IS__CGSCC____-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) [[ATTR1]] {
; IS__CGSCC____-NEXT: store i8 0, i8* [[WRITTEN]], align 1 ; IS__CGSCC____-NEXT: store i8 0, i8* [[WRITTEN]], align 1
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
store i8 0, i8* %written store i8 0, i8* %written
ret void ret void
} }
define void @testbyval(i8* %read_only) { define void @testbyval(i8* %read_only) {
; IS__TUNIT____-LABEL: define {{[^@]+}}@testbyval ; IS__TUNIT____-LABEL: define {{[^@]+}}@testbyval
; IS__TUNIT____-SAME: (i8* nocapture readonly [[READ_ONLY:%.*]]) { ; IS__TUNIT____-SAME: (i8* nocapture readonly [[READ_ONLY:%.*]]) {
; IS__TUNIT____-NEXT: call void @byval_not_readonly_1(i8* nocapture readonly [[READ_ONLY]]) [[ATTR2:#.*]] ; IS__TUNIT____-NEXT: call void @byval_not_readonly_1(i8* nocapture readonly [[READ_ONLY]]) [[ATTR2:#.*]]
; IS__TUNIT____-NEXT: call void @byval_not_readnone_1(i8* noalias nocapture readnone [[READ_ONLY]]) ; IS__TUNIT____-NEXT: call void @byval_not_readnone_1(i8* noalias nocapture readnone [[READ_ONLY]])
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: readonly ; IS__CGSCC____: Function Attrs: readonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@testbyval ; IS__CGSCC____-LABEL: define {{[^@]+}}@testbyval
; IS__CGSCC____-SAME: (i8* nocapture nonnull readonly dereferenceable(1) [[READ_ONLY:%.*]]) [[ATTR2:#.*]] { ; IS__CGSCC____-SAME: (i8* nocapture noundef nonnull readonly dereferenceable(1) [[READ_ONLY:%.*]]) [[ATTR2:#.*]] {
; IS__CGSCC____-NEXT: call void @byval_not_readonly_1(i8* noalias nocapture nonnull readonly dereferenceable(1) [[READ_ONLY]]) [[ATTR2]] ; IS__CGSCC____-NEXT: call void @byval_not_readonly_1(i8* noalias nocapture noundef nonnull readonly dereferenceable(1) [[READ_ONLY]]) [[ATTR2]]
; IS__CGSCC____-NEXT: call void @byval_not_readnone_1(i8* noalias nocapture nonnull readnone dereferenceable(1) [[READ_ONLY]]) ; IS__CGSCC____-NEXT: call void @byval_not_readnone_1(i8* noalias nocapture noundef nonnull readnone dereferenceable(1) [[READ_ONLY]])
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @byval_not_readonly_1(i8* %read_only) call void @byval_not_readonly_1(i8* %read_only)
call void @byval_not_readonly_2(i8* %read_only) call void @byval_not_readonly_2(i8* %read_only)
call void @byval_not_readnone_1(i8* %read_only) call void @byval_not_readnone_1(i8* %read_only)
call void @byval_not_readnone_2(i8* %read_only) call void @byval_not_readnone_2(i8* %read_only)
call void @byval_no_fnarg(i8* %read_only) call void @byval_no_fnarg(i8* %read_only)
ret void ret void
} }
;} ;}
declare i8* @maybe_returned_ptr(i8* readonly %ptr) readonly nounwind declare i8* @maybe_returned_ptr(i8* readonly %ptr) readonly nounwind
declare i8 @maybe_returned_val(i8* %ptr) readonly nounwind declare i8 @maybe_returned_val(i8* %ptr) readonly nounwind
declare void @val_use(i8 %ptr) readonly nounwind declare void @val_use(i8 %ptr) readonly nounwind
define void @ptr_uses(i8* %ptr) { define void @ptr_uses(i8* %ptr) {
; CHECK: Function Attrs: nounwind readonly ; IS__TUNIT____: Function Attrs: nounwind readonly
; CHECK-LABEL: define {{[^@]+}}@ptr_uses ; IS__TUNIT____-LABEL: define {{[^@]+}}@ptr_uses
; CHECK-SAME: (i8* nocapture readonly [[PTR:%.*]]) [[ATTR9:#.*]] { ; IS__TUNIT____-SAME: (i8* nocapture readonly [[PTR:%.*]]) [[ATTR9:#.*]] {
; CHECK-NEXT: [[CALL_PTR:%.*]] = call i8* @maybe_returned_ptr(i8* readonly [[PTR]]) ; IS__TUNIT____-NEXT: [[CALL_PTR:%.*]] = call i8* @maybe_returned_ptr(i8* readonly [[PTR]]) [[ATTR9]]
; CHECK-NEXT: [[CALL_VAL:%.*]] = call i8 @maybe_returned_val(i8* readonly [[CALL_PTR]]) ; IS__TUNIT____-NEXT: [[CALL_VAL:%.*]] = call i8 @maybe_returned_val(i8* readonly [[CALL_PTR]]) [[ATTR9]]
; CHECK-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nounwind readonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@ptr_uses
; IS__CGSCC____-SAME: (i8* nocapture readonly [[PTR:%.*]]) [[ATTR10]] {
; IS__CGSCC____-NEXT: [[CALL_PTR:%.*]] = call i8* @maybe_returned_ptr(i8* readonly [[PTR]]) [[ATTR10]]
; IS__CGSCC____-NEXT: [[CALL_VAL:%.*]] = call i8 @maybe_returned_val(i8* readonly [[CALL_PTR]]) [[ATTR10]]
; IS__CGSCC____-NEXT: ret void
; ;
%call_ptr = call i8* @maybe_returned_ptr(i8* %ptr) %call_ptr = call i8* @maybe_returned_ptr(i8* %ptr)
%call_val = call i8 @maybe_returned_val(i8* %call_ptr) %call_val = call i8 @maybe_returned_val(i8* %call_ptr)
call void @val_use(i8 %call_val) call void @val_use(i8 %call_val)
ret void ret void
} }
define void @ptr_use_chain(i8* %ptr) { define void @ptr_use_chain(i8* %ptr) {
▲ Show 20 Lines • Show All 62 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/undefined_behavior.ll

Show First 20 Lines • Show All 235 Lines • ▼ Show 20 Lines
e: e:
ret void ret void
} }
define void @atomicrmw_null_pointer_is_defined() null_pointer_is_valid { define void @atomicrmw_null_pointer_is_defined() null_pointer_is_valid {
; IS__TUNIT____: Function Attrs: nofree nounwind null_pointer_is_valid willreturn ; IS__TUNIT____: Function Attrs: nofree nounwind null_pointer_is_valid willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@atomicrmw_null_pointer_is_defined ; IS__TUNIT____-LABEL: define {{[^@]+}}@atomicrmw_null_pointer_is_defined
; IS__TUNIT____-SAME: () [[ATTR4:#.*]] { ; IS__TUNIT____-SAME: () [[ATTR4:#.*]] {
; IS__TUNIT____-NEXT: [[A:%.*]] = atomicrmw add i32* null, i32 1 acquire ; IS__TUNIT____-NEXT: [[A:%.*]] = atomicrmw add i32* null, i32 1 acquire, align 4
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nounwind null_pointer_is_valid willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nounwind null_pointer_is_valid willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@atomicrmw_null_pointer_is_defined ; IS__CGSCC____-LABEL: define {{[^@]+}}@atomicrmw_null_pointer_is_defined
; IS__CGSCC____-SAME: () [[ATTR4:#.*]] { ; IS__CGSCC____-SAME: () [[ATTR4:#.*]] {
; IS__CGSCC____-NEXT: [[A:%.*]] = atomicrmw add i32* null, i32 1 acquire ; IS__CGSCC____-NEXT: [[A:%.*]] = atomicrmw add i32* null, i32 1 acquire, align 4
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
%a = atomicrmw add i32* null, i32 1 acquire %a = atomicrmw add i32* null, i32 1 acquire
ret void ret void
} }
define void @atomicrmw_null_propagated() { define void @atomicrmw_null_propagated() {
; ATTRIBUTOR-LABEL: @atomicrmw_null_propagated( ; ATTRIBUTOR-LABEL: @atomicrmw_null_propagated(
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
e: e:
ret void ret void
} }
define void @atomiccmpxchg_null_pointer_is_defined() null_pointer_is_valid { define void @atomiccmpxchg_null_pointer_is_defined() null_pointer_is_valid {
; IS__TUNIT____: Function Attrs: nofree nounwind null_pointer_is_valid willreturn ; IS__TUNIT____: Function Attrs: nofree nounwind null_pointer_is_valid willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@atomiccmpxchg_null_pointer_is_defined ; IS__TUNIT____-LABEL: define {{[^@]+}}@atomiccmpxchg_null_pointer_is_defined
; IS__TUNIT____-SAME: () [[ATTR4]] { ; IS__TUNIT____-SAME: () [[ATTR4]] {
; IS__TUNIT____-NEXT: [[A:%.*]] = cmpxchg i32* null, i32 2, i32 3 acq_rel monotonic ; IS__TUNIT____-NEXT: [[A:%.*]] = cmpxchg i32* null, i32 2, i32 3 acq_rel monotonic, align 4
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nounwind null_pointer_is_valid willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nounwind null_pointer_is_valid willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@atomiccmpxchg_null_pointer_is_defined ; IS__CGSCC____-LABEL: define {{[^@]+}}@atomiccmpxchg_null_pointer_is_defined
; IS__CGSCC____-SAME: () [[ATTR4]] { ; IS__CGSCC____-SAME: () [[ATTR4]] {
; IS__CGSCC____-NEXT: [[A:%.*]] = cmpxchg i32* null, i32 2, i32 3 acq_rel monotonic ; IS__CGSCC____-NEXT: [[A:%.*]] = cmpxchg i32* null, i32 2, i32 3 acq_rel monotonic, align 4
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
%a = cmpxchg i32* null, i32 2, i32 3 acq_rel monotonic %a = cmpxchg i32* null, i32 2, i32 3 acq_rel monotonic
ret void ret void
} }
define void @atomiccmpxchg_null_propagated() { define void @atomiccmpxchg_null_propagated() {
; ATTRIBUTOR-LABEL: @atomiccmpxchg_null_propagated( ; ATTRIBUTOR-LABEL: @atomiccmpxchg_null_propagated(
▲ Show 20 Lines • Show All 287 Lines • ▼ Show 20 Lines
; Tests for nonnull noundef attribute violation. ; Tests for nonnull noundef attribute violation.
; ;
; Tests for argument position ; Tests for argument position
define void @arg_nonnull_1(i32* nonnull %a) { define void @arg_nonnull_1(i32* nonnull %a) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@arg_nonnull_1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@arg_nonnull_1
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[A:%.*]]) [[ATTR6:#.*]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A:%.*]]) [[ATTR6:#.*]] {
; IS__TUNIT____-NEXT: store i32 0, i32* [[A]], align 4 ; IS__TUNIT____-NEXT: store i32 0, i32* [[A]], align 4
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@arg_nonnull_1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@arg_nonnull_1
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[A:%.*]]) [[ATTR6:#.*]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A:%.*]]) [[ATTR6:#.*]] {
; IS__CGSCC____-NEXT: store i32 0, i32* [[A]], align 4 ; IS__CGSCC____-NEXT: store i32 0, i32* [[A]], align 4
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
store i32 0, i32* %a store i32 0, i32* %a
ret void ret void
} }
define void @arg_nonnull_1_noundef_1(i32* nonnull noundef %a) { define void @arg_nonnull_1_noundef_1(i32* nonnull noundef %a) {
▲ Show 20 Lines • Show All 479 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/value-simplify.ll

Show First 20 Lines • Show All 331 Lines • ▼ Show 20 Lines
define internal i32* @test_inalloca(i32* inalloca %a) { define internal i32* @test_inalloca(i32* inalloca %a) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_inalloca ; IS__TUNIT____-LABEL: define {{[^@]+}}@test_inalloca
; IS__TUNIT____-SAME: (i32* inalloca noalias nofree nonnull returned writeonly dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) [[ATTR1]] { ; IS__TUNIT____-SAME: (i32* inalloca noalias nofree nonnull returned writeonly dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) [[ATTR1]] {
; IS__TUNIT____-NEXT: ret i32* [[A]] ; IS__TUNIT____-NEXT: ret i32* [[A]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_inalloca ; IS__CGSCC____-LABEL: define {{[^@]+}}@test_inalloca
; IS__CGSCC____-SAME: (i32* inalloca noalias nofree nonnull returned writeonly dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) [[ATTR1]] { ; IS__CGSCC____-SAME: (i32* inalloca noalias nofree noundef nonnull returned writeonly dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) [[ATTR1]] {
; IS__CGSCC____-NEXT: ret i32* [[A]] ; IS__CGSCC____-NEXT: ret i32* [[A]]
; ;
ret i32* %a ret i32* %a
} }
define i32* @complicated_args_inalloca(i32* %arg) { define i32* @complicated_args_inalloca(i32* %arg) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@complicated_args_inalloca ; IS__TUNIT____-LABEL: define {{[^@]+}}@complicated_args_inalloca
; IS__TUNIT____-SAME: (i32* nofree readnone returned "no-capture-maybe-returned" [[ARG:%.*]]) [[ATTR1]] { ; IS__TUNIT____-SAME: (i32* nofree readnone returned "no-capture-maybe-returned" [[ARG:%.*]]) [[ATTR1]] {
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @test_inalloca(i32* noalias nofree writeonly "no-capture-maybe-returned" [[ARG]]) [[ATTR1]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @test_inalloca(i32* noalias nofree writeonly "no-capture-maybe-returned" [[ARG]]) [[ATTR1]]
; IS__TUNIT____-NEXT: ret i32* [[CALL]] ; IS__TUNIT____-NEXT: ret i32* [[CALL]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@complicated_args_inalloca ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@complicated_args_inalloca
; IS__CGSCC_OPM-SAME: (i32* nofree nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[ARG:%.*]]) [[ATTR1:#.*]] { ; IS__CGSCC_OPM-SAME: (i32* nofree noundef nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[ARG:%.*]]) [[ATTR1:#.*]] {
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @test_inalloca(i32* noalias nofree nonnull writeonly dereferenceable(4) "no-capture-maybe-returned" [[ARG]]) [[ATTR5:#.*]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @test_inalloca(i32* noalias nofree noundef nonnull writeonly dereferenceable(4) "no-capture-maybe-returned" [[ARG]]) [[ATTR5:#.*]]
; IS__CGSCC_OPM-NEXT: ret i32* [[CALL]] ; IS__CGSCC_OPM-NEXT: ret i32* [[CALL]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@complicated_args_inalloca ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@complicated_args_inalloca
; IS__CGSCC_NPM-SAME: (i32* nofree nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[ARG:%.*]]) [[ATTR1:#.*]] { ; IS__CGSCC_NPM-SAME: (i32* nofree noundef nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[ARG:%.*]]) [[ATTR1:#.*]] {
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32* @test_inalloca(i32* noalias nofree nonnull writeonly dereferenceable(4) "no-capture-maybe-returned" [[ARG]]) [[ATTR4:#.*]] ; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32* @test_inalloca(i32* noalias nofree noundef nonnull writeonly dereferenceable(4) "no-capture-maybe-returned" [[ARG]]) [[ATTR4:#.*]]
; IS__CGSCC_NPM-NEXT: ret i32* [[CALL]] ; IS__CGSCC_NPM-NEXT: ret i32* [[CALL]]
; ;
%call = call i32* @test_inalloca(i32* %arg) %call = call i32* @test_inalloca(i32* %arg)
ret i32* %call ret i32* %call
} }
define internal i32* @test_preallocated(i32* preallocated(i32) %a) { define internal i32* @test_preallocated(i32* preallocated(i32) %a) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines;
%call = call i32* @test_preallocated(i32* preallocated(i32) null) ["preallocated"(token %c)] %call = call i32* @test_preallocated(i32* preallocated(i32) null) ["preallocated"(token %c)]
ret i32* %call ret i32* %call
} }
define internal void @test_sret(%struct.X* sret(%struct.X) %a, %struct.X** %b) { define internal void @test_sret(%struct.X* sret(%struct.X) %a, %struct.X** %b) {
; ;
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_sret ; IS__TUNIT____-LABEL: define {{[^@]+}}@test_sret
; IS__TUNIT____-SAME: (%struct.X* noalias nofree noundef nonnull writeonly sret(%struct.X) align 536870912 dereferenceable(8) [[A:%.*]], %struct.X** nocapture nofree nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) [[ATTR2:#.*]] { ; IS__TUNIT____-SAME: (%struct.X* noalias nofree noundef nonnull writeonly sret(%struct.X) align 536870912 dereferenceable(8) [[A:%.*]], %struct.X** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) [[ATTR2:#.*]] {
; IS__TUNIT____-NEXT: store %struct.X* [[A]], %struct.X** [[B]], align 8 ; IS__TUNIT____-NEXT: store %struct.X* [[A]], %struct.X** [[B]], align 8
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_sret ; IS__CGSCC____-LABEL: define {{[^@]+}}@test_sret
; IS__CGSCC____-SAME: (%struct.X* noalias nofree noundef nonnull writeonly sret(%struct.X) align 536870912 dereferenceable(8) [[A:%.*]], %struct.X** nocapture nofree nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) [[ATTR2:#.*]] { ; IS__CGSCC____-SAME: (%struct.X* noalias nofree noundef nonnull writeonly sret(%struct.X) align 536870912 dereferenceable(8) [[A:%.*]], %struct.X** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) [[ATTR2:#.*]] {
; IS__CGSCC____-NEXT: store %struct.X* [[A]], %struct.X** [[B]], align 8 ; IS__CGSCC____-NEXT: store %struct.X* [[A]], %struct.X** [[B]], align 8
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
store %struct.X* %a, %struct.X** %b store %struct.X* %a, %struct.X** %b
ret void ret void
} }
; FIXME: Alignment and dereferenceability are not propagated to the argument ; FIXME: Alignment and dereferenceability are not propagated to the argument
define void @complicated_args_sret(%struct.X** %b) { define void @complicated_args_sret(%struct.X** %b) {
; ;
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@complicated_args_sret ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@complicated_args_sret
; IS__TUNIT_OPM-SAME: (%struct.X** nocapture nofree writeonly [[B:%.*]]) [[ATTR2:#.*]] { ; IS__TUNIT_OPM-SAME: (%struct.X** nocapture nofree writeonly [[B:%.*]]) [[ATTR2:#.*]] {
; IS__TUNIT_OPM-NEXT: call void @test_sret(%struct.X* noalias nocapture nofree noundef writeonly align 536870912 null, %struct.X** nocapture nofree writeonly align 8 [[B]]) [[ATTR6:#.*]] ; IS__TUNIT_OPM-NEXT: call void @test_sret(%struct.X* noalias nocapture nofree noundef writeonly align 536870912 null, %struct.X** nocapture nofree writeonly align 8 [[B]]) [[ATTR6:#.*]]
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@complicated_args_sret ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@complicated_args_sret
; IS__TUNIT_NPM-SAME: (%struct.X** nocapture nofree writeonly [[B:%.*]]) [[ATTR2:#.*]] { ; IS__TUNIT_NPM-SAME: (%struct.X** nocapture nofree writeonly [[B:%.*]]) [[ATTR2:#.*]] {
; IS__TUNIT_NPM-NEXT: call void @test_sret(%struct.X* noalias nocapture nofree noundef writeonly align 536870912 null, %struct.X** nocapture nofree writeonly align 8 [[B]]) [[ATTR5:#.*]] ; IS__TUNIT_NPM-NEXT: call void @test_sret(%struct.X* noalias nocapture nofree noundef writeonly align 536870912 null, %struct.X** nocapture nofree writeonly align 8 [[B]]) [[ATTR5:#.*]]
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@complicated_args_sret ; IS__CGSCC____-LABEL: define {{[^@]+}}@complicated_args_sret
; IS__CGSCC____-SAME: (%struct.X** nocapture nofree nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) [[ATTR2]] { ; IS__CGSCC____-SAME: (%struct.X** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) [[ATTR2]] {
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; ;
call void @test_sret(%struct.X* null, %struct.X** %b) call void @test_sret(%struct.X* null, %struct.X** %b)
ret void ret void
} }
define internal %struct.X* @test_nest(%struct.X* nest %a) { define internal %struct.X* @test_nest(%struct.X* nest %a) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
▲ Show 20 Lines • Show All 348 Lines • Show Last 20 Lines

llvm/test/Transforms/InstSimplify/freeze.ll

Show First 20 Lines • Show All 235 Lines • ▼ Show 20 Lines;
%q = getelementptr inbounds i32, i32* %p, i32 0 %q = getelementptr inbounds i32, i32* %p, i32 0
%k = freeze i32* %q %k = freeze i32* %q
ret i32* %k ret i32* %k
} }
define i8* @load_ptr(i8* %ptr) { define i8* @load_ptr(i8* %ptr) {
; CHECK-LABEL: @load_ptr( ; CHECK-LABEL: @load_ptr(
; CHECK-NEXT: [[V:%.*]] = load i8, i8* [[PTR:%.*]], align 1 ; CHECK-NEXT: [[V:%.*]] = load i8, i8* [[PTR:%.*]], align 1
; CHECK-NEXT: [[Q:%.*]] = freeze i8* [[PTR]]
; CHECK-NEXT: call void @f4(i8 [[V]]) ; CHECK-NEXT: call void @f4(i8 [[V]])
; CHECK-NEXT: ret i8* [[Q]] ; CHECK-NEXT: ret i8* [[PTR]]
; ;
%v = load i8, i8* %ptr %v = load i8, i8* %ptr
%q = freeze i8* %ptr %q = freeze i8* %ptr
call void @f4(i8 %v) ; prevents %v from being DCEd call void @f4(i8 %v) ; prevents %v from being DCEd
ret i8* %q ret i8* %q
} }
define i8* @store_ptr(i8* %ptr) { define i8* @store_ptr(i8* %ptr) {
; CHECK-LABEL: @store_ptr( ; CHECK-LABEL: @store_ptr(
; CHECK-NEXT: store i8 0, i8* [[PTR:%.*]], align 1 ; CHECK-NEXT: store i8 0, i8* [[PTR:%.*]], align 1
; CHECK-NEXT: [[Q:%.*]] = freeze i8* [[PTR]] ; CHECK-NEXT: ret i8* [[PTR]]
; CHECK-NEXT: ret i8* [[Q]]
; ;
store i8 0, i8* %ptr store i8 0, i8* %ptr
%q = freeze i8* %ptr %q = freeze i8* %ptr
ret i8* %q ret i8* %q
} }
define i8* @call_noundef_ptr(i8* %ptr) { define i8* @call_noundef_ptr(i8* %ptr) {
; CHECK-LABEL: @call_noundef_ptr( ; CHECK-LABEL: @call_noundef_ptr(
Show All 23 Lines
unwind: unwind:
landingpad i8* cleanup landingpad i8* cleanup
resume i8* %q resume i8* %q
} }
define i8* @cmpxchg_ptr(i8* %ptr) { define i8* @cmpxchg_ptr(i8* %ptr) {
; CHECK-LABEL: @cmpxchg_ptr( ; CHECK-LABEL: @cmpxchg_ptr(
; CHECK-NEXT: [[TMP1:%.*]] = cmpxchg i8* [[PTR:%.*]], i8 1, i8 2 acq_rel monotonic, align 1 ; CHECK-NEXT: [[TMP1:%.*]] = cmpxchg i8* [[PTR:%.*]], i8 1, i8 2 acq_rel monotonic, align 1
; CHECK-NEXT: [[Q:%.*]] = freeze i8* [[PTR]] ; CHECK-NEXT: ret i8* [[PTR]]
; CHECK-NEXT: ret i8* [[Q]]
; ;
cmpxchg i8* %ptr, i8 1, i8 2 acq_rel monotonic cmpxchg i8* %ptr, i8 1, i8 2 acq_rel monotonic
%q = freeze i8* %ptr %q = freeze i8* %ptr
ret i8* %q ret i8* %q
} }
define i8* @atomicrmw_ptr(i8* %ptr) { define i8* @atomicrmw_ptr(i8* %ptr) {
; CHECK-LABEL: @atomicrmw_ptr( ; CHECK-LABEL: @atomicrmw_ptr(
; CHECK-NEXT: [[TMP1:%.*]] = atomicrmw add i8* [[PTR:%.*]], i8 1 acquire, align 1 ; CHECK-NEXT: [[TMP1:%.*]] = atomicrmw add i8* [[PTR:%.*]], i8 1 acquire, align 1
; CHECK-NEXT: [[Q:%.*]] = freeze i8* [[PTR]] ; CHECK-NEXT: ret i8* [[PTR]]
; CHECK-NEXT: ret i8* [[Q]]
; ;
atomicrmw add i8* %ptr, i8 1 acquire atomicrmw add i8* %ptr, i8 1 acquire
%q = freeze i8* %ptr %q = freeze i8* %ptr
ret i8* %q ret i8* %q
} }
define i1 @icmp(i32 %a, i32 %b) { define i1 @icmp(i32 %a, i32 %b) {
; CHECK-LABEL: @icmp( ; CHECK-LABEL: @icmp(
▲ Show 20 Lines • Show All 192 Lines • Show Last 20 Lines

llvm/test/Transforms/OpenMP/parallel_deletion.ll

Show First 20 Lines • Show All 238 Lines • ▼ Show 20 Linesif.then: ; preds = %entry
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
ret void ret void
} }
define internal void @.omp_outlined..4(i32* noalias %.global_tid., i32* noalias %.bound_tid., i32* dereferenceable(4) %a) { define internal void @.omp_outlined..4(i32* noalias %.global_tid., i32* noalias %.bound_tid., i32* dereferenceable(4) %a) {
; CHECK-LABEL: define {{[^@]+}}@.omp_outlined..4 ; CHECK-LABEL: define {{[^@]+}}@.omp_outlined..4
; CHECK-SAME: (i32* noalias nocapture nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) { ; CHECK-SAME: (i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4 ; CHECK-NEXT: [[TMP:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_master(%struct.ident_t* noundef nonnull [[GLOB0]], i32 [[TMP]]) ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_master(%struct.ident_t* noundef nonnull [[GLOB0]], i32 [[TMP]])
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
; CHECK-NEXT: br i1 [[TMP2]], label [[OMP_IF_END:%.*]], label [[OMP_IF_THEN:%.*]] ; CHECK-NEXT: br i1 [[TMP2]], label [[OMP_IF_END:%.*]], label [[OMP_IF_THEN:%.*]]
; CHECK: omp_if.then: ; CHECK: omp_if.then:
; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4
; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP3]], 1 ; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP3]], 1
▲ Show 20 Lines • Show All 63 Lines • ▼ Show 20 Lines
omp_if.end: ; preds = %entry, %omp_if.then omp_if.end: ; preds = %entry, %omp_if.then
call void @__kmpc_barrier(%struct.ident_t* nonnull @1, i32 %omp_global_thread_num) #6 call void @__kmpc_barrier(%struct.ident_t* nonnull @1, i32 %omp_global_thread_num) #6
ret void ret void
} }
define internal void @.omp_outlined..6(i32* noalias %.global_tid., i32* noalias %.bound_tid., i32* dereferenceable(4) %a) { define internal void @.omp_outlined..6(i32* noalias %.global_tid., i32* noalias %.bound_tid., i32* dereferenceable(4) %a) {
; CHECK-LABEL: define {{[^@]+}}@.omp_outlined..6 ; CHECK-LABEL: define {{[^@]+}}@.omp_outlined..6
; CHECK-SAME: (i32* noalias nocapture nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) { ; CHECK-SAME: (i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[A1:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[A1:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 ; CHECK-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
; CHECK-NEXT: [[TMP:%.*]] = bitcast i32* [[A1]] to i8* ; CHECK-NEXT: [[TMP:%.*]] = bitcast i32* [[A1]] to i8*
; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* noundef nonnull align 4 [[TMP]]) [[ATTR0]] ; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* noundef nonnull align 4 [[TMP]]) [[ATTR0]]
; CHECK-NEXT: store i32 1, i32* [[A1]], align 4 ; CHECK-NEXT: store i32 1, i32* [[A1]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i32** ; CHECK-NEXT: [[TMP1:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i32**
; CHECK-NEXT: store i32* [[A1]], i32** [[TMP1]], align 8 ; CHECK-NEXT: store i32* [[A1]], i32** [[TMP1]], align 8
; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4
; CHECK-NEXT: [[TMP3:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* ; CHECK-NEXT: [[TMP3:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
; CHECK-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* noundef nonnull [[GLOB2:@.*]], i32 [[TMP2]], i32 noundef 1, i64 noundef 8, i8* noundef nonnull align 8 [[TMP3]], void (i8*, i8*)* noundef nonnull @.omp.reduction.reduction_func, [8 x i32]* noundef nonnull @.gomp_critical_user_.reduction.var) ; CHECK-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* noundef nonnull [[GLOB2:@.*]], i32 [[TMP2]], i32 noundef 1, i64 noundef 8, i8* noundef nonnull align 8 [[TMP3]], void (i8*, i8*)* noundef nonnull @.omp.reduction.reduction_func, [8 x i32]* noundef nonnull @.gomp_critical_user_.reduction.var)
; CHECK-NEXT: switch i32 [[TMP4]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ ; CHECK-NEXT: switch i32 [[TMP4]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
; CHECK-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] ; CHECK-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
; CHECK-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] ; CHECK-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
; CHECK-NEXT: ] ; CHECK-NEXT: ]
; CHECK: .omp.reduction.case1: ; CHECK: .omp.reduction.case1:
; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 ; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4
; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[A1]], align 4 ; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[A1]], align 4
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], [[TMP6]] ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], [[TMP6]]
; CHECK-NEXT: store i32 [[ADD]], i32* [[A]], align 4 ; CHECK-NEXT: store i32 [[ADD]], i32* [[A]], align 4
; CHECK-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* noundef nonnull [[GLOB2]], i32 [[TMP2]], [8 x i32]* noundef nonnull @.gomp_critical_user_.reduction.var) ; CHECK-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* noundef nonnull [[GLOB2]], i32 [[TMP2]], [8 x i32]* noundef nonnull @.gomp_critical_user_.reduction.var)
; CHECK-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] ; CHECK-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
; CHECK: .omp.reduction.case2: ; CHECK: .omp.reduction.case2:
; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[A1]], align 4 ; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[A1]], align 4
; CHECK-NEXT: [[TMP8:%.*]] = atomicrmw add i32* [[A]], i32 [[TMP7]] monotonic ; CHECK-NEXT: [[TMP8:%.*]] = atomicrmw add i32* [[A]], i32 [[TMP7]] monotonic, align 4
; CHECK-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] ; CHECK-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
; CHECK: .omp.reduction.default: ; CHECK: .omp.reduction.default:
; CHECK-NEXT: [[TMP9:%.*]] = bitcast i32* [[A1]] to i8* ; CHECK-NEXT: [[TMP9:%.*]] = bitcast i32* [[A1]] to i8*
; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* noundef nonnull [[TMP9]]) ; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* noundef nonnull [[TMP9]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
entry: entry:
%a1 = alloca i32, align 4 %a1 = alloca i32, align 4
▲ Show 20 Lines • Show All 89 Lines • Show Last 20 Lines