In previous patch https://reviews.llvm.org/D93594, we only scalarize tilezero, tileload, tilestore and tiledpbssd. In this patch we scalarize tdpbf16ps intrinsic.
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llvm/test/CodeGen/X86/AMX/amx-low-intrinsics.ll | ||
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213–214 | Can we use a shuffle instruction? |
llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp | ||
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318–319 | Can we create vecC with <256 x float>? | |
341 | better to use EltCF32 or CF32 | |
348 | ditto | |
349 | Better to define a variable for it and reuse. | |
390–394 | Is it concise to use below? template <Intrinsic::ID IntrID> typename std::enable_if_t< IntrID == Intrinsic::x86_tdpbssd_internal || IntrID == Intrinsic::x86_tdpbf16ps_internal, bool> lowerTileDP(Instruction *TileDP); |
llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp | ||
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318–319 | In fact, we are trying to find a bitcast whose operand is <256 x i32>, as shown in line229. |
Can we create vecC with <256 x float>?