[PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation

[amyk]

Summary

This patch exploits the prefixed load and store instructions utilizing the refactored load/store
implementation introduced in D93370.

Prefixed load and store instructions are emitted whenever we are loading or storing a value with an
offset that fits into a 34-bit signed immediate.
Patterns for the prefixed load and stores are added in this patch, as well as the implementation that
detects when we are loading and storing a value with an offset that fits in 34-bits.

Depends on D95116.

[amyk]

• Update LIT test cases with prefixed load/store checks.
• Added a PrefixInstrs flag.

[amyk]

Address clang-format comments.

[amyk]

Update patch based on dependent patch (D95116) update, and update test cases with necessary changes.

[amyk]

Gentle ping.

[stefanp]

Looking at the test case changes there seem to be a few places where we are not generating expected code.
I've added comments to some of those places.

llvm/test/CodeGen/PowerPC/prefixed-ld-st.ll

364 ↗

(On Diff #330641)

Hmm... that's interesting.
This is probably not related to this patch but this code looks odd.
For starters pstxsd is a D-Form instruction but we are listing two registers and no immediate.

Also,

pli r4, 4294967297
add r3, r3, r4

can probably be written as a paddi.

paddi r3, r3, 4294967297, 0

I feel like we need a TODO for this.

llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll

3134

This doesn't look right.
I assume we are trying to incorporate the pli into the lfsx but somehow the compiler gets confused and doesn't do that. Also, plfs is a D-Form and should have an immediate.

3259

We have expanded the pli into two instructions at this point which we shouldn't do.
Again, I think we are trying to merge pli and lfsx into plfs but that's not working as expected.

[amyk]

• Rebase patch
• Address review comment made by Stefan involving plfs and pstxsd using two registers such as pstxsd v2, r3(r3), 0 (despite being a prefixed DForm instruction) instead of a register and an immediate. This was caused by the pattern for these instructions being written incorrectly. The patterns have been updated accordingly so the prefixed instructions use a register and an immediate.

[amyk]

Gentle ping.

[nemanjai]

LGTM other than the missing assert. Also, please look into the interaction between prefixed instructions, pc-relative memops, paired memops and whether we do the right thing when 1/2 of those are turned on and others turned off (this can be done in a subsequent patch).

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

17394

I don't really understand what ensures that the intrinsic is one of ppc_vsx_lxvp/ppc_vsx_stxvp? What if it is something different entirely? It may be that we only call this function for those two now, but think about the future as well.
Even an assert would probably do here.

llvm/lib/Target/PowerPC/PPCISelLowering.h

712

I added a comment in the previous revision that MOF_SubtargetP10 should really be something like MOF_PrefixInstrs but perhaps I missed something. Is there any reason we need both? Are there conditions where we want a different non-prefixed addressing mode for P10 instructions?

[nemanjai]

I thought I had selected "Accept" when adding the last comment.

[amyk]

Discussed offline with Nemanja to update the revision.

• Add assert for the paired vector intrinsics
• Add assert for 256-bit vectors

I've also changed PPCRegisterInfo.cpp to take prefixed instructions into account.

[amyk]

@nemanjai I've updated the prefixed load/store patch once more, if you could take another look when you get the chance to see if I have addressed the comments that we discussed about offline, that would be great.

[nemanjai]

LGTM.

llvm/lib/Target/PowerPC/PPCInstrPrefix.td

2707

Nit: this line appears to be too long (and so does 2710).

llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp

public:
     /// SelectPCRelForm - Returns true if address N can be represented by
     /// PC-Relative addressing mode.
     bool SelectPCRelForm(SDNode *Parent, SDValue N, SDValue &Disp,
                          SDValue &Base) {
       return PPCLowering->SelectOptimalAddrMode(Parent, N, Disp, Base, *CurDAG,
                                                 None) == PPC::AM_PCRel;
     }
 
+    /// SelectPDForm - Returns true if address N can be represented by Prefixed
+    /// DForm addressing mode (a base register, plus a signed 34-bit immediate.
+    bool SelectPDForm(SDNode *Parent, SDValue N, SDValue &Disp, SDValue &Base) {
+      return PPCLowering->SelectOptimalAddrMode(Parent, N, Disp, Base, *CurDAG,
+                                                None) == PPC::AM_PrefixDForm;
+    }
+
     /// SelectXForm - Returns true if address N can be represented by the
     /// addressing mode of XForm instructions (an indexed [r+r] operation).
     bool SelectXForm(SDNode *Parent, SDValue N, SDValue &Disp, SDValue &Base) {
       return PPCLowering->SelectOptimalAddrMode(Parent, N, Disp, Base, *CurDAG,
                                                 None) == PPC::AM_XForm;
     }
 
     /// SelectForceXForm - Given the specified address, force it to be

llvm/lib/Target/PowerPC/PPCISelLowering.h

enum MemOpFlags {
       MOF_Vector = 1 << 19,      // Vector types and quad precision scalars.
       MOF_Vector256 = 1 << 20,
 
       // Subtarget features.
       MOF_SubtargetBeforeP9 = 1 << 22,
       MOF_SubtargetP9 = 1 << 23,
       MOF_SubtargetP10 = 1 << 24,
       MOF_SubtargetSPE = 1 << 25
     };
 
     // The addressing modes for loads and stores.
     enum AddrMode {
       AM_None,
       AM_DForm,
       AM_DSForm,
       AM_DQForm,
+      AM_PrefixDForm,
       AM_XForm,
       AM_PCRel
     };
   } // end namespace PPC
 
   class PPCTargetLowering : public TargetLowering {
     const PPCSubtarget &Subtarget;
 

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

AddrModesMap[PPC::AM_DSForm] = {
       PPC::MOF_NotAddNorCst | PPC::MOF_ScalarFloat | PPC::MOF_SubtargetP9,
       PPC::MOF_AddrIsSImm32 | PPC::MOF_ScalarFloat | PPC::MOF_SubtargetP9,
   };
   AddrModesMap[PPC::AM_DQForm] = {
       // LXV, STXV
       PPC::MOF_RPlusSImm16Mult16 | PPC::MOF_Vector | PPC::MOF_SubtargetP9,
       PPC::MOF_NotAddNorCst | PPC::MOF_Vector | PPC::MOF_SubtargetP9,
       PPC::MOF_AddrIsSImm32 | PPC::MOF_Vector | PPC::MOF_SubtargetP9,
-      PPC::MOF_RPlusSImm16Mult16 | PPC::MOF_Vector256 | PPC::MOF_SubtargetP10,
-      PPC::MOF_NotAddNorCst | PPC::MOF_Vector256 | PPC::MOF_SubtargetP10,
-      PPC::MOF_AddrIsSImm32 | PPC::MOF_Vector256 | PPC::MOF_SubtargetP10,
   };
+  AddrModesMap[PPC::AM_PrefixDForm] = {PPC::MOF_RPlusSImm34 |
+                                       PPC::MOF_SubtargetP10};
   // TODO: Add mapping for quadword load/store.
 }
 
 /// getMaxByValAlign - Helper for getByValTypeAlignment to determine
 /// the desired ByVal argument alignment.
 static void getMaxByValAlign(Type *Ty, Align &MaxAlign, Align MaxMaxAlign) {
   if (MaxAlign == MaxMaxAlign)
     return;
for (auto FlagSet : AddrModesMap.at(PPC::AM_DForm))
     if ((Flags & FlagSet) == FlagSet)
       return PPC::AM_DForm;
   for (auto FlagSet : AddrModesMap.at(PPC::AM_DSForm))
     if ((Flags & FlagSet) == FlagSet)
       return PPC::AM_DSForm;
   for (auto FlagSet : AddrModesMap.at(PPC::AM_DQForm))
     if ((Flags & FlagSet) == FlagSet)
       return PPC::AM_DQForm;
+  for (auto FlagSet : AddrModesMap.at(PPC::AM_PrefixDForm))
+    if ((Flags & FlagSet) == FlagSet)
+      return PPC::AM_PrefixDForm;
   // If no other forms are selected, return an X-Form as it is the most
   // general addressing mode.
   return PPC::AM_XForm;
 }
 
 /// Set alignment flags based on whether or not the Frame Index is aligned.
 /// Utilized when computing flags for address computation when selecting
 /// load and store instructions.
unsigned PPCTargetLowering::computeMOFlags(const SDNode *Parent, SDValue N,
   }
   if (Subtarget.hasSPE())
     FlagSet |= PPC::MOF_SubtargetSPE;
 
   // Check if we have a PCRel node and return early.
   if ((FlagSet & PPC::MOF_SubtargetP10) && isPCRelNode(N))
     return FlagSet;
 
+  // If the node is the paired load/store intrinsics, compute flags for
+  // address computation and return early.
+  unsigned ParentOp = Parent->getOpcode();
+  if (Subtarget.isISA3_1() && ((ParentOp == ISD::INTRINSIC_W_CHAIN) ||
+                               (ParentOp == ISD::INTRINSIC_VOID))) {
+    unsigned ID = cast<ConstantSDNode>(Parent->getOperand(1))->getZExtValue();
+    assert(
+        ((ID == Intrinsic::ppc_vsx_lxvp) || (ID == Intrinsic::ppc_vsx_stxvp)) &&
+        "Only the paired load and store (lxvp/stxvp) intrinsics are valid.");
+    SDValue IntrinOp = (ID == Intrinsic::ppc_vsx_lxvp) ? Parent->getOperand(2)
+                                                       : Parent->getOperand(3);
+    computeFlagsForAddressComputation(IntrinOp, FlagSet, DAG);
+    FlagSet |= PPC::MOF_Vector;
+    return FlagSet;
+  }
+
   // Mark this as something we don't want to handle here if it is atomic
   // or pre-increment instruction.
   if (const LSBaseSDNode *LSB = dyn_cast<LSBaseSDNode>(Parent))
     if (LSB->isIndexed())
       return PPC::MOF_None;
 
   // Compute in-memory type flags. This is based on if there are scalars,
   // floats or vectors.
   const MemSDNode *MN = dyn_cast<MemSDNode>(Parent);
   assert(MN && "Parent should be a MemSDNode!");
   EVT MemVT = MN->getMemoryVT();
   unsigned Size = MemVT.getSizeInBits();
   if (MemVT.isScalarInteger()) {
     assert(Size <= 128 &&
            "Not expecting scalar integers larger than 16 bytes!");
     if (Size < 32)
       FlagSet |= PPC::MOF_SubWordInt;
     else if (Size == 32)
       FlagSet |= PPC::MOF_WordInt;
     else
       FlagSet |= PPC::MOF_DoubleWordInt;
   } else if (MemVT.isVector() && !MemVT.isFloatingPoint()) { // Integer vectors.
     if (Size == 128)
       FlagSet |= PPC::MOF_Vector;
-    else if (Size == 256)
-      FlagSet |= PPC::MOF_Vector256;
-    else
+    else if (Size == 256) {
+      assert(Subtarget.pairedVectorMemops() &&
+             "256-bit vectors are only available when paired vector memops is "
+             "enabled!");
+      FlagSet |= PPC::MOF_Vector;
+    } else
       llvm_unreachable("Not expecting illegal vectors!");
   } else { // Floating point type: can be scalar, f128 or vector types.
     if (Size == 32 || Size == 64)
       FlagSet |= PPC::MOF_ScalarFloat;
     else if (MemVT == MVT::f128 || MemVT.isVector())
       FlagSet |= PPC::MOF_Vector;
     else
       llvm_unreachable("Not expecting illegal scalar floats!");
case PPC::AM_DQForm: {
     Disp = DAG.getTargetConstant(0, DL, getPointerTy(DAG.getDataLayout()));
     if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(N)) {
       Base = DAG.getTargetFrameIndex(FI->getIndex(), N.getValueType());
       fixupFuncForFI(DAG, FI->getIndex(), N.getValueType());
     } else
       Base = N;
     break;
   }
+  case PPC::AM_PrefixDForm: {
+    int64_t Imm34 = 0;
+    unsigned Opcode = N.getOpcode();
+    if (((Opcode == ISD::ADD) || (Opcode == ISD::OR)) &&
+        (isIntS34Immediate(N.getOperand(1), Imm34))) {
+      // N is an Add/OR Node, and it's operand is a 34-bit signed immediate.
+      Disp = DAG.getTargetConstant(Imm34, DL, N.getValueType());
+      if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(N.getOperand(0)))
+        Base = DAG.getTargetFrameIndex(FI->getIndex(), N.getValueType());
+      else
+        Base = N.getOperand(0);
+    } else if (isIntS34Immediate(N, Imm34)) {
+      // The address is a 34-bit signed immediate.
+      Disp = DAG.getTargetConstant(Imm34, DL, N.getValueType());
+      Base = DAG.getRegister(PPC::ZERO8, N.getValueType());
+    }
+    break;
+  }
   case PPC::AM_PCRel: {
     // When selecting PC-Relative instructions, "Base" is not utilized as
     // we select the address as [PC+imm].
     Disp = N;
     break;
   }
   case PPC::AM_None:
     break;

llvm/lib/Target/PowerPC/PPCInstrInfo.td

 
 // Load and Store Instruction Selection addressing modes.
 def DForm  : ComplexPattern<iPTR, 2, "SelectDForm",    [], [SDNPWantParent]>;
 def DSForm : ComplexPattern<iPTR, 2, "SelectDSForm",   [], [SDNPWantParent]>;
 def DQForm : ComplexPattern<iPTR, 2, "SelectDQForm",   [], [SDNPWantParent]>;
 def XForm  : ComplexPattern<iPTR, 2, "SelectXForm",    [], [SDNPWantParent]>;
 def ForceXForm : ComplexPattern<iPTR, 2, "SelectForceXForm", [], [SDNPWantParent]>;
 def PCRelForm : ComplexPattern<iPTR, 2, "SelectPCRelForm", [], [SDNPWantParent]>;
+def PDForm : ComplexPattern<iPTR, 2, "SelectPDForm",   [], [SDNPWantParent]>;
 
 //===----------------------------------------------------------------------===//
 // PowerPC Instruction Predicate Definitions.
 def In32BitMode  : Predicate<"!Subtarget->isPPC64()">;
 def In64BitMode  : Predicate<"Subtarget->isPPC64()">;
 def IsBookE  : Predicate<"Subtarget->isBookE()">;
 def IsNotBookE  : Predicate<"!Subtarget->isBookE()">;
 def HasOnlyMSYNC : Predicate<"Subtarget->hasOnlyMSYNC()">;

llvm/lib/Target/PowerPC/PPCInstrPrefix.td

let mayLoad = 0, mayStore = 1, Predicates = [PairedVectorMemops, PrefixInstrs] in {
   defm PSTXVP :
     8LS_DForm_R_XTp5_SI34_MEM_p<1, 62, (outs), (ins vsrprc:$XTp, memri34:$D_RA),
                                 (ins vsrprc:$XTp, memri34_pcrel:$D_RA),
                                 "pstxvp $XTp, $D_RA", IIC_LdStLFD>;
 }
 
 let Predicates = [PairedVectorMemops] in {
   // Intrinsics for Paired Vector Loads.
-  def : Pat<(v256i1 (int_ppc_vsx_lxvp iaddrX16:$src)), (LXVP memrix16:$src)>;
-  def : Pat<(v256i1 (int_ppc_vsx_lxvp xaddrX16:$src)), (LXVPX xaddrX16:$src)>;
+  def : Pat<(v256i1 (int_ppc_vsx_lxvp DQForm:$src)), (LXVP memrix16:$src)>;
+  def : Pat<(v256i1 (int_ppc_vsx_lxvp XForm:$src)), (LXVPX XForm:$src)>;
   let Predicates = [PairedVectorMemops, PrefixInstrs] in {
-    def : Pat<(v256i1 (int_ppc_vsx_lxvp iaddrX34:$src)), (PLXVP memri34:$src)>;
+    def : Pat<(v256i1 (int_ppc_vsx_lxvp PDForm:$src)), (PLXVP memri34:$src)>;
   }
   // Intrinsics for Paired Vector Stores.
-  def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, iaddrX16:$dst),
+  def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, DQForm:$dst),
             (STXVP $XSp, memrix16:$dst)>;
-  def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, xaddrX16:$dst),
-            (STXVPX $XSp, xaddrX16:$dst)>;
+  def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, XForm:$dst),
+            (STXVPX $XSp, XForm:$dst)>;
   let Predicates = [PairedVectorMemops, PrefixInstrs] in {
-    def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, iaddrX34:$dst),
+    def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, PDForm:$dst),
               (PSTXVP $XSp, memri34:$dst)>;
   }
 }
 
 let Predicates = [PCRelativeMemops] in {
   // Load i32
   def : Pat<(i32 (zextloadi1  (PPCmatpcreladdr PCRelForm:$ga))),
             (PLBZpc $ga, 0)>;
def : Pat<(f64 nzFPImmAsi64:$A),
   def : xxevalPattern<(or (vnot v4i32:$vA), (or v4i32:$vB, v4i32:$vC)),
                        !sub(255, 8)>;
   // nand(A, eqv(B, C))
   def : xxevalPattern<(or (vnot v4i32:$vA), (xor v4i32:$vB, v4i32:$vC)),
                        !sub(255, 9)>;
   // nand(A, nand(B, C))
   def : xxevalPattern<(or (vnot v4i32:$vA), (and v4i32:$vB, v4i32:$vC)),
                        !sub(255, 14)>;
+
+  // Anonymous patterns to select prefixed VSX loads and stores.
+  // Load / Store f128
+  def : Pat<(f128 (load PDForm:$src)),
+            (COPY_TO_REGCLASS (PLXV memri34:$src), VRRC)>;
+  def : Pat<(store f128:$XS, PDForm:$dst),
+            (PSTXV (COPY_TO_REGCLASS $XS, VSRC), memri34:$dst)>;
+
+  // Load / Store v4i32
+  def : Pat<(v4i32 (load PDForm:$src)), (PLXV memri34:$src)>;
+  def : Pat<(store v4i32:$XS, PDForm:$dst), (PSTXV $XS, memri34:$dst)>;
+
+  // Load / Store v2i64
+  def : Pat<(v2i64 (load PDForm:$src)), (PLXV memri34:$src)>;
+  def : Pat<(store v2i64:$XS, PDForm:$dst), (PSTXV $XS, memri34:$dst)>;
+
+  // Load / Store v4f32
+  def : Pat<(v4f32 (load PDForm:$src)), (PLXV memri34:$src)>;
+  def : Pat<(store v4f32:$XS, PDForm:$dst), (PSTXV $XS, memri34:$dst)>;
+
+  // Load / Store v2f64
+  def : Pat<(v2f64 (load PDForm:$src)), (PLXV memri34:$src)>;
+  def : Pat<(store v2f64:$XS, PDForm:$dst), (PSTXV $XS, memri34:$dst)>;
+
+  // Cases For PPCstore_scal_int_from_vsr
+  def : Pat<(PPCstore_scal_int_from_vsr
+            (f64 (PPCcv_fp_to_uint_in_vsr f64:$src)), PDForm:$dst, 8),
+            (PSTXSD (XSCVDPUXDS f64:$src), PDForm:$dst)>;
+  def : Pat<(PPCstore_scal_int_from_vsr
+            (f64 (PPCcv_fp_to_sint_in_vsr f64:$src)), PDForm:$dst, 8),
+            (PSTXSD (XSCVDPSXDS f64:$src), PDForm:$dst)>;
+  def : Pat<(PPCstore_scal_int_from_vsr
+            (f64 (PPCcv_fp_to_uint_in_vsr f128:$src)), PDForm:$dst, 8),
+            (PSTXSD (COPY_TO_REGCLASS (XSCVQPUDZ f128:$src), VFRC),
+                     PDForm:$dst)>;
+  def : Pat<(PPCstore_scal_int_from_vsr
+            (f64 (PPCcv_fp_to_sint_in_vsr f128:$src)), PDForm:$dst, 8),
+            (PSTXSD (COPY_TO_REGCLASS (XSCVQPSDZ f128:$src), VFRC),
+                     PDForm:$dst)>;
 }
 
 let Predicates = [PrefixInstrs] in {
   def : Pat<(i32 imm34:$imm), (PLI (getImmAs64BitInt imm:$imm))>;
   def : Pat<(i64 imm34:$imm), (PLI8 (getImmAs64BitInt imm:$imm))>;
   def : Pat<(v16i8 (int_ppc_vsx_xxpermx v16i8:$A, v16i8:$B, v16i8:$C, timm:$D)),
             (COPY_TO_REGCLASS (XXPERMX (COPY_TO_REGCLASS $A, VSRC),
                                        (COPY_TO_REGCLASS $B, VSRC),
                                        (COPY_TO_REGCLASS $C, VSRC), $D), VSRC)>;
   def : Pat<(v16i8 (int_ppc_vsx_xxblendvb v16i8:$A, v16i8:$B, v16i8:$C)),
             (COPY_TO_REGCLASS
                    (XXBLENDVB (COPY_TO_REGCLASS $A, VSRC),
                               (COPY_TO_REGCLASS $B, VSRC),
                               (COPY_TO_REGCLASS $C, VSRC)), VSRC)>;
   def : Pat<(v8i16 (int_ppc_vsx_xxblendvh v8i16:$A, v8i16:$B, v8i16:$C)),
             (COPY_TO_REGCLASS
                    (XXBLENDVH (COPY_TO_REGCLASS $A, VSRC),
                               (COPY_TO_REGCLASS $B, VSRC),
                               (COPY_TO_REGCLASS $C, VSRC)), VSRC)>;
   def : Pat<(int_ppc_vsx_xxblendvw v4i32:$A, v4i32:$B, v4i32:$C),
             (XXBLENDVW $A, $B, $C)>;
   def : Pat<(int_ppc_vsx_xxblendvd v2i64:$A, v2i64:$B, v2i64:$C),
             (XXBLENDVD $A, $B, $C)>;
+
+  // Anonymous patterns to select prefixed loads and stores.
+  // Load i32
+  def : Pat<(i32 (extloadi1 PDForm:$src)), (PLBZ memri34:$src)>;
+  def : Pat<(i32 (zextloadi1 PDForm:$src)), (PLBZ memri34:$src)>;
+  def : Pat<(i32 (extloadi8 PDForm:$src)), (PLBZ memri34:$src)>;
+  def : Pat<(i32 (zextloadi8 PDForm:$src)), (PLBZ memri34:$src)>;
+  def : Pat<(i32 (extloadi16 PDForm:$src)), (PLHZ memri34:$src)>;
+  def : Pat<(i32 (zextloadi16 PDForm:$src)), (PLHZ memri34:$src)>;
+  def : Pat<(i32 (sextloadi16 PDForm:$src)), (PLHA memri34:$src)>;
+  def : Pat<(i32 (load PDForm:$src)), (PLWZ memri34:$src)>;
+
+  // Store i32
+  def : Pat<(truncstorei8 i32:$rS, PDForm:$dst), (PSTB gprc:$rS, memri34:$dst)>;
+  def : Pat<(truncstorei16 i32:$rS, PDForm:$dst), (PSTH gprc:$rS, memri34:$dst)>;
+  def : Pat<(store i32:$rS, PDForm:$dst), (PSTW gprc:$rS, memri34:$dst)>;
+
+  // Load i64
+  def : Pat<(i64 (extloadi1 PDForm:$src)), (PLBZ8 memri34:$src)>;
+  def : Pat<(i64 (zextloadi1 PDForm:$src)), (PLBZ8 memri34:$src)>;
+  def : Pat<(i64 (extloadi8 PDForm:$src)), (PLBZ8 memri34:$src)>;
+  def : Pat<(i64 (zextloadi8 PDForm:$src)), (PLBZ8 memri34:$src)>;
+  def : Pat<(i64 (extloadi16 PDForm:$src)), (PLHZ8 memri34:$src)>;
+  def : Pat<(i64 (zextloadi16 PDForm:$src)), (PLHZ8 memri34:$src)>;
+  def : Pat<(i64 (sextloadi16 PDForm:$src)), (PLHA8 memri34:$src)>;
+  def : Pat<(i64 (extloadi32 PDForm:$src)), (PLWZ8 memri34:$src)>;
+  def : Pat<(i64 (zextloadi32 PDForm:$src)), (PLWZ8 memri34:$src)>;
+  def : Pat<(i64 (sextloadi32 PDForm:$src)), (PLWA8 memri34:$src)>;
+  def : Pat<(i64 (load PDForm:$src)), (PLD memri34:$src)>;
+
+  // Store i64
+  def : Pat<(truncstorei8 i64:$rS, PDForm:$dst), (PSTB8 g8rc:$rS, memri34:$dst)>;
+  def : Pat<(truncstorei16 i64:$rS, PDForm:$dst), (PSTH8 g8rc:$rS, memri34:$dst)>;
+  def : Pat<(truncstorei32 i64:$rS, PDForm:$dst), (PSTW8 g8rc:$rS, memri34:$dst)>;
+  def : Pat<(store i64:$rS, PDForm:$dst), (PSTD g8rc:$rS, memri34:$dst)>;
+
+  // Load / Store f32
+  def : Pat<(f32 (load PDForm:$src)), (PLFS memri34:$src)>;
+  def : Pat<(store f32:$FRS, PDForm:$dst), (PSTFS $FRS, memri34:$dst)>;
+
+  // Load / Store f64
+  def : Pat<(f64 (extloadf32 PDForm:$src)),
+            (COPY_TO_REGCLASS (PLFS memri34:$src), VSFRC)>;
+  def : Pat<(f64 (load PDForm:$src)), (PLFD memri34:$src)>;
+  def : Pat<(store f64:$FRS, PDForm:$dst), (PSTFD $FRS, memri34:$dst)>;
+
+  // Atomic Load
+  def : Pat<(atomic_load_8 PDForm:$src), (PLBZ memri34:$src)>;
+  def : Pat<(atomic_load_16 PDForm:$src), (PLHZ memri34:$src)>;
+  def : Pat<(atomic_load_32 PDForm:$src), (PLWZ memri34:$src)>;
+  def : Pat<(atomic_load_64 PDForm:$src), (PLD memri34:$src)>;
+
+  // Atomic Store
+  def : Pat<(atomic_store_8 PDForm:$dst, i32:$RS), (PSTB $RS, memri34:$dst)>;
+  def : Pat<(atomic_store_16 PDForm:$dst, i32:$RS), (PSTH $RS, memri34:$dst)>;
+  def : Pat<(atomic_store_32 PDForm:$dst, i32:$RS), (PSTW $RS, memri34:$dst)>;
+  def : Pat<(atomic_store_64 PDForm:$dst, i64:$RS), (PSTD $RS, memri34:$dst)>;
 }
 
 def InsertEltShift {
   dag Sub32Left0 = (EXTRACT_SUBREG $rB, sub_32);
   dag Sub32Left1 = (RLWINM (EXTRACT_SUBREG $rB, sub_32), 1, 0, 30);
   dag Sub32Left2 = (RLWINM (EXTRACT_SUBREG $rB, sub_32), 2, 0, 29);
   dag Left3 = (RLWINM8 $rB, 3, 0, 28);
 }

llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp

PPCRegisterInfo::PPCRegisterInfo(const PPCTargetMachine &TM)
 
   // SPE
   ImmToIdxMap[PPC::EVLDD] = PPC::EVLDDX;
   ImmToIdxMap[PPC::EVSTDD] = PPC::EVSTDDX;
   ImmToIdxMap[PPC::SPESTW] = PPC::SPESTWX;
   ImmToIdxMap[PPC::SPELWZ] = PPC::SPELWZX;
 
   // Power10
+  ImmToIdxMap[PPC::PLBZ]   = PPC::LBZX; ImmToIdxMap[PPC::PLBZ8]   = PPC::LBZX8;
+  ImmToIdxMap[PPC::PLHZ]   = PPC::LHZX; ImmToIdxMap[PPC::PLHZ8]   = PPC::LHZX8;
+  ImmToIdxMap[PPC::PLHA]   = PPC::LHAX; ImmToIdxMap[PPC::PLHA8]   = PPC::LHAX8;
+  ImmToIdxMap[PPC::PLWZ]   = PPC::LWZX; ImmToIdxMap[PPC::PLWZ8]   = PPC::LWZX8;
+  ImmToIdxMap[PPC::PLWA]   = PPC::LWAX; ImmToIdxMap[PPC::PLWA8]   = PPC::LWAX;
+  ImmToIdxMap[PPC::PLD]    = PPC::LDX;  ImmToIdxMap[PPC::PSTD]   = PPC::STDX;
+
+  ImmToIdxMap[PPC::PSTB]   = PPC::STBX; ImmToIdxMap[PPC::PSTB8]   = PPC::STBX8;
+  ImmToIdxMap[PPC::PSTH]   = PPC::STHX; ImmToIdxMap[PPC::PSTH8]   = PPC::STHX8;
+  ImmToIdxMap[PPC::PSTW]   = PPC::STWX; ImmToIdxMap[PPC::PSTW8]   = PPC::STWX8;
+
+  ImmToIdxMap[PPC::PLFS]   = PPC::LFSX; ImmToIdxMap[PPC::PSTFS]   = PPC::STFSX;
+  ImmToIdxMap[PPC::PLFD]   = PPC::LFDX; ImmToIdxMap[PPC::PSTFD]   = PPC::STFDX;
+  ImmToIdxMap[PPC::PLXSSP] = PPC::LXSSPX; ImmToIdxMap[PPC::PSTXSSP] = PPC::STXSSPX;
+  ImmToIdxMap[PPC::PLXSD]  = PPC::LXSDX; ImmToIdxMap[PPC::PSTXSD]  = PPC::STXSDX;
+  ImmToIdxMap[PPC::PLXV]   = PPC::LXVX; ImmToIdxMap[PPC::PSTXV]  = PPC::STXVX;
+
   ImmToIdxMap[PPC::LXVP]   = PPC::LXVPX;
   ImmToIdxMap[PPC::STXVP]  = PPC::STXVPX;
   ImmToIdxMap[PPC::PLXVP]  = PPC::LXVPX;
   ImmToIdxMap[PPC::PSTXVP] = PPC::STXVPX;
 }
 
 /// getPointerRegClass - Return the register class to use to hold pointers.
 /// This is used for addressing modes.
PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
   // Get the instruction.
   MachineInstr &MI = *II;
   // Get the instruction's basic block.
   MachineBasicBlock &MBB = *MI.getParent();
   // Get the basic block's function.
   MachineFunction &MF = *MBB.getParent();
   const PPCSubtarget &Subtarget = MF.getSubtarget<PPCSubtarget>();
   // Get the instruction info.
-  const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
+  const PPCInstrInfo &TII = *Subtarget.getInstrInfo();
   // Get the frame info.
   MachineFrameInfo &MFI = MF.getFrameInfo();
   DebugLoc dl = MI.getDebugLoc();
 
   unsigned OffsetOperandNo = getOffsetONFromFION(MI, FIOperandNum);
 
   // Get the frame index.
   int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
   // happen in invalid code.
   assert(OpC != PPC::DBG_VALUE &&
          "This should be handled in a target-independent way");
   // FIXME: This should be factored out to a separate function as prefixed
   // instructions add a number of opcodes for which we can use 34-bit imm.
   bool OffsetFitsMnemonic = (OpC == PPC::EVSTDD || OpC == PPC::EVLDD) ?
                             isUInt<8>(Offset) :
                             isInt<16>(Offset);
-  if (OpC == PPC::PLXVP || OpC == PPC::PSTXVP)
+  if (TII.isPrefixed(MI.getOpcode()))
     OffsetFitsMnemonic = isInt<34>(Offset);
   if (!noImmForm && ((OffsetFitsMnemonic &&
                       ((Offset % offsetMinAlign(MI)) == 0)) ||
                      OpC == TargetOpcode::STACKMAP ||
                      OpC == TargetOpcode::PATCHPOINT)) {
     MI.getOperand(OffsetOperandNo).ChangeToImmediate(Offset);
     return;
   }

llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll

 ; CHECK-32-P10:       # %bb.0: # %entry
 ; CHECK-32-P10-NEXT:    lfd 0, 0(3)
 ; CHECK-32-P10-DAG:     addi 6, 1, -32
 ; CHECK-32-P10-DAG:     rlwinm 4, 4, 3, 28, 28
 ; CHECK-32-P10-NEXT:    stxv 34, -32(1)
 ; CHECK-32-P10-NEXT:    rlwinm 5, 5, 3, 28, 28
 ; CHECK-32-P10-NEXT:    stfdx 0, 6, 4
 ; CHECK-32-P10-NEXT:    lxv 0, -32(1)
-; CHECK-32-P10-NEXT:    lfd 1, 1(3)
+; CHECK-32-P10-NEXT:    plfd 1, 1(3), 0
 ; CHECK-32-P10-NEXT:    addi 3, 1, -16
 ; CHECK-32-P10-NEXT:    stxv 0, -16(1)
 ; CHECK-32-P10-NEXT:    stfdx 1, 3, 5
 ; CHECK-32-P10-NEXT:    lxv 34, -16(1)
 ; CHECK-32-P10-NEXT:    blr
 entry:
   %0 = bitcast i8* %b to double*
   %add.ptr1 = getelementptr inbounds i8, i8* %b, i64 1

 ; CHECK-64-P10-NEXT:    ldx 3, 3, 4
 ; CHECK-64-P10-NEXT:    extsw 4, 5
 ; CHECK-64-P10-NEXT:    rlwinm 4, 4, 3, 0, 28
 ; CHECK-64-P10-NEXT:    vinsdlx 2, 4, 3
 ; CHECK-64-P10-NEXT:    blr
 ;
 ; CHECK-32-P10-LABEL: testDouble3:
 ; CHECK-32-P10:       # %bb.0: # %entry
-; CHECK-32-P10-NEXT:    lis 6, 1
-; CHECK-32-P10-NEXT:    rlwinm 4, 4, 3, 28, 28
-; CHECK-32-P10-NEXT:    rlwinm 5, 5, 3, 28, 28
-; CHECK-32-P10-NEXT:    lfdx 0, 3, 6
-; CHECK-32-P10-NEXT:    addi 6, 1, -32
+; CHECK-32-P10-NEXT:    plfd 0, 65536(3), 0
+; CHECK-32-P10-DAG:     addi 6, 1, -32
+; CHECK-32-P10-DAG:     rlwinm 4, 4, 3, 28, 28
 ; CHECK-32-P10-NEXT:    stxv 34, -32(1)
+; CHECK-32-P10-NEXT:    rlwinm 5, 5, 3, 28, 28
 ; CHECK-32-P10-NEXT:    stfdx 0, 6, 4
 ; CHECK-32-P10-NEXT:    lxv 0, -32(1)
 ; CHECK-32-P10-NEXT:    lfd 1, 0(3)
 ; CHECK-32-P10-NEXT:    addi 3, 1, -16
 ; CHECK-32-P10-NEXT:    stxv 0, -16(1)
 ; CHECK-32-P10-NEXT:    stfdx 1, 3, 5
 ; CHECK-32-P10-NEXT:    lxv 34, -16(1)
 ; CHECK-32-P10-NEXT:    blr

 ; CHECK-32:       # %bb.0: # %entry
 ; CHECK-32-NEXT:    lis 4, 4
 ; CHECK-32-NEXT:    lfdx 0, 3, 4
 ; CHECK-32-NEXT:    xxpermdi 34, 0, 34, 1
 ; CHECK-32-NEXT:    blr
 ;
 ; CHECK-64-P10-LABEL: testDoubleImm4:
 ; CHECK-64-P10:       # %bb.0: # %entry
-; CHECK-64-P10-NEXT:    lis 4, 4
-; CHECK-64-P10-NEXT:    lfdx 0, 3, 4
+; CHECK-64-P10-NEXT:    plfd 0, 262144(3), 0
 ; CHECK-64-P10-NEXT:    xxpermdi 34, 0, 34, 1
 ; CHECK-64-P10-NEXT:    blr
 ;
 ; CHECK-32-P10-LABEL: testDoubleImm4:
 ; CHECK-32-P10:       # %bb.0: # %entry
-; CHECK-32-P10-NEXT:    lis 4, 4
-; CHECK-32-P10-NEXT:    lfdx 0, 3, 4
+; CHECK-32-P10-NEXT:    plfd 0, 262144(3), 0
 ; CHECK-32-P10-NEXT:    xxpermdi 34, 0, 34, 1
 ; CHECK-32-P10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i32, i32* %b, i64 65536
   %0 = bitcast i32* %add.ptr to double*
   %1 = load double, double* %0, align 8
   %vecins = insertelement <2 x double> %a, double %1, i32 0
   ret <2 x double> %vecins

llvm/test/CodeGen/PowerPC/atomics-i16-ldst.ll

entry:
   %conv = zext i8 %0 to i16
   ret i16 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i16 @ld_align32_int16_t_uint8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int16_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int16_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i16 @ld_disjoint_align32_int16_t_uint8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int16_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int16_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = sext i8 %0 to i16
   ret i16 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i16 @ld_align32_int16_t_int8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int16_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int16_t_int8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i16 @ld_disjoint_align32_int16_t_int8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int16_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int16_t_int8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %1 = load atomic i16, i16* %0 monotonic, align 2
   ret i16 %1
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i16 @ld_align32_int16_t_uint16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int16_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsh r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int16_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lhzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i16 @ld_disjoint_align32_int16_t_uint16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int16_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsh r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int16_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = trunc i32 %1 to i16
   ret i16 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i16 @ld_align32_int16_t_uint32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int16_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsh r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int16_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lwzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i16 @ld_disjoint_align32_int16_t_uint32_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int16_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsh r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int16_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = trunc i64 %1 to i16
   ret i16 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i16 @ld_align32_int16_t_uint64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int16_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsh r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int16_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    ldx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i16 @ld_disjoint_align32_int16_t_uint64_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int16_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsh r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int16_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = zext i8 %0 to i16
   ret i16 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i16 @ld_align32_uint16_t_uint8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint16_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint16_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint16_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = sext i8 %0 to i16
   ret i16 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i16 @ld_align32_uint16_t_int8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint16_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    clrldi r3, r3, 48
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint16_t_int8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_int8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint16_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    clrldi r3, r3, 48
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_int8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
entry:
   %1 = load atomic i16, i16* %0 monotonic, align 2
   ret i16 %1
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i16 @ld_align32_uint16_t_uint16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint16_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint16_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lhzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint16_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = trunc i32 %1 to i16
   ret i16 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i16 @ld_align32_uint16_t_uint32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint16_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 48
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint16_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lwzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint32_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint16_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 48
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = trunc i64 %1 to i16
   ret i16 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i16 @ld_align32_uint16_t_uint64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint16_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 48
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint16_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    ldx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint64_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint16_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 48
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   store atomic i8 %conv, i8* %add.ptr monotonic, align 1
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_uint16_t_uint8_t(i8* nocapture %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint16_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stbx r4, r3, r5
+; CHECK-P10-NEXT:    pstb r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint16_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stbx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_uint16_t_uint8_t(i64 %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint16_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stbx r4, r3, r5
+; CHECK-P10-NEXT:    pstb r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store atomic i16 %str, i16* %0 monotonic, align 2
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_uint16_t_uint16_t(i8* nocapture %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint16_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint16_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    sthx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_uint16_t_uint16_t(i64 %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint16_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store atomic i32 %conv, i32* %0 monotonic, align 4
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_uint16_t_uint32_t(i8* nocapture %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint16_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint16_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stwx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_uint16_t_uint32_t(i64 %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint16_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store atomic i64 %conv, i64* %0 monotonic, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_uint16_t_uint64_t(i8* nocapture %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint16_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint16_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stdx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_uint16_t_uint64_t(i64 %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint16_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store atomic i32 %conv, i32* %0 monotonic, align 4
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_int16_t_uint32_t(i8* nocapture %ptr, i16 signext %str) {
 ; CHECK-P10-LABEL: st_align32_int16_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_int16_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stwx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_int16_t_uint32_t(i64 %ptr, i16 signext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int16_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int16_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store atomic i64 %conv, i64* %0 monotonic, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_int16_t_uint64_t(i8* nocapture %ptr, i16 signext %str) {
 ; CHECK-P10-LABEL: st_align32_int16_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_int16_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stdx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_int16_t_uint64_t(i64 %ptr, i16 signext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int16_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int16_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712

llvm/test/CodeGen/PowerPC/atomics-i32-ldst.ll

entry:
   %conv = zext i8 %0 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i32 @ld_align32_int32_t_uint8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int32_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int32_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i32 @ld_disjoint_align32_int32_t_uint8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int32_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = sext i8 %0 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i32 @ld_align32_int32_t_int8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int32_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int32_t_int8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i32 @ld_disjoint_align32_int32_t_int8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int32_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_int8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = zext i16 %1 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i32 @ld_align32_int32_t_uint16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int32_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int32_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lhzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i32 @ld_disjoint_align32_int32_t_uint16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int32_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = sext i16 %1 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i32 @ld_align32_int32_t_int16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int32_t_int16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsh r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int32_t_int16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lhzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i32 @ld_disjoint_align32_int32_t_int16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int32_t_int16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsh r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_int16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %1 = load atomic i32, i32* %0 monotonic, align 4
   ret i32 %1
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i32 @ld_align32_int32_t_uint32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int32_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int32_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lwzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i32 @ld_disjoint_align32_int32_t_uint32_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int32_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = trunc i64 %1 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i32 @ld_align32_int32_t_uint64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int32_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int32_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    ldx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i32 @ld_disjoint_align32_int32_t_uint64_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int32_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = zext i8 %0 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i32 @ld_align32_uint32_t_uint8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint32_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint32_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint32_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = sext i8 %0 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i32 @ld_align32_uint32_t_int8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint32_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint32_t_int8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_int8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint32_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_int8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
entry:
   %conv = zext i16 %1 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i32 @ld_align32_uint32_t_uint16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint32_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint32_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lhzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint32_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = sext i16 %1 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i32 @ld_align32_uint32_t_int16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint32_t_int16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsh r3, r3
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint32_t_int16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_int16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint32_t_int16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsh r3, r3
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_int16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
entry:
   %1 = load atomic i32, i32* %0 monotonic, align 4
   ret i32 %1
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i32 @ld_align32_uint32_t_uint32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint32_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint32_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lwzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint32_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint32_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = trunc i64 %1 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i32 @ld_align32_uint32_t_uint64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint32_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint32_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    ldx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint64_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint32_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   store atomic i8 %conv, i8* %add.ptr monotonic, align 1
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_uint32_t_uint8_t(i8* nocapture %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint32_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stbx r4, r3, r5
+; CHECK-P10-NEXT:    pstb r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint32_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stbx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_uint32_t_uint8_t(i64 %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint32_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stbx r4, r3, r5
+; CHECK-P10-NEXT:    pstb r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store atomic i16 %conv, i16* %0 monotonic, align 2
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_uint32_t_uint16_t(i8* nocapture %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint32_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint32_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    sthx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_uint32_t_uint16_t(i64 %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint32_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store atomic i32 %str, i32* %0 monotonic, align 4
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_uint32_t_uint32_t(i8* nocapture %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint32_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint32_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stwx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_uint32_t_uint32_t(i64 %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint32_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store atomic i64 %conv, i64* %0 monotonic, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_uint32_t_uint64_t(i8* nocapture %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint32_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint32_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stdx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_uint32_t_uint64_t(i64 %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint32_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store atomic i64 %conv, i64* %0 monotonic, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_int32_t_uint64_t(i8* nocapture %ptr, i32 signext %str) {
 ; CHECK-P10-LABEL: st_align32_int32_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_int32_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stdx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_int32_t_uint64_t(i64 %ptr, i32 signext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int32_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int32_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712

llvm/test/CodeGen/PowerPC/atomics-i64-ldst.ll

entry:
   %conv = zext i8 %0 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_align32_int64_t_uint8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int64_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int64_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_int64_t_uint8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int64_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = sext i8 %0 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_align32_int64_t_int8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int64_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int64_t_int8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_int64_t_int8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int64_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_int8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = zext i16 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_align32_int64_t_uint16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int64_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int64_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lhzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_int64_t_uint16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int64_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = sext i16 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_align32_int64_t_int16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int64_t_int16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsh r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int64_t_int16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lhzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_int64_t_int16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int64_t_int16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsh r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_int16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = zext i32 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_align32_int64_t_uint32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int64_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int64_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lwzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_int64_t_uint32_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int64_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = sext i32 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_align32_int64_t_int32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int64_t_int32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int64_t_int32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lwzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_int64_t_int32_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int64_t_int32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_int32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %1 = load atomic i64, i64* %0 monotonic, align 8
   ret i64 %1
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_align32_int64_t_uint64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int64_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int64_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    ldx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_int64_t_uint64_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int64_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
entry:
   %conv = zext i8 %0 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_align32_uint64_t_uint8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint64_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_uint64_t_uint8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint64_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = sext i8 %0 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_align32_uint64_t_int8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint64_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint64_t_int8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_uint64_t_int8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint64_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_int8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = zext i16 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_align32_uint64_t_uint16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint64_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lhzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_uint64_t_uint16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint64_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = sext i16 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_align32_uint64_t_int16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint64_t_int16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsh r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint64_t_int16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lhzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_uint64_t_int16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint64_t_int16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsh r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_int16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = zext i32 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_align32_uint64_t_uint32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint64_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lwzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_uint64_t_uint32_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint64_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = sext i32 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_align32_uint64_t_int32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint64_t_int32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint64_t_int32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lwzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_uint64_t_int32_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint64_t_int32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_int32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %1 = load atomic i64, i64* %0 monotonic, align 8
   ret i64 %1
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_align32_uint64_t_uint64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint64_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    ldx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_uint64_t_uint64_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint64_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
entry:
   store atomic i8 %conv, i8* %add.ptr monotonic, align 1
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_uint64_t_uint8_t(i8* nocapture %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_align32_uint64_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stbx r4, r3, r5
+; CHECK-P10-NEXT:    pstb r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint64_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stbx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_uint64_t_uint8_t(i64 %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint64_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stbx r4, r3, r5
+; CHECK-P10-NEXT:    pstb r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store atomic i16 %conv, i16* %0 monotonic, align 2
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_uint64_t_uint16_t(i8* nocapture %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_align32_uint64_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint64_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    sthx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_uint64_t_uint16_t(i64 %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint64_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store atomic i32 %conv, i32* %0 monotonic, align 4
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_uint64_t_uint32_t(i8* nocapture %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_align32_uint64_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint64_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stwx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_uint64_t_uint32_t(i64 %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint64_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store atomic i64 %str, i64* %0 monotonic, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_uint64_t_uint64_t(i8* nocapture %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_align32_uint64_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint64_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stdx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_uint64_t_uint64_t(i64 %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint64_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712

llvm/test/CodeGen/PowerPC/atomics-i8-ldst.ll

entry:
   %0 = load atomic i8, i8* %add.ptr monotonic, align 1
   ret i8 %0
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i8 @ld_align32_int8_t_uint8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int8_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int8_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i8 @ld_disjoint_align32_int8_t_uint8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int8_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int8_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = trunc i16 %1 to i8
   ret i8 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i8 @ld_align32_int8_t_uint16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int8_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int8_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lhzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i8 @ld_disjoint_align32_int8_t_uint16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int8_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int8_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = trunc i32 %1 to i8
   ret i8 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i8 @ld_align32_int8_t_uint32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int8_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int8_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lwzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i8 @ld_disjoint_align32_int8_t_uint32_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int8_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int8_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = trunc i64 %1 to i8
   ret i8 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i8 @ld_align32_int8_t_uint64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int8_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int8_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    ldx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local signext i8 @ld_disjoint_align32_int8_t_uint64_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int8_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int8_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %0 = load atomic i8, i8* %add.ptr monotonic, align 1
   ret i8 %0
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i8 @ld_align32_uint8_t_uint8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint8_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint8_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint8_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint8_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = trunc i16 %1 to i8
   ret i8 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i8 @ld_align32_uint8_t_uint16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint8_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 56
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint8_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lhzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint8_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 56
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint8_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = trunc i32 %1 to i8
   ret i8 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i8 @ld_align32_uint8_t_uint32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint8_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 56
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint8_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lwzx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint32_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint8_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 56
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint8_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = trunc i64 %1 to i8
   ret i8 %conv
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i8 @ld_align32_uint8_t_uint64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint8_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 56
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint8_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    ldx r3, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint64_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint8_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 56
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint8_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   store atomic i8 %str, i8* %add.ptr monotonic, align 1
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_uint8_t_uint8_t(i8* nocapture %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint8_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stbx r4, r3, r5
+; CHECK-P10-NEXT:    pstb r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint8_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stbx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_uint8_t_uint8_t(i64 %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint8_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stbx r4, r3, r5
+; CHECK-P10-NEXT:    pstb r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store atomic i16 %conv, i16* %0 monotonic, align 2
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_uint8_t_uint16_t(i8* nocapture %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint8_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint8_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    sthx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_uint8_t_uint16_t(i64 %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint8_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store atomic i32 %conv, i32* %0 monotonic, align 4
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_uint8_t_uint32_t(i8* nocapture %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint8_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint8_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stwx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_uint8_t_uint32_t(i64 %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint8_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store atomic i64 %conv, i64* %0 monotonic, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_uint8_t_uint64_t(i8* nocapture %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint8_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint8_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stdx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_uint8_t_uint64_t(i64 %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint8_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store atomic i16 %conv, i16* %0 monotonic, align 2
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_int8_t_uint16_t(i8* nocapture %ptr, i8 signext %str) {
 ; CHECK-P10-LABEL: st_align32_int8_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_int8_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    sthx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_int8_t_uint16_t(i64 %ptr, i8 signext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int8_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store atomic i32 %conv, i32* %0 monotonic, align 4
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_int8_t_uint32_t(i8* nocapture %ptr, i8 signext %str) {
 ; CHECK-P10-LABEL: st_align32_int8_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_int8_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stwx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_int8_t_uint32_t(i64 %ptr, i8 signext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int8_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store atomic i64 %conv, i64* %0 monotonic, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_align32_int8_t_uint64_t(i8* nocapture %ptr, i8 signext %str) {
 ; CHECK-P10-LABEL: st_align32_int8_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_int8_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stdx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn
 define dso_local void @st_disjoint_align32_int8_t_uint64_t(i64 %ptr, i8 signext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int8_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712

llvm/test/CodeGen/PowerPC/f128_ldst.ll

 entry:
   %0 = inttoptr i64 %ptr to fp128*
   %1 = load fp128, fp128* %0, align 16
   ret fp128 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly willreturn
 define dso_local fp128 @ld_unalign16___float128___float128(i8* nocapture readonly %ptr) {
-; CHECK-LABEL: ld_unalign16___float128___float128:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    li r4, 1
-; CHECK-NEXT:    lxvx v2, r3, r4
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: ld_unalign16___float128___float128:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    plxv v2, 1(r3), 0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-PREP10-LABEL: ld_unalign16___float128___float128:
+; CHECK-PREP10:       # %bb.0: # %entry
+; CHECK-PREP10-NEXT:    li r4, 1
+; CHECK-PREP10-NEXT:    lxvx v2, r3, r4
+; CHECK-PREP10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
   %0 = bitcast i8* %add.ptr to fp128*
   %1 = load fp128, fp128* %0, align 16
   ret fp128 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly willreturn
 define dso_local fp128 @ld_align16___float128___float128(i8* nocapture readonly %ptr) {
-; CHECK-LABEL: ld_align16___float128___float128:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    li r4, 8
-; CHECK-NEXT:    lxvx v2, r3, r4
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: ld_align16___float128___float128:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    plxv v2, 8(r3), 0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-PREP10-LABEL: ld_align16___float128___float128:
+; CHECK-PREP10:       # %bb.0: # %entry
+; CHECK-PREP10-NEXT:    li r4, 8
+; CHECK-PREP10-NEXT:    lxvx v2, r3, r4
+; CHECK-PREP10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
   %0 = bitcast i8* %add.ptr to fp128*
   %1 = load fp128, fp128* %0, align 16
   ret fp128 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly willreturn
 define dso_local fp128 @ld_unalign32___float128___float128(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_unalign32___float128___float128:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lxvx v2, r3, r4
+; CHECK-P10-NEXT:    plxv v2, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_unalign32___float128___float128:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463
 ; CHECK-PREP10-NEXT:    lxvx v2, r3, r4
 ; CHECK-PREP10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999
   %0 = bitcast i8* %add.ptr to fp128*
   %1 = load fp128, fp128* %0, align 16
   ret fp128 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly willreturn
 define dso_local fp128 @ld_align32___float128___float128(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32___float128___float128:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lxvx v2, r3, r4
+; CHECK-P10-NEXT:    plxv v2, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32___float128___float128:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lxvx v2, r3, r4
 ; CHECK-PREP10-NEXT:    blr
entry:
   %or = or i64 %ptr, 6
   %0 = inttoptr i64 %or to fp128*
   %1 = load fp128, fp128* %0, align 16
   ret fp128 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly willreturn
 define dso_local fp128 @ld_disjoint_unalign16___float128___float128(i64 %ptr) {
-; CHECK-LABEL: ld_disjoint_unalign16___float128___float128:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    rldicr r3, r3, 0, 51
-; CHECK-NEXT:    li r4, 6
-; CHECK-NEXT:    lxvx v2, r3, r4
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: ld_disjoint_unalign16___float128___float128:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT:    plxv v2, 6(r3), 0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-PREP10-LABEL: ld_disjoint_unalign16___float128___float128:
+; CHECK-PREP10:       # %bb.0: # %entry
+; CHECK-PREP10-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-PREP10-NEXT:    li r4, 6
+; CHECK-PREP10-NEXT:    lxvx v2, r3, r4
+; CHECK-PREP10-NEXT:    blr
 entry:
   %and = and i64 %ptr, -4096
   %or = or i64 %and, 6
   %0 = inttoptr i64 %or to fp128*
   %1 = load fp128, fp128* %0, align 16
   ret fp128 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly willreturn
 define dso_local fp128 @ld_disjoint_align16___float128___float128(i64 %ptr) {
-; CHECK-LABEL: ld_disjoint_align16___float128___float128:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    rldicr r3, r3, 0, 51
-; CHECK-NEXT:    li r4, 24
-; CHECK-NEXT:    lxvx v2, r3, r4
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: ld_disjoint_align16___float128___float128:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT:    plxv v2, 24(r3), 0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-PREP10-LABEL: ld_disjoint_align16___float128___float128:
+; CHECK-PREP10:       # %bb.0: # %entry
+; CHECK-PREP10-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-PREP10-NEXT:    li r4, 24
+; CHECK-PREP10-NEXT:    lxvx v2, r3, r4
+; CHECK-PREP10-NEXT:    blr
 entry:
   %and = and i64 %ptr, -4096
   %or = or i64 %and, 24
   %0 = inttoptr i64 %or to fp128*
   %1 = load fp128, fp128* %0, align 16
   ret fp128 %1
 }
 
entry:
   ret fp128 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly willreturn
 define dso_local fp128 @ld_disjoint_unalign32___float128___float128(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_unalign32___float128___float128:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lxvx v2, r3, r4
+; CHECK-P10-NEXT:    plxv v2, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_disjoint_unalign32___float128___float128:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    rldicr r3, r3, 0, 43
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463
 ; CHECK-PREP10-NEXT:    lxvx v2, r3, r4
 ; CHECK-PREP10-NEXT:    blr
 entry:
   %and = and i64 %ptr, -1048576
   %or = or i64 %and, 99999
   %0 = inttoptr i64 %or to fp128*
   %1 = load fp128, fp128* %0, align 16
   ret fp128 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly willreturn
 define dso_local fp128 @ld_disjoint_align32___float128___float128(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32___float128___float128:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lxvx v2, r3, r4
+; CHECK-P10-NEXT:    plxv v2, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_disjoint_align32___float128___float128:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, -15264
 ; CHECK-PREP10-NEXT:    and r3, r3, r4
 ; CHECK-PREP10-NEXT:    lis r4, 15258
 ; CHECK-PREP10-NEXT:    ori r4, r4, 41712

 entry:
   %0 = inttoptr i64 %ptr to fp128*
   store fp128 %str, fp128* %0, align 16
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind willreturn writeonly
 define dso_local void @st_unalign16___float128___float128(i8* nocapture %ptr, fp128 %str) {
-; CHECK-LABEL: st_unalign16___float128___float128:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    li r4, 1
-; CHECK-NEXT:    stxvx v2, r3, r4
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: st_unalign16___float128___float128:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    pstxv v2, 1(r3), 0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-PREP10-LABEL: st_unalign16___float128___float128:
+; CHECK-PREP10:       # %bb.0: # %entry
+; CHECK-PREP10-NEXT:    li r4, 1
+; CHECK-PREP10-NEXT:    stxvx v2, r3, r4
+; CHECK-PREP10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
   %0 = bitcast i8* %add.ptr to fp128*
   store fp128 %str, fp128* %0, align 16
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind willreturn writeonly
 define dso_local void @st_align16___float128___float128(i8* nocapture %ptr, fp128 %str) {
-; CHECK-LABEL: st_align16___float128___float128:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    li r4, 8
-; CHECK-NEXT:    stxvx v2, r3, r4
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: st_align16___float128___float128:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    pstxv v2, 8(r3), 0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-PREP10-LABEL: st_align16___float128___float128:
+; CHECK-PREP10:       # %bb.0: # %entry
+; CHECK-PREP10-NEXT:    li r4, 8
+; CHECK-PREP10-NEXT:    stxvx v2, r3, r4
+; CHECK-PREP10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
   %0 = bitcast i8* %add.ptr to fp128*
   store fp128 %str, fp128* %0, align 16
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind willreturn writeonly
 define dso_local void @st_unalign32___float128___float128(i8* nocapture %ptr, fp128 %str) {
 ; CHECK-P10-LABEL: st_unalign32___float128___float128:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    stxvx v2, r3, r4
+; CHECK-P10-NEXT:    pstxv v2, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_unalign32___float128___float128:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463
 ; CHECK-PREP10-NEXT:    stxvx v2, r3, r4
 ; CHECK-PREP10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999
   %0 = bitcast i8* %add.ptr to fp128*
   store fp128 %str, fp128* %0, align 16
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind willreturn writeonly
 define dso_local void @st_align32___float128___float128(i8* nocapture %ptr, fp128 %str) {
 ; CHECK-P10-LABEL: st_align32___float128___float128:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    stxvx v2, r3, r4
+; CHECK-P10-NEXT:    pstxv v2, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32___float128___float128:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    stxvx v2, r3, r4
 ; CHECK-PREP10-NEXT:    blr
entry:
   %or = or i64 %ptr, 6
   %0 = inttoptr i64 %or to fp128*
   store fp128 %str, fp128* %0, align 16
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind willreturn writeonly
 define dso_local void @st_disjoint_unalign16___float128___float128(i64 %ptr, fp128 %str) {
-; CHECK-LABEL: st_disjoint_unalign16___float128___float128:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    rldicr r3, r3, 0, 51
-; CHECK-NEXT:    li r4, 6
-; CHECK-NEXT:    stxvx v2, r3, r4
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: st_disjoint_unalign16___float128___float128:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT:    pstxv v2, 6(r3), 0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-PREP10-LABEL: st_disjoint_unalign16___float128___float128:
+; CHECK-PREP10:       # %bb.0: # %entry
+; CHECK-PREP10-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-PREP10-NEXT:    li r4, 6
+; CHECK-PREP10-NEXT:    stxvx v2, r3, r4
+; CHECK-PREP10-NEXT:    blr
 entry:
   %and = and i64 %ptr, -4096
   %or = or i64 %and, 6
   %0 = inttoptr i64 %or to fp128*
   store fp128 %str, fp128* %0, align 16
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind willreturn writeonly
 define dso_local void @st_disjoint_align16___float128___float128(i64 %ptr, fp128 %str) {
-; CHECK-LABEL: st_disjoint_align16___float128___float128:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    rldicr r3, r3, 0, 51
-; CHECK-NEXT:    li r4, 24
-; CHECK-NEXT:    stxvx v2, r3, r4
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: st_disjoint_align16___float128___float128:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT:    pstxv v2, 24(r3), 0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-PREP10-LABEL: st_disjoint_align16___float128___float128:
+; CHECK-PREP10:       # %bb.0: # %entry
+; CHECK-PREP10-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-PREP10-NEXT:    li r4, 24
+; CHECK-PREP10-NEXT:    stxvx v2, r3, r4
+; CHECK-PREP10-NEXT:    blr
 entry:
   %and = and i64 %ptr, -4096
   %or = or i64 %and, 24
   %0 = inttoptr i64 %or to fp128*
   store fp128 %str, fp128* %0, align 16
   ret void
 }
 
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind willreturn writeonly
 define dso_local void @st_disjoint_unalign32___float128___float128(i64 %ptr, fp128 %str) {
 ; CHECK-P10-LABEL: st_disjoint_unalign32___float128___float128:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    stxvx v2, r3, r4
+; CHECK-P10-NEXT:    pstxv v2, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_disjoint_unalign32___float128___float128:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    rldicr r3, r3, 0, 43
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463
 ; CHECK-PREP10-NEXT:    stxvx v2, r3, r4
 ; CHECK-PREP10-NEXT:    blr
 entry:
   %and = and i64 %ptr, -1048576
   %or = or i64 %and, 99999
   %0 = inttoptr i64 %or to fp128*
   store fp128 %str, fp128* %0, align 16
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind willreturn writeonly
 define dso_local void @st_disjoint_align32___float128___float128(i64 %ptr, fp128 %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32___float128___float128:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    stxvx v2, r3, r4
+; CHECK-P10-NEXT:    pstxv v2, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_disjoint_align32___float128___float128:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, -15264
 ; CHECK-PREP10-NEXT:    and r3, r3, r4
 ; CHECK-PREP10-NEXT:    lis r4, 15258
 ; CHECK-PREP10-NEXT:    ori r4, r4, 41712

 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    plxv vs0, GlobLd128@PCREL+3(0), 1
 ; CHECK-P10-LE-NEXT:    pstxv vs0, GlobSt128@PCREL+3(0), 1
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: testGlob128PtrPlus3:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    addis r3, r2, GlobLd128@toc@ha
-; CHECK-P10-BE-NEXT:    li r4, 3
 ; CHECK-P10-BE-NEXT:    addi r3, r3, GlobLd128@toc@l
-; CHECK-P10-BE-NEXT:    lxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT:    plxv vs0, 3(r3), 0
 ; CHECK-P10-BE-NEXT:    addis r3, r2, GlobSt128@toc@ha
 ; CHECK-P10-BE-NEXT:    addi r3, r3, GlobSt128@toc@l
-; CHECK-P10-BE-NEXT:    stxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT:    pstxv vs0, 3(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: testGlob128PtrPlus3:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    addis r3, r2, GlobLd128@toc@ha
 ; CHECK-PREP10-NEXT:    li r4, 3
 ; CHECK-PREP10-NEXT:    addi r3, r3, GlobLd128@toc@l
 ; CHECK-PREP10-NEXT:    lxvx vs0, r3, r4

 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    plxv vs0, GlobLd128@PCREL+4(0), 1
 ; CHECK-P10-LE-NEXT:    pstxv vs0, GlobSt128@PCREL+4(0), 1
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: testGlob128PtrPlus4:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    addis r3, r2, GlobLd128@toc@ha
-; CHECK-P10-BE-NEXT:    li r4, 4
 ; CHECK-P10-BE-NEXT:    addi r3, r3, GlobLd128@toc@l
-; CHECK-P10-BE-NEXT:    lxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT:    plxv vs0, 4(r3), 0
 ; CHECK-P10-BE-NEXT:    addis r3, r2, GlobSt128@toc@ha
 ; CHECK-P10-BE-NEXT:    addi r3, r3, GlobSt128@toc@l
-; CHECK-P10-BE-NEXT:    stxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT:    pstxv vs0, 4(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: testGlob128PtrPlus4:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    addis r3, r2, GlobLd128@toc@ha
 ; CHECK-PREP10-NEXT:    li r4, 4
 ; CHECK-PREP10-NEXT:    addi r3, r3, GlobLd128@toc@l
 ; CHECK-PREP10-NEXT:    lxvx vs0, r3, r4

llvm/test/CodeGen/PowerPC/int128_ldst.ll

entry:
   %1 = load i128, i128* %0, align 16
   ret i128 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i128 @ld_unalign16___int128___int128(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_unalign16___int128___int128:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    li r4, 1
-; CHECK-P10-NEXT:    ldx r5, r3, r4
-; CHECK-P10-NEXT:    li r4, 9
-; CHECK-P10-NEXT:    ldx r4, r3, r4
+; CHECK-P10-NEXT:    pld r5, 1(r3), 0
+; CHECK-P10-NEXT:    pld r4, 9(r3), 0
 ; CHECK-P10-NEXT:    mr r3, r5
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_unalign16___int128___int128:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    li r4, 1
 ; CHECK-P9-NEXT:    ldx r5, r3, r4
 ; CHECK-P9-NEXT:    li r4, 9
entry:
   ret i128 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i128 @ld_disjoint_unalign16___int128___int128(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_unalign16___int128___int128:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r4, r3, 0, 51
-; CHECK-P10-NEXT:    li r3, 6
-; CHECK-P10-NEXT:    li r5, 14
-; CHECK-P10-NEXT:    ldx r3, r4, r3
-; CHECK-P10-NEXT:    ldx r4, r4, r5
+; CHECK-P10-NEXT:    pld r3, 6(r4), 0
+; CHECK-P10-NEXT:    pld r4, 14(r4), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_unalign16___int128___int128:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    rldicr r4, r3, 0, 51
 ; CHECK-P9-NEXT:    li r3, 6
 ; CHECK-P9-NEXT:    li r5, 14
 ; CHECK-P9-NEXT:    ldx r3, r4, r3
entry:
   ret i128 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i128 @ld_disjoint_unalign32___int128___int128(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_unalign32___int128___int128:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r4, r3, 0, 43
-; CHECK-P10-NEXT:    pli r3, 99999
-; CHECK-P10-NEXT:    pli r5, 100007
-; CHECK-P10-NEXT:    ldx r3, r4, r3
-; CHECK-P10-NEXT:    ldx r4, r4, r5
+; CHECK-P10-NEXT:    pld r3, 99999(r4), 0
+; CHECK-P10-NEXT:    pld r4, 100007(r4), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_unalign32___int128___int128:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, 1
 ; CHECK-P9-NEXT:    rldicr r4, r3, 0, 43
 ; CHECK-P9-NEXT:    ori r3, r5, 34463
 ; CHECK-P9-NEXT:    ori r5, r5, 34471
entry:
   ret i128 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i128 @ld_disjoint_align32___int128___int128(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32___int128___int128:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
-; CHECK-P10-NEXT:    pli r5, 999990008
 ; CHECK-P10-NEXT:    and r4, r3, r4
-; CHECK-P10-NEXT:    pli r3, 999990000
-; CHECK-P10-NEXT:    ldx r3, r4, r3
-; CHECK-P10-NEXT:    ldx r4, r4, r5
+; CHECK-P10-NEXT:    pld r3, 999990000(r4), 0
+; CHECK-P10-NEXT:    pld r4, 999990008(r4), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_disjoint_align32___int128___int128:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, -15264
 ; CHECK-PREP10-NEXT:    lis r5, 15258
 ; CHECK-PREP10-NEXT:    and r4, r3, r4
 ; CHECK-PREP10-NEXT:    ori r3, r5, 41712
entry:
   store i128 %str, i128* %0, align 16
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_unalign16__int128___int128(i8* nocapture %ptr, i128 %str) {
 ; CHECK-P10-LABEL: st_unalign16__int128___int128:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    li r6, 9
-; CHECK-P10-NEXT:    stdx r5, r3, r6
-; CHECK-P10-NEXT:    li r5, 1
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r5, 9(r3), 0
+; CHECK-P10-NEXT:    pstd r4, 1(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_unalign16__int128___int128:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    li r6, 9
 ; CHECK-P9-NEXT:    stdx r5, r3, r6
 ; CHECK-P9-NEXT:    li r5, 1
 ; CHECK-P9-NEXT:    stdx r4, r3, r5
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_unalign16__int128___int128(i64 %ptr, i128 %str) {
 ; CHECK-P10-LABEL: st_disjoint_unalign16__int128___int128:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT:    li r6, 14
-; CHECK-P10-NEXT:    stdx r5, r3, r6
-; CHECK-P10-NEXT:    li r5, 6
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r5, 14(r3), 0
+; CHECK-P10-NEXT:    pstd r4, 6(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_unalign16__int128___int128:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    rldicr r3, r3, 0, 51
 ; CHECK-P9-NEXT:    li r6, 14
 ; CHECK-P9-NEXT:    stdx r5, r3, r6
 ; CHECK-P9-NEXT:    li r5, 6
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_unalign32__int128___int128(i64 %ptr, i128 %str) {
 ; CHECK-P10-LABEL: st_disjoint_unalign32__int128___int128:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT:    pli r6, 100007
-; CHECK-P10-NEXT:    stdx r5, r3, r6
-; CHECK-P10-NEXT:    pli r5, 99999
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r5, 100007(r3), 0
+; CHECK-P10-NEXT:    pstd r4, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_unalign32__int128___int128:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r6, 1
 ; CHECK-P9-NEXT:    rldicr r3, r3, 0, 43
 ; CHECK-P9-NEXT:    ori r7, r6, 34471
 ; CHECK-P9-NEXT:    stdx r5, r3, r7

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32__int128___int128(i64 %ptr, i128 %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32__int128___int128:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r6, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r6
-; CHECK-P10-NEXT:    pli r6, 999990008
-; CHECK-P10-NEXT:    stdx r5, r3, r6
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r5, 999990008(r3), 0
+; CHECK-P10-NEXT:    pstd r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32__int128___int128:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r6, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r6
 ; CHECK-P9-NEXT:    lis r6, 15258
 ; CHECK-P9-NEXT:    ori r7, r6, 41720

llvm/test/CodeGen/PowerPC/mma-acc-memops.ll

 ; LE-PAIRED-NEXT:    pstxv vs1, f@PCREL+51(0), 1
 ; LE-PAIRED-NEXT:    pstxv vs2, f@PCREL+35(0), 1
 ; LE-PAIRED-NEXT:    pstxv vs3, f@PCREL+19(0), 1
 ; LE-PAIRED-NEXT:    blr
 ;
 ; BE-PAIRED-LABEL: testUnalignedLdSt:
 ; BE-PAIRED:       # %bb.0: # %entry
 ; BE-PAIRED-NEXT:    addis r3, r2, f@toc@ha
-; BE-PAIRED-NEXT:    li r4, 11
 ; BE-PAIRED-NEXT:    addi r3, r3, f@toc@l
-; BE-PAIRED-NEXT:    lxvx vs0, r3, r4
-; BE-PAIRED-NEXT:    li r4, 27
-; BE-PAIRED-NEXT:    lxvx vs1, r3, r4
-; BE-PAIRED-NEXT:    li r4, 43
-; BE-PAIRED-NEXT:    lxvx vs2, r3, r4
-; BE-PAIRED-NEXT:    li r4, 59
-; BE-PAIRED-NEXT:    lxvx vs3, r3, r4
-; BE-PAIRED-NEXT:    li r4, 35
-; BE-PAIRED-NEXT:    stxvx vs1, r3, r4
-; BE-PAIRED-NEXT:    li r4, 19
-; BE-PAIRED-NEXT:    stxvx vs0, r3, r4
-; BE-PAIRED-NEXT:    li r4, 67
-; BE-PAIRED-NEXT:    stxvx vs3, r3, r4
-; BE-PAIRED-NEXT:    li r4, 51
-; BE-PAIRED-NEXT:    stxvx vs2, r3, r4
+; BE-PAIRED-NEXT:    plxv vs1, 27(r3), 0
+; BE-PAIRED-NEXT:    plxv vs0, 11(r3), 0
+; BE-PAIRED-NEXT:    plxv vs3, 59(r3), 0
+; BE-PAIRED-NEXT:    plxv vs2, 43(r3), 0
+; BE-PAIRED-NEXT:    pstxv vs1, 35(r3), 0
+; BE-PAIRED-NEXT:    pstxv vs0, 19(r3), 0
+; BE-PAIRED-NEXT:    pstxv vs3, 67(r3), 0
+; BE-PAIRED-NEXT:    pstxv vs2, 51(r3), 0
 ; BE-PAIRED-NEXT:    blr
 entry:
   %0 = bitcast <512 x i1>* @f to i8*
   %add.ptr = getelementptr inbounds i8, i8* %0, i64 11
   %add.ptr1 = getelementptr inbounds i8, i8* %0, i64 19
   %1 = bitcast i8* %add.ptr to <512 x i1>*
   %2 = bitcast i8* %add.ptr1 to <512 x i1>*
   %3 = load <512 x i1>, <512 x i1>* %1, align 64

 ; LE-PAIRED-NEXT:    plxv v2, g@PCREL+27(0), 1
 ; LE-PAIRED-NEXT:    pstxv v3, g@PCREL+19(0), 1
 ; LE-PAIRED-NEXT:    pstxv v2, g@PCREL+35(0), 1
 ; LE-PAIRED-NEXT:    blr
 ;
 ; BE-PAIRED-LABEL: testUnalignedLdStPair:
 ; BE-PAIRED:       # %bb.0: # %entry
 ; BE-PAIRED-NEXT:    addis r3, r2, g@toc@ha
-; BE-PAIRED-NEXT:    li r4, 11
 ; BE-PAIRED-NEXT:    addi r3, r3, g@toc@l
-; BE-PAIRED-NEXT:    lxvx v2, r3, r4
-; BE-PAIRED-NEXT:    li r4, 27
-; BE-PAIRED-NEXT:    lxvx v3, r3, r4
-; BE-PAIRED-NEXT:    li r4, 35
-; BE-PAIRED-NEXT:    stxvx v3, r3, r4
-; BE-PAIRED-NEXT:    li r4, 19
-; BE-PAIRED-NEXT:    stxvx v2, r3, r4
+; BE-PAIRED-NEXT:    plxv v3, 27(r3), 0
+; BE-PAIRED-NEXT:    plxv v2, 11(r3), 0
+; BE-PAIRED-NEXT:    pstxv v3, 35(r3), 0
+; BE-PAIRED-NEXT:    pstxv v2, 19(r3), 0
 ; BE-PAIRED-NEXT:    blr
 entry:
   %0 = bitcast <256 x i1>* @g to i8*
   %add.ptr = getelementptr inbounds i8, i8* %0, i64 11
   %add.ptr1 = getelementptr inbounds i8, i8* %0, i64 19
   %1 = bitcast i8* %add.ptr to <256 x i1>*
   %2 = bitcast i8* %add.ptr1 to <256 x i1>*
   %3 = load <256 x i1>, <256 x i1>* %1, align 64
   store <256 x i1> %3, <256 x i1>* %2, align 64
   ret void
 }

llvm/test/CodeGen/PowerPC/mma-intrinsics.ll

 ; Function Attrs: nofree nounwind
 define void @test_ldst_1(i8* nocapture readonly %vqp, <256 x i1>* %vpp, <16 x i8> %vc, i8* nocapture %resp)  {
 ; CHECK-LABEL: test_ldst_1:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    lxv vs1, 32(r3)
 ; CHECK-NEXT:    lxv vs0, 48(r3)
 ; CHECK-NEXT:    lxv vs3, 0(r3)
 ; CHECK-NEXT:    lxv vs2, 16(r3)
-; CHECK-NEXT:    li r3, 8
-; CHECK-NEXT:    lxvpx vsp36, r4, r3
+; CHECK-NEXT:    plxvp vsp36, 8(r4), 0
 ; CHECK-NEXT:    xxmtacc acc0
 ; CHECK-NEXT:    pmxvf64gernn acc0, vsp36, v2, 0, 0
 ; CHECK-NEXT:    xxmfacc acc0
 ; CHECK-NEXT:    stxv vs0, 48(r7)
 ; CHECK-NEXT:    stxv vs1, 32(r7)
 ; CHECK-NEXT:    stxv vs2, 16(r7)
 ; CHECK-NEXT:    stxv vs3, 0(r7)
 ; CHECK-NEXT:    blr
 ;
 ; CHECK-BE-LABEL: test_ldst_1:
 ; CHECK-BE:       # %bb.0: # %entry
 ; CHECK-BE-NEXT:    lxv vs1, 16(r3)
 ; CHECK-BE-NEXT:    lxv vs0, 0(r3)
 ; CHECK-BE-NEXT:    lxv vs3, 48(r3)
 ; CHECK-BE-NEXT:    lxv vs2, 32(r3)
-; CHECK-BE-NEXT:    li r3, 8
-; CHECK-BE-NEXT:    lxvpx vsp36, r4, r3
+; CHECK-BE-NEXT:    plxvp vsp36, 8(r4), 0
 ; CHECK-BE-NEXT:    xxmtacc acc0
 ; CHECK-BE-NEXT:    pmxvf64gernn acc0, vsp36, v2, 0, 0
 ; CHECK-BE-NEXT:    xxmfacc acc0
 ; CHECK-BE-NEXT:    stxv vs1, 16(r7)
 ; CHECK-BE-NEXT:    stxv vs0, 0(r7)
 ; CHECK-BE-NEXT:    stxv vs3, 48(r7)
 ; CHECK-BE-NEXT:    stxv vs2, 32(r7)
 ; CHECK-BE-NEXT:    blr

llvm/test/CodeGen/PowerPC/p10-fi-elim.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
+; RUN:   FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
+; RUN:   FileCheck %s --check-prefix=CHECK-BE
+
+%96 = type <{ i32 }>
+%97 = type <{ i32 }>
+%98 = type <{ i32 }>
+%100 = type <{ i8, i8, i8, i8, i32, i64, i64, [1 x i64], [1 x i64], [1 x i64] }>
+%101 = type <{ i8, i8, i8, i8, i32, i64, i64, [1 x i64], [1 x i64], [1 x i64], [24 x i8] }>
+%102 = type <{ i8, i8, i8, i8, i32, i64, i64, [1 x i64], [1 x i64], [1 x i64] }>
+%103 = type <{ [152 x i8]*, i8, i8, i8, i8, [4 x i8], i32, [12 x i8], i32, [4 x i8] }>
+%104 = type <{ i32 }>
+%105 = type <{ i32 }>
+%106 = type <{ i32 }>
+
+; Function Attrs: nobuiltin norecurse
+define dso_local signext i32 @test_FI_elim([40 x i8]* noalias nocapture dereferenceable(40) %arg, [0 x %96]* noalias nocapture nonnull readonly %arg2, [0 x %97]* noalias nocapture nonnull readonly %arg3, [0 x %98]* noalias nocapture nonnull readonly %arg4, %100* noalias nocapture dereferenceable(48) %arg6, %101* noalias nocapture dereferenceable(72) %arg7) local_unnamed_addr #2 {
+; CHECK-LABEL: test_FI_elim:
+; CHECK:       # %bb.0: # %bb
+; CHECK-NEXT:    mflr r0
+; CHECK-NEXT:    std r0, 16(r1)
+; CHECK-NEXT:    stdu r1, -80(r1)
+; CHECK-NEXT:    .cfi_def_cfa_offset 80
+; CHECK-NEXT:    .cfi_offset lr, 16
+; CHECK-NEXT:    mr r9, r6
+; CHECK-NEXT:    mr r6, r5
+; CHECK-NEXT:    li r5, 3
+; CHECK-NEXT:    li r10, -127
+; CHECK-NEXT:    lxv v2, 0(r3)
+; CHECK-NEXT:    stb r5, 0(0)
+; CHECK-NEXT:    stb r10, 0(r3)
+; CHECK-NEXT:    stb r5, 0(r3)
+; CHECK-NEXT:    lbz r5, 2(r7)
+; CHECK-NEXT:    li r2, 1
+; CHECK-NEXT:    stb r10, 0(r3)
+; CHECK-NEXT:    pstxv v2, 64(r1), 0
+; CHECK-NEXT:    vaddudm v3, v2, v2
+; CHECK-NEXT:    mfvsrd r11, v2
+; CHECK-NEXT:    li r0, 4
+; CHECK-NEXT:    stw r2, 0(r3)
+; CHECK-NEXT:    mr r7, r9
+; CHECK-NEXT:    std r0, 0(r3)
+; CHECK-NEXT:    rlwinm r5, r5, 0, 27, 27
+; CHECK-NEXT:    mfvsrd r12, v3
+; CHECK-NEXT:    neg r11, r11
+; CHECK-NEXT:    stb r5, 0(0)
+; CHECK-NEXT:    lbz r5, 2(r8)
+; CHECK-NEXT:    neg r12, r12
+; CHECK-NEXT:    std r11, 0(r3)
+; CHECK-NEXT:    std r2, 0(r3)
+; CHECK-NEXT:    std r0, 0(r3)
+; CHECK-NEXT:    std r12, 0(r3)
+; CHECK-NEXT:    rlwinm r5, r5, 0, 27, 27
+; CHECK-NEXT:    stb r5, 0(r3)
+; CHECK-NEXT:    li r5, 2
+; CHECK-NEXT:    stw r5, 0(r3)
+; CHECK-NEXT:    mr r5, r4
+; CHECK-NEXT:    bl foo@notoc
+; CHECK-NEXT:    extsw r3, r3
+; CHECK-NEXT:    addi r1, r1, 80
+; CHECK-NEXT:    ld r0, 16(r1)
+; CHECK-NEXT:    mtlr r0
+; CHECK-NEXT:    blr
+;
+; CHECK-BE-LABEL: test_FI_elim:
+; CHECK-BE:       # %bb.0: # %bb
+; CHECK-BE-NEXT:    mflr r0
+; CHECK-BE-NEXT:    std r0, 16(r1)
+; CHECK-BE-NEXT:    stdu r1, -176(r1)
+; CHECK-BE-NEXT:    .cfi_def_cfa_offset 176
+; CHECK-BE-NEXT:    .cfi_offset lr, 16
+; CHECK-BE-NEXT:    .cfi_offset r30, -16
+; CHECK-BE-NEXT:    mr r9, r6
+; CHECK-BE-NEXT:    mr r6, r5
+; CHECK-BE-NEXT:    li r5, 3
+; CHECK-BE-NEXT:    li r11, -127
+; CHECK-BE-NEXT:    lxv v2, 0(r3)
+; CHECK-BE-NEXT:    std r30, 160(r1) # 8-byte Folded Spill
+; CHECK-BE-NEXT:    pstxv v2, 144(r1), 0
+; CHECK-BE-NEXT:    stb r5, 0(0)
+; CHECK-BE-NEXT:    stb r11, 0(r3)
+; CHECK-BE-NEXT:    stb r5, 0(r3)
+; CHECK-BE-NEXT:    lbz r5, 2(r7)
+; CHECK-BE-NEXT:    vaddudm v3, v2, v2
+; CHECK-BE-NEXT:    mfvsrld r10, v2
+; CHECK-BE-NEXT:    li r30, 1
+; CHECK-BE-NEXT:    stb r11, 0(r3)
+; CHECK-BE-NEXT:    li r0, 4
+; CHECK-BE-NEXT:    stw r30, 0(r3)
+; CHECK-BE-NEXT:    mr r7, r9
+; CHECK-BE-NEXT:    std r0, 0(r3)
+; CHECK-BE-NEXT:    rlwinm r5, r5, 0, 27, 27
+; CHECK-BE-NEXT:    mfvsrld r12, v3
+; CHECK-BE-NEXT:    stb r5, 0(0)
+; CHECK-BE-NEXT:    lbz r5, 2(r8)
+; CHECK-BE-NEXT:    neg r10, r10
+; CHECK-BE-NEXT:    neg r12, r12
+; CHECK-BE-NEXT:    std r10, 0(r3)
+; CHECK-BE-NEXT:    std r30, 0(r3)
+; CHECK-BE-NEXT:    std r0, 0(r3)
+; CHECK-BE-NEXT:    rlwinm r5, r5, 0, 27, 27
+; CHECK-BE-NEXT:    std r12, 0(r3)
+; CHECK-BE-NEXT:    stb r5, 0(r3)
+; CHECK-BE-NEXT:    li r5, 2
+; CHECK-BE-NEXT:    stw r5, 0(r3)
+; CHECK-BE-NEXT:    mr r5, r4
+; CHECK-BE-NEXT:    bl foo
+; CHECK-BE-NEXT:    nop
+; CHECK-BE-NEXT:    ld r30, 160(r1) # 8-byte Folded Reload
+; CHECK-BE-NEXT:    extsw r3, r3
+; CHECK-BE-NEXT:    addi r1, r1, 176
+; CHECK-BE-NEXT:    ld r0, 16(r1)
+; CHECK-BE-NEXT:    mtlr r0
+; CHECK-BE-NEXT:    blr
+bb:
+  %i = alloca %102, align 8
+  %i8 = load <2 x i64>, <2 x i64>* undef, align 8
+  %i9 = extractelement <2 x i64> %i8, i32 1
+  %i10 = sub i64 0, %i9
+  %i11 = load <2 x i64>, <2 x i64>* undef, align 8
+  %i12 = load <2 x i64>, <2 x i64>* undef, align 8
+  %i13 = add nsw <2 x i64> %i11, %i12
+  %i14 = extractelement <2 x i64> %i13, i32 1
+  %i15 = sub i64 0, %i14
+  store i8 3, i8* null, align 8
+  store i8 -127, i8* undef, align 1
+  store i64 4, i64* undef, align 8
+  store i32 1, i32* undef, align 4
+  %i16 = getelementptr inbounds %102, %102* %i, i64 0, i32 8, i64 0
+  %i17 = bitcast i64* %i16 to <2 x i64>*
+  store <2 x i64> %i8, <2 x i64>* %i17, align 8
+  store i64 %i10, i64* undef, align 8
+  store i8 3, i8* undef, align 8
+  %i18 = getelementptr inbounds %100, %100* %arg6, i64 0, i32 2
+  %i19 = load i8, i8* %i18, align 1
+  %i20 = and i8 %i19, 16
+  store i8 %i20, i8* null, align 2
+  store i8 -127, i8* undef, align 1
+  store i64 1, i64* undef, align 8
+  %i21 = getelementptr inbounds %101, %101* %arg7, i64 0, i32 2
+  %i22 = load i8, i8* %i21, align 1
+  %i23 = and i8 %i22, 16
+  store i8 %i23, i8* undef, align 2
+  store i64 4, i64* undef, align 8
+  store i32 2, i32* undef, align 4
+  store i64 %i15, i64* undef, align 8
+  %i24 = bitcast [40 x i8]* %arg to %103*
+  %i25 = bitcast [0 x %96]* %arg2 to [0 x %104]*
+  %i26 = bitcast [0 x %97]* %arg3 to [0 x %105]*
+  %i27 = bitcast [0 x %98]* %arg4 to [0 x %106]*
+  %i28 = call i32 @foo(%103* nonnull %i24, i32* nonnull undef, [0 x %104]* %i25, [0 x %105]* %i26, [0 x %106]* %i27)
+  ret i32 %i28
+}
+
+declare dso_local i32 @foo(%103*, i32*, [0 x %104]*, [0 x %105]*, [0 x %106]*) local_unnamed_addr #1

llvm/test/CodeGen/PowerPC/paired-vector-intrinsics.ll

entry:
   %4 = getelementptr i8, i8* %3, i64 %offset
   tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %2, i8* %4)
   ret void
 }
 
 define void @test_ldst_3(<256 x i1>* %vpp, <256 x i1>* %vp2)  {
 ; CHECK-LABEL: test_ldst_3:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    li r5, 18
-; CHECK-NEXT:    lxvpx vsp34, r3, r5
-; CHECK-NEXT:    stxvpx vsp34, r4, r5
+; CHECK-NEXT:    plxvp vsp34, 18(r3), 0
+; CHECK-NEXT:    pstxvp vsp34, 18(r4), 0
 ; CHECK-NEXT:    blr
 ;
 ; CHECK-NOMMA-LABEL: test_ldst_3:
 ; CHECK-NOMMA:       # %bb.0: # %entry
-; CHECK-NOMMA-NEXT:    li r5, 18
-; CHECK-NOMMA-NEXT:    lxvpx vsp34, r3, r5
-; CHECK-NOMMA-NEXT:    stxvpx vsp34, r4, r5
+; CHECK-NOMMA-NEXT:    plxvp vsp34, 18(r3), 0
+; CHECK-NOMMA-NEXT:    pstxvp vsp34, 18(r4), 0
 ; CHECK-NOMMA-NEXT:    blr
 ;
 ; CHECK-BE-LABEL: test_ldst_3:
 ; CHECK-BE:       # %bb.0: # %entry
-; CHECK-BE-NEXT:    li r5, 18
-; CHECK-BE-NEXT:    lxvpx vsp34, r3, r5
-; CHECK-BE-NEXT:    stxvpx vsp34, r4, r5
+; CHECK-BE-NEXT:    plxvp vsp34, 18(r3), 0
+; CHECK-BE-NEXT:    pstxvp vsp34, 18(r4), 0
 ; CHECK-BE-NEXT:    blr
 ;
 ; CHECK-BE-NOMMA-LABEL: test_ldst_3:
 ; CHECK-BE-NOMMA:       # %bb.0: # %entry
-; CHECK-BE-NOMMA-NEXT:    li r5, 18
-; CHECK-BE-NOMMA-NEXT:    lxvpx vsp34, r3, r5
-; CHECK-BE-NOMMA-NEXT:    stxvpx vsp34, r4, r5
+; CHECK-BE-NOMMA-NEXT:    plxvp vsp34, 18(r3), 0
+; CHECK-BE-NOMMA-NEXT:    pstxvp vsp34, 18(r4), 0
 ; CHECK-BE-NOMMA-NEXT:    blr
 entry:
   %0 = bitcast <256 x i1>* %vpp to i8*
   %1 = getelementptr i8, i8* %0, i64 18
   %2 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(i8* %1)
   %3 = bitcast <256 x i1>* %vp2 to i8*
   %4 = getelementptr i8, i8* %3, i64 18
   tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %2, i8* %4)
   ret void
 }
 
 define void @test_ldst_4(<256 x i1>* %vpp, <256 x i1>* %vp2)  {
 ; CHECK-LABEL: test_ldst_4:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    li r5, 1
-; CHECK-NEXT:    lxvpx vsp34, r3, r5
-; CHECK-NEXT:    stxvpx vsp34, r4, r5
+; CHECK-NEXT:    plxvp vsp34, 1(r3), 0
+; CHECK-NEXT:    pstxvp vsp34, 1(r4), 0
 ; CHECK-NEXT:    blr
 ;
 ; CHECK-NOMMA-LABEL: test_ldst_4:
 ; CHECK-NOMMA:       # %bb.0: # %entry
-; CHECK-NOMMA-NEXT:    li r5, 1
-; CHECK-NOMMA-NEXT:    lxvpx vsp34, r3, r5
-; CHECK-NOMMA-NEXT:    stxvpx vsp34, r4, r5
+; CHECK-NOMMA-NEXT:    plxvp vsp34, 1(r3), 0
+; CHECK-NOMMA-NEXT:    pstxvp vsp34, 1(r4), 0
 ; CHECK-NOMMA-NEXT:    blr
 ;
 ; CHECK-BE-LABEL: test_ldst_4:
 ; CHECK-BE:       # %bb.0: # %entry
-; CHECK-BE-NEXT:    li r5, 1
-; CHECK-BE-NEXT:    lxvpx vsp34, r3, r5
-; CHECK-BE-NEXT:    stxvpx vsp34, r4, r5
+; CHECK-BE-NEXT:    plxvp vsp34, 1(r3), 0
+; CHECK-BE-NEXT:    pstxvp vsp34, 1(r4), 0
 ; CHECK-BE-NEXT:    blr
 ;
 ; CHECK-BE-NOMMA-LABEL: test_ldst_4:
 ; CHECK-BE-NOMMA:       # %bb.0: # %entry
-; CHECK-BE-NOMMA-NEXT:    li r5, 1
-; CHECK-BE-NOMMA-NEXT:    lxvpx vsp34, r3, r5
-; CHECK-BE-NOMMA-NEXT:    stxvpx vsp34, r4, r5
+; CHECK-BE-NOMMA-NEXT:    plxvp vsp34, 1(r3), 0
+; CHECK-BE-NOMMA-NEXT:    pstxvp vsp34, 1(r4), 0
 ; CHECK-BE-NOMMA-NEXT:    blr
 entry:
   %0 = bitcast <256 x i1>* %vpp to i8*
   %1 = getelementptr i8, i8* %0, i64 1
   %2 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(i8* %1)
   %3 = bitcast <256 x i1>* %vp2 to i8*
   %4 = getelementptr i8, i8* %3, i64 1
   tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %2, i8* %4)
   ret void
 }
 
 define void @test_ldst_5(<256 x i1>* %vpp, <256 x i1>* %vp2)  {
 ; CHECK-LABEL: test_ldst_5:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    li r5, 42
-; CHECK-NEXT:    lxvpx vsp34, r3, r5
-; CHECK-NEXT:    stxvpx vsp34, r4, r5
+; CHECK-NEXT:    plxvp vsp34, 42(r3), 0
+; CHECK-NEXT:    pstxvp vsp34, 42(r4), 0
 ; CHECK-NEXT:    blr
 ;
 ; CHECK-NOMMA-LABEL: test_ldst_5:
 ; CHECK-NOMMA:       # %bb.0: # %entry
-; CHECK-NOMMA-NEXT:    li r5, 42
-; CHECK-NOMMA-NEXT:    lxvpx vsp34, r3, r5
-; CHECK-NOMMA-NEXT:    stxvpx vsp34, r4, r5
+; CHECK-NOMMA-NEXT:    plxvp vsp34, 42(r3), 0
+; CHECK-NOMMA-NEXT:    pstxvp vsp34, 42(r4), 0
 ; CHECK-NOMMA-NEXT:    blr
 ;
 ; CHECK-BE-LABEL: test_ldst_5:
 ; CHECK-BE:       # %bb.0: # %entry
-; CHECK-BE-NEXT:    li r5, 42
-; CHECK-BE-NEXT:    lxvpx vsp34, r3, r5
-; CHECK-BE-NEXT:    stxvpx vsp34, r4, r5
+; CHECK-BE-NEXT:    plxvp vsp34, 42(r3), 0
+; CHECK-BE-NEXT:    pstxvp vsp34, 42(r4), 0
 ; CHECK-BE-NEXT:    blr
 ;
 ; CHECK-BE-NOMMA-LABEL: test_ldst_5:
 ; CHECK-BE-NOMMA:       # %bb.0: # %entry
-; CHECK-BE-NOMMA-NEXT:    li r5, 42
-; CHECK-BE-NOMMA-NEXT:    lxvpx vsp34, r3, r5
-; CHECK-BE-NOMMA-NEXT:    stxvpx vsp34, r4, r5
+; CHECK-BE-NOMMA-NEXT:    plxvp vsp34, 42(r3), 0
+; CHECK-BE-NOMMA-NEXT:    pstxvp vsp34, 42(r4), 0
 ; CHECK-BE-NOMMA-NEXT:    blr
 entry:
   %0 = bitcast <256 x i1>* %vpp to i8*
   %1 = getelementptr i8, i8* %0, i64 42
   %2 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(i8* %1)
   %3 = bitcast <256 x i1>* %vp2 to i8*
   %4 = getelementptr i8, i8* %3, i64 42
   tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %2, i8* %4)
entry:
   ret void
 }
 
 define void @test_ldst_7(<256 x i1>* %vpp, <256 x i1>* %vp2)  {
 ; FIXME: A prefixed load (plxvp) is expected here as the offset in this
 ; test case is a constant that fits within 34-bits.
 ; CHECK-LABEL: test_ldst_7:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pli r5, 32799
-; CHECK-NEXT:    lxvpx vsp34, r3, r5
-; CHECK-NEXT:    stxvpx vsp34, r4, r5
+; CHECK-NEXT:    plxvp vsp34, 32799(r3), 0
+; CHECK-NEXT:    pstxvp vsp34, 32799(r4), 0
 ; CHECK-NEXT:    blr
 ;
 ; CHECK-NOMMA-LABEL: test_ldst_7:
 ; CHECK-NOMMA:       # %bb.0: # %entry
-; CHECK-NOMMA-NEXT:    pli r5, 32799
-; CHECK-NOMMA-NEXT:    lxvpx vsp34, r3, r5
-; CHECK-NOMMA-NEXT:    stxvpx vsp34, r4, r5
+; CHECK-NOMMA-NEXT:    plxvp vsp34, 32799(r3), 0
+; CHECK-NOMMA-NEXT:    pstxvp vsp34, 32799(r4), 0
 ; CHECK-NOMMA-NEXT:    blr
 ;
 ; CHECK-BE-LABEL: test_ldst_7:
 ; CHECK-BE:       # %bb.0: # %entry
-; CHECK-BE-NEXT:    pli r5, 32799
-; CHECK-BE-NEXT:    lxvpx vsp34, r3, r5
-; CHECK-BE-NEXT:    stxvpx vsp34, r4, r5
+; CHECK-BE-NEXT:    plxvp vsp34, 32799(r3), 0
+; CHECK-BE-NEXT:    pstxvp vsp34, 32799(r4), 0
 ; CHECK-BE-NEXT:    blr
 ;
 ; CHECK-BE-NOMMA-LABEL: test_ldst_7:
 ; CHECK-BE-NOMMA:       # %bb.0: # %entry
-; CHECK-BE-NOMMA-NEXT:    pli r5, 32799
-; CHECK-BE-NOMMA-NEXT:    lxvpx vsp34, r3, r5
-; CHECK-BE-NOMMA-NEXT:    stxvpx vsp34, r4, r5
+; CHECK-BE-NOMMA-NEXT:    plxvp vsp34, 32799(r3), 0
+; CHECK-BE-NOMMA-NEXT:    pstxvp vsp34, 32799(r4), 0
 ; CHECK-BE-NOMMA-NEXT:    blr
 entry:
   %0 = bitcast <256 x i1>* %vpp to i8*
   %1 = getelementptr i8, i8* %0, i64 32799
   %2 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(i8* %1)
   %3 = bitcast <256 x i1>* %vp2 to i8*
   %4 = getelementptr i8, i8* %3, i64 32799
   tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %2, i8* %4)
   ret void
 }

llvm/test/CodeGen/PowerPC/pcrel_ldst.ll

 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    pld r3, GlobLd7@PCREL+3(0), 1
 ; CHECK-P10-LE-NEXT:    pstd r3, GlobSt7@PCREL+3(0), 1
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: testGlob7PtrPlus3:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    addis r3, r2, GlobLd7@toc@ha
-; CHECK-P10-BE-NEXT:    li r4, 3
-; CHECK-P10-BE-NEXT:    addis r5, r2, GlobSt7@toc@ha
+; CHECK-P10-BE-NEXT:    addis r4, r2, GlobSt7@toc@ha
 ; CHECK-P10-BE-NEXT:    addi r3, r3, GlobLd7@toc@l
-; CHECK-P10-BE-NEXT:    addi r5, r5, GlobSt7@toc@l
-; CHECK-P10-BE-NEXT:    ldx r3, r3, r4
-; CHECK-P10-BE-NEXT:    stdx r3, r5, r4
+; CHECK-P10-BE-NEXT:    addi r4, r4, GlobSt7@toc@l
+; CHECK-P10-BE-NEXT:    pld r3, 3(r3), 0
+; CHECK-P10-BE-NEXT:    pstd r3, 3(r4), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-LABEL: testGlob7PtrPlus3:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    addis r3, r2, GlobLd7@toc@ha
 ; CHECK-NEXT:    li r4, 3
 ; CHECK-NEXT:    addis r5, r2, GlobSt7@toc@ha
 ; CHECK-NEXT:    addi r3, r3, GlobLd7@toc@l

 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    pld r3, GlobLd8@PCREL+3(0), 1
 ; CHECK-P10-LE-NEXT:    pstd r3, GlobSt8@PCREL+3(0), 1
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: testGlob8PtrPlus3:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    addis r3, r2, GlobLd8@toc@ha
-; CHECK-P10-BE-NEXT:    li r4, 3
-; CHECK-P10-BE-NEXT:    addis r5, r2, GlobSt8@toc@ha
+; CHECK-P10-BE-NEXT:    addis r4, r2, GlobSt8@toc@ha
 ; CHECK-P10-BE-NEXT:    addi r3, r3, GlobLd8@toc@l
-; CHECK-P10-BE-NEXT:    addi r5, r5, GlobSt8@toc@l
-; CHECK-P10-BE-NEXT:    ldx r3, r3, r4
-; CHECK-P10-BE-NEXT:    stdx r3, r5, r4
+; CHECK-P10-BE-NEXT:    addi r4, r4, GlobSt8@toc@l
+; CHECK-P10-BE-NEXT:    pld r3, 3(r3), 0
+; CHECK-P10-BE-NEXT:    pstd r3, 3(r4), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-LABEL: testGlob8PtrPlus3:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    addis r3, r2, GlobLd8@toc@ha
 ; CHECK-NEXT:    li r4, 3
 ; CHECK-NEXT:    addis r5, r2, GlobSt8@toc@ha
 ; CHECK-NEXT:    addi r3, r3, GlobLd8@toc@l

 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    pld r3, GlobLd10@PCREL+3(0), 1
 ; CHECK-P10-LE-NEXT:    pstd r3, GlobSt10@PCREL+3(0), 1
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: testGlob10PtrPlus3:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    addis r3, r2, GlobLd10@toc@ha
-; CHECK-P10-BE-NEXT:    li r4, 3
-; CHECK-P10-BE-NEXT:    addis r5, r2, GlobSt10@toc@ha
+; CHECK-P10-BE-NEXT:    addis r4, r2, GlobSt10@toc@ha
 ; CHECK-P10-BE-NEXT:    addi r3, r3, GlobLd10@toc@l
-; CHECK-P10-BE-NEXT:    addi r5, r5, GlobSt10@toc@l
-; CHECK-P10-BE-NEXT:    ldx r3, r3, r4
-; CHECK-P10-BE-NEXT:    stdx r3, r5, r4
+; CHECK-P10-BE-NEXT:    addi r4, r4, GlobSt10@toc@l
+; CHECK-P10-BE-NEXT:    pld r3, 3(r3), 0
+; CHECK-P10-BE-NEXT:    pstd r3, 3(r4), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-LABEL: testGlob10PtrPlus3:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    addis r3, r2, GlobLd10@toc@ha
 ; CHECK-NEXT:    li r4, 3
 ; CHECK-NEXT:    addis r5, r2, GlobSt10@toc@ha
 ; CHECK-NEXT:    addi r3, r3, GlobLd10@toc@l

 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    plxv vs0, GlobLd11@PCREL+3(0), 1
 ; CHECK-P10-LE-NEXT:    pstxv vs0, GlobSt11@PCREL+3(0), 1
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: testGlob11PtrPlus3:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    addis r3, r2, GlobLd11@toc@ha
-; CHECK-P10-BE-NEXT:    li r4, 3
 ; CHECK-P10-BE-NEXT:    addi r3, r3, GlobLd11@toc@l
-; CHECK-P10-BE-NEXT:    lxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT:    plxv vs0, 3(r3), 0
 ; CHECK-P10-BE-NEXT:    addis r3, r2, GlobSt11@toc@ha
 ; CHECK-P10-BE-NEXT:    addi r3, r3, GlobSt11@toc@l
-; CHECK-P10-BE-NEXT:    stxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT:    pstxv vs0, 3(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: testGlob11PtrPlus3:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    addis r3, r2, GlobLd11@toc@ha
 ; CHECK-P9-NEXT:    li r4, 3
 ; CHECK-P9-NEXT:    addi r3, r3, GlobLd11@toc@l
 ; CHECK-P9-NEXT:    lxvx vs0, r3, r4

 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    plxv vs0, GlobLd11@PCREL+4(0), 1
 ; CHECK-P10-LE-NEXT:    pstxv vs0, GlobSt11@PCREL+4(0), 1
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: testGlob11PtrPlus4:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    addis r3, r2, GlobLd11@toc@ha
-; CHECK-P10-BE-NEXT:    li r4, 4
 ; CHECK-P10-BE-NEXT:    addi r3, r3, GlobLd11@toc@l
-; CHECK-P10-BE-NEXT:    lxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT:    plxv vs0, 4(r3), 0
 ; CHECK-P10-BE-NEXT:    addis r3, r2, GlobSt11@toc@ha
 ; CHECK-P10-BE-NEXT:    addi r3, r3, GlobSt11@toc@l
-; CHECK-P10-BE-NEXT:    stxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT:    pstxv vs0, 4(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: testGlob11PtrPlus4:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    addis r3, r2, GlobLd11@toc@ha
 ; CHECK-P9-NEXT:    li r4, 4
 ; CHECK-P9-NEXT:    addi r3, r3, GlobLd11@toc@l
 ; CHECK-P9-NEXT:    lxvx vs0, r3, r4

 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    plxv vs0, GlobLd12@PCREL+3(0), 1
 ; CHECK-P10-LE-NEXT:    pstxv vs0, GlobSt12@PCREL+3(0), 1
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: testGlob12PtrPlus3:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    addis r3, r2, GlobLd12@toc@ha
-; CHECK-P10-BE-NEXT:    li r4, 3
 ; CHECK-P10-BE-NEXT:    addi r3, r3, GlobLd12@toc@l
-; CHECK-P10-BE-NEXT:    lxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT:    plxv vs0, 3(r3), 0
 ; CHECK-P10-BE-NEXT:    addis r3, r2, GlobSt12@toc@ha
 ; CHECK-P10-BE-NEXT:    addi r3, r3, GlobSt12@toc@l
-; CHECK-P10-BE-NEXT:    stxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT:    pstxv vs0, 3(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: testGlob12PtrPlus3:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    addis r3, r2, GlobLd12@toc@ha
 ; CHECK-P9-NEXT:    li r4, 3
 ; CHECK-P9-NEXT:    addi r3, r3, GlobLd12@toc@l
 ; CHECK-P9-NEXT:    lxvx vs0, r3, r4

 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    plxv vs0, GlobLd12@PCREL+4(0), 1
 ; CHECK-P10-LE-NEXT:    pstxv vs0, GlobSt12@PCREL+4(0), 1
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: testGlob12PtrPlus4:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    addis r3, r2, GlobLd12@toc@ha
-; CHECK-P10-BE-NEXT:    li r4, 4
 ; CHECK-P10-BE-NEXT:    addi r3, r3, GlobLd12@toc@l
-; CHECK-P10-BE-NEXT:    lxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT:    plxv vs0, 4(r3), 0
 ; CHECK-P10-BE-NEXT:    addis r3, r2, GlobSt12@toc@ha
 ; CHECK-P10-BE-NEXT:    addi r3, r3, GlobSt12@toc@l
-; CHECK-P10-BE-NEXT:    stxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT:    pstxv vs0, 4(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: testGlob12PtrPlus4:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    addis r3, r2, GlobLd12@toc@ha
 ; CHECK-P9-NEXT:    li r4, 4
 ; CHECK-P9-NEXT:    addi r3, r3, GlobLd12@toc@l
 ; CHECK-P9-NEXT:    lxvx vs0, r3, r4

llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll

entry:
   %conv = uitofp i64 %1 to double
   ret double %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local double @ld_align32_double_uint64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_double_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvuxddp f1, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_double_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lfdx f0, r3, r4

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local double @ld_disjoint_align32_double_uint64_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_double_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvuxddp f1, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_double_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = sitofp i64 %1 to double
   ret double %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local double @ld_align32_double_int64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_double_int64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvsxddp f1, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_double_int64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lfdx f0, r3, r4

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local double @ld_disjoint_align32_double_int64_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_double_int64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvsxddp f1, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_double_int64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = fpext float %1 to double
   ret double %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local double @ld_align32_double_float(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_double_float:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfsx f1, r3, r4
+; CHECK-P10-NEXT:    plfs f1, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_double_float:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lfsx f1, r3, r4
 ; CHECK-PREP10-NEXT:    blr
 entry:

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local double @ld_disjoint_align32_double_float(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_double_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfsx f1, r3, r4
+; CHECK-P10-NEXT:    plfs f1, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_double_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
 ; CHECK-P9-NEXT:    lfsx f1, r3, r4
 ; CHECK-P9-NEXT:    blr
entry:
   %1 = load double, double* %0, align 8
   ret double %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local double @ld_align32_double_double(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_double_double:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfdx f1, r3, r4
+; CHECK-P10-NEXT:    plfd f1, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_double_double:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lfdx f1, r3, r4
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local double @ld_disjoint_align32_double_double(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_double_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfdx f1, r3, r4
+; CHECK-P10-NEXT:    plfd f1, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_double_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
entry:
   store i64 %conv, i64* %0, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_double_uint64_t(i8* nocapture %ptr, double %str) {
 ; CHECK-P10-LABEL: st_align32_double_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    xscvdpuxds f0, f1
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    stxsdx f0, r3, r4
+; CHECK-P10-NEXT:    xscvdpuxds v2, f1
+; CHECK-P10-NEXT:    pstxsd v2, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_double_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    xscvdpuxds f0, f1
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    stxsdx f0, r3, r4
entry:
   store i64 %conv, i64* %0, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_double_uint64_t(i64 %ptr, double %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_double_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    xscvdpuxds f0, f1
+; CHECK-P10-NEXT:    xscvdpuxds v2, f1
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    stxsdx f0, r3, r4
+; CHECK-P10-NEXT:    pstxsd v2, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_double_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    xscvdpuxds f0, f1
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   store i64 %conv, i64* %0, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_double_int64_t(i8* nocapture %ptr, double %str) {
 ; CHECK-P10-LABEL: st_align32_double_int64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    xscvdpsxds f0, f1
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    stxsdx f0, r3, r4
+; CHECK-P10-NEXT:    xscvdpsxds v2, f1
+; CHECK-P10-NEXT:    pstxsd v2, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_double_int64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    xscvdpsxds f0, f1
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    stxsdx f0, r3, r4
entry:
   store i64 %conv, i64* %0, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_double_int64_t(i64 %ptr, double %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_double_int64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    xscvdpsxds f0, f1
+; CHECK-P10-NEXT:    xscvdpsxds v2, f1
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    stxsdx f0, r3, r4
+; CHECK-P10-NEXT:    pstxsd v2, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_double_int64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    xscvdpsxds f0, f1
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_double_float(i8* nocapture %ptr, double %str) {
 ; CHECK-P10-LABEL: st_align32_double_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    xsrsp f0, f1
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    stfsx f0, r3, r4
+; CHECK-P10-NEXT:    pstfs f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_double_float:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    xsrsp f0, f1
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    stfsx f0, r3, r4

 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_double_float(i64 %ptr, double %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_double_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    xsrsp f0, f1
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    stfsx f0, r3, r4
+; CHECK-P10-NEXT:    pstfs f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_double_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    xsrsp f0, f1
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   store double %str, double* %0, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_double_double(i8* nocapture %ptr, double %str) {
 ; CHECK-P10-LABEL: st_align32_double_double:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    stfdx f1, r3, r4
+; CHECK-P10-NEXT:    pstfd f1, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_double_double:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    stfdx f1, r3, r4
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_double_double(i64 %ptr, double %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_double_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    stfdx f1, r3, r4
+; CHECK-P10-NEXT:    pstfd f1, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_double_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712

llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll

entry:
   %conv = uitofp i64 %1 to float
   ret float %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local float @ld_align32_float_uint64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_float_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvuxdsp f1, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_float_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lfdx f0, r3, r4

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local float @ld_disjoint_align32_float_uint64_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_float_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvuxdsp f1, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_float_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = sitofp i64 %1 to float
   ret float %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local float @ld_align32_float_int64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_float_int64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvsxdsp f1, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_float_int64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lfdx f0, r3, r4

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local float @ld_disjoint_align32_float_int64_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_float_int64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvsxdsp f1, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_float_int64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %1 = load float, float* %0, align 4
   ret float %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local float @ld_align32_float_float(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_float_float:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfsx f1, r3, r4
+; CHECK-P10-NEXT:    plfs f1, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_float_float:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lfsx f1, r3, r4
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local float @ld_disjoint_align32_float_float(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_float_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfsx f1, r3, r4
+; CHECK-P10-NEXT:    plfs f1, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_float_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
entry:
   %conv = fptrunc double %1 to float
   ret float %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local float @ld_align32_float_double(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_float_double:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xsrsp f1, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_float_double:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lfdx f0, r3, r4

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local float @ld_disjoint_align32_float_double(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_float_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xsrsp f1, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_float_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   store i64 %conv, i64* %0, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_float_uint64_t(i8* nocapture %ptr, float %str) {
 ; CHECK-P10-LABEL: st_align32_float_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    xscvdpuxds f0, f1
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    stxsdx f0, r3, r4
+; CHECK-P10-NEXT:    xscvdpuxds v2, f1
+; CHECK-P10-NEXT:    pstxsd v2, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_float_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    xscvdpuxds f0, f1
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    stxsdx f0, r3, r4
entry:
   store i64 %conv, i64* %0, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_float_uint64_t(i64 %ptr, float %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_float_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    xscvdpuxds f0, f1
+; CHECK-P10-NEXT:    xscvdpuxds v2, f1
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    stxsdx f0, r3, r4
+; CHECK-P10-NEXT:    pstxsd v2, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_float_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    xscvdpuxds f0, f1
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   store i64 %conv, i64* %0, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_float_int64_t(i8* nocapture %ptr, float %str) {
 ; CHECK-P10-LABEL: st_align32_float_int64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    xscvdpsxds f0, f1
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    stxsdx f0, r3, r4
+; CHECK-P10-NEXT:    xscvdpsxds v2, f1
+; CHECK-P10-NEXT:    pstxsd v2, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_float_int64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    xscvdpsxds f0, f1
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    stxsdx f0, r3, r4
entry:
   store i64 %conv, i64* %0, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_float_int64_t(i64 %ptr, float %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_float_int64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    xscvdpsxds f0, f1
+; CHECK-P10-NEXT:    xscvdpsxds v2, f1
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    stxsdx f0, r3, r4
+; CHECK-P10-NEXT:    pstxsd v2, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_float_int64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    xscvdpsxds f0, f1
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   store float %str, float* %0, align 4
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_float_float(i8* nocapture %ptr, float %str) {
 ; CHECK-P10-LABEL: st_align32_float_float:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    stfsx f1, r3, r4
+; CHECK-P10-NEXT:    pstfs f1, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_float_float:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    stfsx f1, r3, r4
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_float_float(i64 %ptr, float %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_float_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    stfsx f1, r3, r4
+; CHECK-P10-NEXT:    pstfs f1, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_float_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
entry:
   store double %conv, double* %0, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_float_double(i8* nocapture %ptr, float %str) {
 ; CHECK-P10-LABEL: st_align32_float_double:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    stfdx f1, r3, r4
+; CHECK-P10-NEXT:    pstfd f1, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_float_double:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    stfdx f1, r3, r4
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_float_double(i64 %ptr, float %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_float_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    stfdx f1, r3, r4
+; CHECK-P10-NEXT:    pstfd f1, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_float_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712

llvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll

entry:
   %conv = sext i8 %0 to i16
   ret i16 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i16 @ld_align32_int16_t_int8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int16_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int16_t_int8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i16 @ld_disjoint_align32_int16_t_int8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int16_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int16_t_int8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %1 = load i16, i16* %0, align 2
   ret i16 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i16 @ld_align32_int16_t_uint16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int16_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lhax r3, r3, r4
+; CHECK-P10-NEXT:    plha r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int16_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lhax r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i16 @ld_disjoint_align32_int16_t_uint16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int16_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lhax r3, r3, r4
+; CHECK-P10-NEXT:    plha r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int16_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
entry:
   %conv = trunc i32 %1 to i16
   ret i16 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i16 @ld_align32_int16_t_uint32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LE-LABEL: ld_align32_int16_t_uint32_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
-; CHECK-P10-LE-NEXT:    pli r4, 99999000
-; CHECK-P10-LE-NEXT:    lhax r3, r3, r4
+; CHECK-P10-LE-NEXT:    plha r3, 99999000(r3), 0
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_align32_int16_t_uint32_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
-; CHECK-P10-BE-NEXT:    pli r4, 99999002
-; CHECK-P10-BE-NEXT:    lhax r3, r3, r4
+; CHECK-P10-BE-NEXT:    plha r3, 99999002(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_align32_int16_t_uint32_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, 1525
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 56600
 ; CHECK-P9-LE-NEXT:    lhax r3, r3, r4
 ; CHECK-P9-LE-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i16 @ld_disjoint_align32_int16_t_uint32_t(i64 %ptr) {
 ; CHECK-P10-LE-LABEL: ld_disjoint_align32_int16_t_uint32_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    lis r4, -15264
 ; CHECK-P10-LE-NEXT:    and r3, r3, r4
-; CHECK-P10-LE-NEXT:    pli r4, 999990000
-; CHECK-P10-LE-NEXT:    lhax r3, r3, r4
+; CHECK-P10-LE-NEXT:    plha r3, 999990000(r3), 0
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_disjoint_align32_int16_t_uint32_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    lis r4, -15264
 ; CHECK-P10-BE-NEXT:    and r3, r3, r4
-; CHECK-P10-BE-NEXT:    pli r4, 999990002
-; CHECK-P10-BE-NEXT:    lhax r3, r3, r4
+; CHECK-P10-BE-NEXT:    plha r3, 999990002(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_disjoint_align32_int16_t_uint32_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, -15264
 ; CHECK-P9-LE-NEXT:    and r3, r3, r4
 ; CHECK-P9-LE-NEXT:    lis r4, 15258
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 41712
entry:
   %conv = trunc i64 %1 to i16
   ret i16 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i16 @ld_align32_int16_t_uint64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LE-LABEL: ld_align32_int16_t_uint64_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
-; CHECK-P10-LE-NEXT:    pli r4, 99999000
-; CHECK-P10-LE-NEXT:    lhax r3, r3, r4
+; CHECK-P10-LE-NEXT:    plha r3, 99999000(r3), 0
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_align32_int16_t_uint64_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
-; CHECK-P10-BE-NEXT:    pli r4, 99999006
-; CHECK-P10-BE-NEXT:    lhax r3, r3, r4
+; CHECK-P10-BE-NEXT:    plha r3, 99999006(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_align32_int16_t_uint64_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, 1525
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 56600
 ; CHECK-P9-LE-NEXT:    lhax r3, r3, r4
 ; CHECK-P9-LE-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i16 @ld_disjoint_align32_int16_t_uint64_t(i64 %ptr) {
 ; CHECK-P10-LE-LABEL: ld_disjoint_align32_int16_t_uint64_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    lis r4, -15264
 ; CHECK-P10-LE-NEXT:    and r3, r3, r4
-; CHECK-P10-LE-NEXT:    pli r4, 999990000
-; CHECK-P10-LE-NEXT:    lhax r3, r3, r4
+; CHECK-P10-LE-NEXT:    plha r3, 999990000(r3), 0
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_disjoint_align32_int16_t_uint64_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    lis r4, -15264
 ; CHECK-P10-BE-NEXT:    and r3, r3, r4
-; CHECK-P10-BE-NEXT:    pli r4, 999990006
-; CHECK-P10-BE-NEXT:    lhax r3, r3, r4
+; CHECK-P10-BE-NEXT:    plha r3, 999990006(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_disjoint_align32_int16_t_uint64_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, -15264
 ; CHECK-P9-LE-NEXT:    and r3, r3, r4
 ; CHECK-P9-LE-NEXT:    lis r4, 15258
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 41712
entry:
   %conv = fptosi float %1 to i16
   ret i16 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i16 @ld_align32_int16_t_float(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int16_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfsx f0, r3, r4
+; CHECK-P10-NEXT:    plfs f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int16_t_float:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i16 @ld_disjoint_align32_int16_t_float(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int16_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfsx f0, r3, r4
+; CHECK-P10-NEXT:    plfs f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int16_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
entry:
   %conv = fptosi double %1 to i16
   ret i16 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i16 @ld_align32_int16_t_double(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int16_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int16_t_double:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i16 @ld_disjoint_align32_int16_t_double(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int16_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int16_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
entry:
   %conv = zext i8 %0 to i16
   ret i16 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i16 @ld_align32_uint16_t_uint8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint16_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint16_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint16_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
entry:
   %conv = sext i8 %0 to i16
   ret i16 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i16 @ld_align32_uint16_t_int8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint16_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    clrldi r3, r3, 48
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint16_t_int8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_int8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint16_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    clrldi r3, r3, 48
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_int8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
entry:
   %1 = load i16, i16* %0, align 2
   ret i16 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i16 @ld_align32_uint16_t_uint16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint16_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint16_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lhzx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint16_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
entry:
   %conv = trunc i32 %1 to i16
   ret i16 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i16 @ld_align32_uint16_t_uint32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LE-LABEL: ld_align32_uint16_t_uint32_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
-; CHECK-P10-LE-NEXT:    pli r4, 99999000
-; CHECK-P10-LE-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-LE-NEXT:    plhz r3, 99999000(r3), 0
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_align32_uint16_t_uint32_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
-; CHECK-P10-BE-NEXT:    pli r4, 99999002
-; CHECK-P10-BE-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-BE-NEXT:    plhz r3, 99999002(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_align32_uint16_t_uint32_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, 1525
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 56600
 ; CHECK-P9-LE-NEXT:    lhzx r3, r3, r4
 ; CHECK-P9-LE-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint32_t(i64 %ptr) {
 ; CHECK-P10-LE-LABEL: ld_disjoint_align32_uint16_t_uint32_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    lis r4, -15264
 ; CHECK-P10-LE-NEXT:    and r3, r3, r4
-; CHECK-P10-LE-NEXT:    pli r4, 999990000
-; CHECK-P10-LE-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-LE-NEXT:    plhz r3, 999990000(r3), 0
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_disjoint_align32_uint16_t_uint32_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    lis r4, -15264
 ; CHECK-P10-BE-NEXT:    and r3, r3, r4
-; CHECK-P10-BE-NEXT:    pli r4, 999990002
-; CHECK-P10-BE-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-BE-NEXT:    plhz r3, 999990002(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_disjoint_align32_uint16_t_uint32_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, -15264
 ; CHECK-P9-LE-NEXT:    and r3, r3, r4
 ; CHECK-P9-LE-NEXT:    lis r4, 15258
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 41712
entry:
   %conv = trunc i64 %1 to i16
   ret i16 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i16 @ld_align32_uint16_t_uint64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LE-LABEL: ld_align32_uint16_t_uint64_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
-; CHECK-P10-LE-NEXT:    pli r4, 99999000
-; CHECK-P10-LE-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-LE-NEXT:    plhz r3, 99999000(r3), 0
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_align32_uint16_t_uint64_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
-; CHECK-P10-BE-NEXT:    pli r4, 99999006
-; CHECK-P10-BE-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-BE-NEXT:    plhz r3, 99999006(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_align32_uint16_t_uint64_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, 1525
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 56600
 ; CHECK-P9-LE-NEXT:    lhzx r3, r3, r4
 ; CHECK-P9-LE-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint64_t(i64 %ptr) {
 ; CHECK-P10-LE-LABEL: ld_disjoint_align32_uint16_t_uint64_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    lis r4, -15264
 ; CHECK-P10-LE-NEXT:    and r3, r3, r4
-; CHECK-P10-LE-NEXT:    pli r4, 999990000
-; CHECK-P10-LE-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-LE-NEXT:    plhz r3, 999990000(r3), 0
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_disjoint_align32_uint16_t_uint64_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    lis r4, -15264
 ; CHECK-P10-BE-NEXT:    and r3, r3, r4
-; CHECK-P10-BE-NEXT:    pli r4, 999990006
-; CHECK-P10-BE-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-BE-NEXT:    plhz r3, 999990006(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_disjoint_align32_uint16_t_uint64_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, -15264
 ; CHECK-P9-LE-NEXT:    and r3, r3, r4
 ; CHECK-P9-LE-NEXT:    lis r4, 15258
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 41712
entry:
   %conv = fptoui float %1 to i16
   ret i16 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i16 @ld_align32_uint16_t_float(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint16_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfsx f0, r3, r4
+; CHECK-P10-NEXT:    plfs f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint16_t_float:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_float(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint16_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfsx f0, r3, r4
+; CHECK-P10-NEXT:    plfs f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
entry:
   %conv = fptoui double %1 to i16
   ret i16 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i16 @ld_align32_uint16_t_double(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint16_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint16_t_double:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_double(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint16_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
entry:
   store i8 %conv, i8* %add.ptr, align 1
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint16_t_uint8_t(i8* nocapture %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint16_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stbx r4, r3, r5
+; CHECK-P10-NEXT:    pstb r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint16_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stbx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint16_t_uint8_t(i64 %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint16_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stbx r4, r3, r5
+; CHECK-P10-NEXT:    pstb r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store i16 %str, i16* %0, align 2
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint16_t_uint16_t(i8* nocapture %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint16_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint16_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    sthx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint16_t_uint16_t(i64 %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint16_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store i32 %conv, i32* %0, align 4
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint16_t_uint32_t(i8* nocapture %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint16_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint16_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stwx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint16_t_uint32_t(i64 %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint16_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store i64 %conv, i64* %0, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint16_t_uint64_t(i8* nocapture %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint16_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint16_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stdx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint16_t_uint64_t(i64 %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint16_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint16_t_float(i8* nocapture %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint16_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwz f0, r4
-; CHECK-P10-NEXT:    pli r4, 99999000
 ; CHECK-P10-NEXT:    xscvuxdsp f0, f0
-; CHECK-P10-NEXT:    stfsx f0, r3, r4
+; CHECK-P10-NEXT:    pstfs f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_align32_uint16_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwz f0, r4
 ; CHECK-P9-NEXT:    lis r4, 1525
 ; CHECK-P9-NEXT:    xscvuxdsp f0, f0
 ; CHECK-P9-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint16_t_float(i64 %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint16_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwz f0, r4
 ; CHECK-P10-NEXT:    lis r5, -15264
-; CHECK-P10-NEXT:    pli r4, 999990000
 ; CHECK-P10-NEXT:    xscvuxdsp f0, f0
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    stfsx f0, r3, r4
+; CHECK-P10-NEXT:    pstfs f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwz f0, r4
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    xscvuxdsp f0, f0
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint16_t_double(i8* nocapture %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint16_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwz f0, r4
-; CHECK-P10-NEXT:    pli r4, 99999000
 ; CHECK-P10-NEXT:    xscvuxddp f0, f0
-; CHECK-P10-NEXT:    stfdx f0, r3, r4
+; CHECK-P10-NEXT:    pstfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_align32_uint16_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwz f0, r4
 ; CHECK-P9-NEXT:    lis r4, 1525
 ; CHECK-P9-NEXT:    xscvuxddp f0, f0
 ; CHECK-P9-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint16_t_double(i64 %ptr, i16 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint16_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwz f0, r4
 ; CHECK-P10-NEXT:    lis r5, -15264
-; CHECK-P10-NEXT:    pli r4, 999990000
 ; CHECK-P10-NEXT:    xscvuxddp f0, f0
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    stfdx f0, r3, r4
+; CHECK-P10-NEXT:    pstfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwz f0, r4
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    xscvuxddp f0, f0
entry:
   store i32 %conv, i32* %0, align 4
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_int16_t_uint32_t(i8* nocapture %ptr, i16 signext %str) {
 ; CHECK-P10-LABEL: st_align32_int16_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_int16_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stwx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_int16_t_uint32_t(i64 %ptr, i16 signext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int16_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int16_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store i64 %conv, i64* %0, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_int16_t_uint64_t(i8* nocapture %ptr, i16 signext %str) {
 ; CHECK-P10-LABEL: st_align32_int16_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_int16_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stdx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_int16_t_uint64_t(i64 %ptr, i16 signext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int16_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int16_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_int16_t_float(i8* nocapture %ptr, i16 signext %str) {
 ; CHECK-P10-LABEL: st_align32_int16_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwa f0, r4
-; CHECK-P10-NEXT:    pli r4, 99999000
 ; CHECK-P10-NEXT:    xscvsxdsp f0, f0
-; CHECK-P10-NEXT:    stfsx f0, r3, r4
+; CHECK-P10-NEXT:    pstfs f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_align32_int16_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwa f0, r4
 ; CHECK-P9-NEXT:    lis r4, 1525
 ; CHECK-P9-NEXT:    xscvsxdsp f0, f0
 ; CHECK-P9-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_int16_t_float(i64 %ptr, i16 signext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int16_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwa f0, r4
 ; CHECK-P10-NEXT:    lis r5, -15264
-; CHECK-P10-NEXT:    pli r4, 999990000
 ; CHECK-P10-NEXT:    xscvsxdsp f0, f0
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    stfsx f0, r3, r4
+; CHECK-P10-NEXT:    pstfs f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int16_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwa f0, r4
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    xscvsxdsp f0, f0
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_int16_t_double(i8* nocapture %ptr, i16 signext %str) {
 ; CHECK-P10-LABEL: st_align32_int16_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwa f0, r4
-; CHECK-P10-NEXT:    pli r4, 99999000
 ; CHECK-P10-NEXT:    xscvsxddp f0, f0
-; CHECK-P10-NEXT:    stfdx f0, r3, r4
+; CHECK-P10-NEXT:    pstfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_align32_int16_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwa f0, r4
 ; CHECK-P9-NEXT:    lis r4, 1525
 ; CHECK-P9-NEXT:    xscvsxddp f0, f0
 ; CHECK-P9-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_int16_t_double(i64 %ptr, i16 signext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int16_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwa f0, r4
 ; CHECK-P10-NEXT:    lis r5, -15264
-; CHECK-P10-NEXT:    pli r4, 999990000
 ; CHECK-P10-NEXT:    xscvsxddp f0, f0
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    stfdx f0, r3, r4
+; CHECK-P10-NEXT:    pstfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int16_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwa f0, r4
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    xscvsxddp f0, f0

llvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll

entry:
   %conv = sext i8 %0 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i32 @ld_align32_int32_t_int8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int32_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int32_t_int8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i32 @ld_disjoint_align32_int32_t_int8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int32_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_int8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = sext i16 %1 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i32 @ld_align32_int32_t_int16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int32_t_int16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lhax r3, r3, r4
+; CHECK-P10-NEXT:    plha r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int32_t_int16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lhax r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i32 @ld_disjoint_align32_int32_t_int16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int32_t_int16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lhax r3, r3, r4
+; CHECK-P10-NEXT:    plha r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_int16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
entry:
   %1 = load i32, i32* %0, align 4
   ret i32 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i32 @ld_align32_int32_t_uint32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int32_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lwax r3, r3, r4
+; CHECK-P10-NEXT:    plwa r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int32_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lwax r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr
entry:
   ret i32 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i32 @ld_disjoint_unalign16_int32_t_uint32_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_unalign16_int32_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT:    li r4, 6
-; CHECK-P10-NEXT:    lwax r3, r3, r4
+; CHECK-P10-NEXT:    plwa r3, 6(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_unalign16_int32_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    rldicr r3, r3, 0, 51
 ; CHECK-P9-NEXT:    li r4, 6
 ; CHECK-P9-NEXT:    lwax r3, r3, r4
 ; CHECK-P9-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i32 @ld_disjoint_align32_int32_t_uint32_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int32_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lwax r3, r3, r4
+; CHECK-P10-NEXT:    plwa r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
entry:
   %0 = inttoptr i64 %ptr to i64*
   %1 = load i64, i64* %0, align 8
   %conv = trunc i64 %1 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i32 @ld_unalign16_int32_t_uint64_t(i8* nocapture readonly %ptr) {
-; CHECK-LE-LABEL: ld_unalign16_int32_t_uint64_t:
-; CHECK-LE:       # %bb.0: # %entry
-; CHECK-LE-NEXT:    li r4, 1
-; CHECK-LE-NEXT:    lwax r3, r3, r4
-; CHECK-LE-NEXT:    blr
+; CHECK-P10-LE-LABEL: ld_unalign16_int32_t_uint64_t:
+; CHECK-P10-LE:       # %bb.0: # %entry
+; CHECK-P10-LE-NEXT:    plwa r3, 1(r3), 0
+; CHECK-P10-LE-NEXT:    blr
 ;
-; CHECK-BE-LABEL: ld_unalign16_int32_t_uint64_t:
-; CHECK-BE:       # %bb.0: # %entry
-; CHECK-BE-NEXT:    li r4, 5
-; CHECK-BE-NEXT:    lwax r3, r3, r4
-; CHECK-BE-NEXT:    blr
+; CHECK-P10-BE-LABEL: ld_unalign16_int32_t_uint64_t:
+; CHECK-P10-BE:       # %bb.0: # %entry
+; CHECK-P10-BE-NEXT:    plwa r3, 5(r3), 0
+; CHECK-P10-BE-NEXT:    blr
+;
+; CHECK-P9-LE-LABEL: ld_unalign16_int32_t_uint64_t:
+; CHECK-P9-LE:       # %bb.0: # %entry
+; CHECK-P9-LE-NEXT:    li r4, 1
+; CHECK-P9-LE-NEXT:    lwax r3, r3, r4
+; CHECK-P9-LE-NEXT:    blr
+;
+; CHECK-P9-BE-LABEL: ld_unalign16_int32_t_uint64_t:
+; CHECK-P9-BE:       # %bb.0: # %entry
+; CHECK-P9-BE-NEXT:    li r4, 5
+; CHECK-P9-BE-NEXT:    lwax r3, r3, r4
+; CHECK-P9-BE-NEXT:    blr
+;
+; CHECK-P8-LE-LABEL: ld_unalign16_int32_t_uint64_t:
+; CHECK-P8-LE:       # %bb.0: # %entry
+; CHECK-P8-LE-NEXT:    li r4, 1
+; CHECK-P8-LE-NEXT:    lwax r3, r3, r4
+; CHECK-P8-LE-NEXT:    blr
+;
+; CHECK-P8-BE-LABEL: ld_unalign16_int32_t_uint64_t:
+; CHECK-P8-BE:       # %bb.0: # %entry
+; CHECK-P8-BE-NEXT:    li r4, 5
+; CHECK-P8-BE-NEXT:    lwax r3, r3, r4
+; CHECK-P8-BE-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
   %0 = bitcast i8* %add.ptr to i64*
   %1 = load i64, i64* %0, align 8
   %conv = trunc i64 %1 to i32
   ret i32 %conv
 }
 
entry:
   %conv = trunc i64 %1 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i32 @ld_align32_int32_t_uint64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LE-LABEL: ld_align32_int32_t_uint64_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
-; CHECK-P10-LE-NEXT:    pli r4, 99999000
-; CHECK-P10-LE-NEXT:    lwax r3, r3, r4
+; CHECK-P10-LE-NEXT:    plwa r3, 99999000(r3), 0
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_align32_int32_t_uint64_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
-; CHECK-P10-BE-NEXT:    pli r4, 99999004
-; CHECK-P10-BE-NEXT:    lwax r3, r3, r4
+; CHECK-P10-BE-NEXT:    plwa r3, 99999004(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_align32_int32_t_uint64_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, 1525
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 56600
 ; CHECK-P9-LE-NEXT:    lwax r3, r3, r4
 ; CHECK-P9-LE-NEXT:    blr
entry:
   ret i32 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i32 @ld_disjoint_unalign16_int32_t_uint64_t(i64 %ptr) {
 ; CHECK-P10-LE-LABEL: ld_disjoint_unalign16_int32_t_uint64_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    rldicr r3, r3, 0, 51
-; CHECK-P10-LE-NEXT:    li r4, 6
-; CHECK-P10-LE-NEXT:    lwax r3, r3, r4
+; CHECK-P10-LE-NEXT:    plwa r3, 6(r3), 0
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_disjoint_unalign16_int32_t_uint64_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    rldicr r3, r3, 0, 51
-; CHECK-P10-BE-NEXT:    li r4, 10
-; CHECK-P10-BE-NEXT:    lwax r3, r3, r4
+; CHECK-P10-BE-NEXT:    plwa r3, 10(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_disjoint_unalign16_int32_t_uint64_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    rldicr r3, r3, 0, 51
 ; CHECK-P9-LE-NEXT:    li r4, 6
 ; CHECK-P9-LE-NEXT:    lwax r3, r3, r4
 ; CHECK-P9-LE-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i32 @ld_disjoint_align32_int32_t_uint64_t(i64 %ptr) {
 ; CHECK-P10-LE-LABEL: ld_disjoint_align32_int32_t_uint64_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    lis r4, -15264
 ; CHECK-P10-LE-NEXT:    and r3, r3, r4
-; CHECK-P10-LE-NEXT:    pli r4, 999990000
-; CHECK-P10-LE-NEXT:    lwax r3, r3, r4
+; CHECK-P10-LE-NEXT:    plwa r3, 999990000(r3), 0
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_disjoint_align32_int32_t_uint64_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    lis r4, -15264
 ; CHECK-P10-BE-NEXT:    and r3, r3, r4
-; CHECK-P10-BE-NEXT:    pli r4, 999990004
-; CHECK-P10-BE-NEXT:    lwax r3, r3, r4
+; CHECK-P10-BE-NEXT:    plwa r3, 999990004(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_disjoint_align32_int32_t_uint64_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, -15264
 ; CHECK-P9-LE-NEXT:    and r3, r3, r4
 ; CHECK-P9-LE-NEXT:    lis r4, 15258
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 41712
entry:
   %conv = fptosi float %1 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i32 @ld_align32_int32_t_float(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int32_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfsx f0, r3, r4
+; CHECK-P10-NEXT:    plfs f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int32_t_float:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i32 @ld_disjoint_align32_int32_t_float(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int32_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfsx f0, r3, r4
+; CHECK-P10-NEXT:    plfs f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
entry:
   %conv = fptosi double %1 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i32 @ld_align32_int32_t_double(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int32_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int32_t_double:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i32 @ld_disjoint_align32_int32_t_double(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int32_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
entry:
   %conv = zext i8 %0 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i32 @ld_align32_uint32_t_uint8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint32_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint32_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint32_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
entry:
   %conv = sext i8 %0 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i32 @ld_align32_uint32_t_int8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint32_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint32_t_int8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_int8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint32_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_int8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
entry:
   %conv = zext i16 %1 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i32 @ld_align32_uint32_t_uint16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint32_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint32_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lhzx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint32_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
entry:
   %conv = sext i16 %1 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i32 @ld_align32_uint32_t_int16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint32_t_int16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lhax r3, r3, r4
+; CHECK-P10-NEXT:    plha r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint32_t_int16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lhax r3, r3, r4

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_int16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint32_t_int16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lhax r3, r3, r4
+; CHECK-P10-NEXT:    plha r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_int16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %1 = load i32, i32* %0, align 4
   ret i32 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i32 @ld_align32_uint32_t_uint32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint32_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint32_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lwzx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint32_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint32_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
entry:
   %conv = trunc i64 %1 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i32 @ld_align32_uint32_t_uint64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LE-LABEL: ld_align32_uint32_t_uint64_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
-; CHECK-P10-LE-NEXT:    pli r4, 99999000
-; CHECK-P10-LE-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-LE-NEXT:    plwz r3, 99999000(r3), 0
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_align32_uint32_t_uint64_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
-; CHECK-P10-BE-NEXT:    pli r4, 99999004
-; CHECK-P10-BE-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-BE-NEXT:    plwz r3, 99999004(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_align32_uint32_t_uint64_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, 1525
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 56600
 ; CHECK-P9-LE-NEXT:    lwzx r3, r3, r4
 ; CHECK-P9-LE-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint64_t(i64 %ptr) {
 ; CHECK-P10-LE-LABEL: ld_disjoint_align32_uint32_t_uint64_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    lis r4, -15264
 ; CHECK-P10-LE-NEXT:    and r3, r3, r4
-; CHECK-P10-LE-NEXT:    pli r4, 999990000
-; CHECK-P10-LE-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-LE-NEXT:    plwz r3, 999990000(r3), 0
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_disjoint_align32_uint32_t_uint64_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    lis r4, -15264
 ; CHECK-P10-BE-NEXT:    and r3, r3, r4
-; CHECK-P10-BE-NEXT:    pli r4, 999990004
-; CHECK-P10-BE-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-BE-NEXT:    plwz r3, 999990004(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_disjoint_align32_uint32_t_uint64_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, -15264
 ; CHECK-P9-LE-NEXT:    and r3, r3, r4
 ; CHECK-P9-LE-NEXT:    lis r4, 15258
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 41712
entry:
   %conv = fptoui float %1 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i32 @ld_align32_uint32_t_float(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint32_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfsx f0, r3, r4
+; CHECK-P10-NEXT:    plfs f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpuxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint32_t_float:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_float(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint32_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfsx f0, r3, r4
+; CHECK-P10-NEXT:    plfs f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpuxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
entry:
   %conv = fptoui double %1 to i32
   ret i32 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i32 @ld_align32_uint32_t_double(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint32_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpuxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint32_t_double:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_double(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint32_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpuxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
entry:
   store i8 %conv, i8* %add.ptr, align 1
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint32_t_uint8_t(i8* nocapture %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint32_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stbx r4, r3, r5
+; CHECK-P10-NEXT:    pstb r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint32_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stbx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint32_t_uint8_t(i64 %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint32_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stbx r4, r3, r5
+; CHECK-P10-NEXT:    pstb r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store i16 %conv, i16* %0, align 2
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint32_t_uint16_t(i8* nocapture %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint32_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint32_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    sthx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint32_t_uint16_t(i64 %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint32_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store i32 %str, i32* %0, align 4
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint32_t_uint32_t(i8* nocapture %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint32_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint32_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stwx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint32_t_uint32_t(i64 %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint32_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store i64 %conv, i64* %0, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint32_t_uint64_t(i8* nocapture %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint32_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint32_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stdx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint32_t_uint64_t(i64 %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint32_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint32_t_float(i8* nocapture %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint32_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwz f0, r4
-; CHECK-P10-NEXT:    pli r4, 99999000
 ; CHECK-P10-NEXT:    xscvuxdsp f0, f0
-; CHECK-P10-NEXT:    stfsx f0, r3, r4
+; CHECK-P10-NEXT:    pstfs f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_align32_uint32_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwz f0, r4
 ; CHECK-P9-NEXT:    lis r4, 1525
 ; CHECK-P9-NEXT:    xscvuxdsp f0, f0
 ; CHECK-P9-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint32_t_float(i64 %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint32_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwz f0, r4
 ; CHECK-P10-NEXT:    lis r5, -15264
-; CHECK-P10-NEXT:    pli r4, 999990000
 ; CHECK-P10-NEXT:    xscvuxdsp f0, f0
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    stfsx f0, r3, r4
+; CHECK-P10-NEXT:    pstfs f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwz f0, r4
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    xscvuxdsp f0, f0
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint32_t_double(i8* nocapture %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint32_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwz f0, r4
-; CHECK-P10-NEXT:    pli r4, 99999000
 ; CHECK-P10-NEXT:    xscvuxddp f0, f0
-; CHECK-P10-NEXT:    stfdx f0, r3, r4
+; CHECK-P10-NEXT:    pstfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_align32_uint32_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwz f0, r4
 ; CHECK-P9-NEXT:    lis r4, 1525
 ; CHECK-P9-NEXT:    xscvuxddp f0, f0
 ; CHECK-P9-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint32_t_double(i64 %ptr, i32 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint32_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwz f0, r4
 ; CHECK-P10-NEXT:    lis r5, -15264
-; CHECK-P10-NEXT:    pli r4, 999990000
 ; CHECK-P10-NEXT:    xscvuxddp f0, f0
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    stfdx f0, r3, r4
+; CHECK-P10-NEXT:    pstfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwz f0, r4
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    xscvuxddp f0, f0
entry:
   store i64 %conv, i64* %0, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_int32_t_uint64_t(i8* nocapture %ptr, i32 signext %str) {
 ; CHECK-P10-LABEL: st_align32_int32_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_int32_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stdx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_int32_t_uint64_t(i64 %ptr, i32 signext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int32_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int32_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_int32_t_float(i8* nocapture %ptr, i32 signext %str) {
 ; CHECK-P10-LABEL: st_align32_int32_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwa f0, r4
-; CHECK-P10-NEXT:    pli r4, 99999000
 ; CHECK-P10-NEXT:    xscvsxdsp f0, f0
-; CHECK-P10-NEXT:    stfsx f0, r3, r4
+; CHECK-P10-NEXT:    pstfs f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_align32_int32_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwa f0, r4
 ; CHECK-P9-NEXT:    lis r4, 1525
 ; CHECK-P9-NEXT:    xscvsxdsp f0, f0
 ; CHECK-P9-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_int32_t_float(i64 %ptr, i32 signext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int32_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwa f0, r4
 ; CHECK-P10-NEXT:    lis r5, -15264
-; CHECK-P10-NEXT:    pli r4, 999990000
 ; CHECK-P10-NEXT:    xscvsxdsp f0, f0
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    stfsx f0, r3, r4
+; CHECK-P10-NEXT:    pstfs f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int32_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwa f0, r4
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    xscvsxdsp f0, f0
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_int32_t_double(i8* nocapture %ptr, i32 signext %str) {
 ; CHECK-P10-LABEL: st_align32_int32_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwa f0, r4
-; CHECK-P10-NEXT:    pli r4, 99999000
 ; CHECK-P10-NEXT:    xscvsxddp f0, f0
-; CHECK-P10-NEXT:    stfdx f0, r3, r4
+; CHECK-P10-NEXT:    pstfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_align32_int32_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwa f0, r4
 ; CHECK-P9-NEXT:    lis r4, 1525
 ; CHECK-P9-NEXT:    xscvsxddp f0, f0
 ; CHECK-P9-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_int32_t_double(i64 %ptr, i32 signext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int32_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwa f0, r4
 ; CHECK-P10-NEXT:    lis r5, -15264
-; CHECK-P10-NEXT:    pli r4, 999990000
 ; CHECK-P10-NEXT:    xscvsxddp f0, f0
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    stfdx f0, r3, r4
+; CHECK-P10-NEXT:    pstfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int32_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwa f0, r4
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    xscvsxddp f0, f0

llvm/test/CodeGen/PowerPC/scalar-i64-ldst.ll

entry:
   %conv = fptosi float %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_align32_int64_t_float(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int64_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfsx f0, r3, r4
+; CHECK-P10-NEXT:    plfs f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxds f0, f0
 ; CHECK-P10-NEXT:    mffprd r3, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int64_t_float:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_int64_t_float(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int64_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfsx f0, r3, r4
+; CHECK-P10-NEXT:    plfs f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxds f0, f0
 ; CHECK-P10-NEXT:    mffprd r3, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
entry:
   %conv = fptosi double %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_align32_int64_t_double(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int64_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxds f0, f0
 ; CHECK-P10-NEXT:    mffprd r3, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int64_t_double:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_int64_t_double(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int64_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxds f0, f0
 ; CHECK-P10-NEXT:    mffprd r3, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
entry:
   %conv = zext i8 %0 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_unalign32_uint64_t_uint8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_unalign32_uint64_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999
   %0 = load i8, i8* %add.ptr, align 1
   %conv = zext i8 %0 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_align32_uint64_t_uint8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint64_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr
entry:
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_unalign32_uint64_t_uint8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    rldicr r3, r3, 0, 43
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr
 entry:
   %and = and i64 %ptr, -1048576
   %or = or i64 %and, 99999
   %0 = inttoptr i64 %or to i8*
   %1 = load i8, i8* %0, align 1
   %conv = zext i8 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_uint64_t_uint8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint64_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
entry:
   %conv = sext i8 %0 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_unalign32_uint64_t_int8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_unalign32_uint64_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_int8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4
 ; CHECK-PREP10-NEXT:    extsb r3, r3
 ; CHECK-PREP10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999
   %0 = load i8, i8* %add.ptr, align 1
   %conv = sext i8 %0 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_align32_uint64_t_int8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint64_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint64_t_int8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4
entry:
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_unalign32_uint64_t_int8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_int8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    rldicr r3, r3, 0, 43
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_uint64_t_int8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint64_t_int8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_int8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = zext i16 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_unalign32_uint64_t_uint16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_unalign32_uint64_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463
 ; CHECK-PREP10-NEXT:    lhzx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999
   %0 = bitcast i8* %add.ptr to i16*
   %1 = load i16, i16* %0, align 2
   %conv = zext i16 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_align32_uint64_t_uint16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint64_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lhzx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr
entry:
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_unalign32_uint64_t_uint16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    rldicr r3, r3, 0, 43
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463
 ; CHECK-PREP10-NEXT:    lhzx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr
 entry:
   %and = and i64 %ptr, -1048576
   %or = or i64 %and, 99999
   %0 = inttoptr i64 %or to i16*
   %1 = load i16, i16* %0, align 2
   %conv = zext i16 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_uint64_t_uint16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint64_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lhzx r3, r3, r4
+; CHECK-P10-NEXT:    plhz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
entry:
   %conv = sext i16 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_unalign32_uint64_t_int16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_unalign32_uint64_t_int16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lhax r3, r3, r4
+; CHECK-P10-NEXT:    plha r3, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_int16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463
 ; CHECK-PREP10-NEXT:    lhax r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999
   %0 = bitcast i8* %add.ptr to i16*
   %1 = load i16, i16* %0, align 2
   %conv = sext i16 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_align32_uint64_t_int16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint64_t_int16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lhax r3, r3, r4
+; CHECK-P10-NEXT:    plha r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint64_t_int16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lhax r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr
entry:
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_unalign32_uint64_t_int16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_int16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lhax r3, r3, r4
+; CHECK-P10-NEXT:    plha r3, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_int16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    rldicr r3, r3, 0, 43
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463
 ; CHECK-PREP10-NEXT:    lhax r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr
 entry:
   %and = and i64 %ptr, -1048576
   %or = or i64 %and, 99999
   %0 = inttoptr i64 %or to i16*
   %1 = load i16, i16* %0, align 2
   %conv = sext i16 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_uint64_t_int16_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint64_t_int16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lhax r3, r3, r4
+; CHECK-P10-NEXT:    plha r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_int16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
entry:
   %conv = zext i32 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_unalign32_uint64_t_uint32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_unalign32_uint64_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463
 ; CHECK-PREP10-NEXT:    lwzx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999
   %0 = bitcast i8* %add.ptr to i32*
   %1 = load i32, i32* %0, align 4
   %conv = zext i32 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_align32_uint64_t_uint32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint64_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lwzx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr
entry:
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_unalign32_uint64_t_uint32_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    rldicr r3, r3, 0, 43
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463
 ; CHECK-PREP10-NEXT:    lwzx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr
 entry:
   %and = and i64 %ptr, -1048576
   %or = or i64 %and, 99999
   %0 = inttoptr i64 %or to i32*
   %1 = load i32, i32* %0, align 4
   %conv = zext i32 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_uint64_t_uint32_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint64_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lwzx r3, r3, r4
+; CHECK-P10-NEXT:    plwz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
entry:
   %0 = inttoptr i64 %ptr to i32*
   %1 = load i32, i32* %0, align 4
   %conv = sext i32 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_unalign16_uint64_t_int32_t(i8* nocapture readonly %ptr) {
-; CHECK-LABEL: ld_unalign16_uint64_t_int32_t:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    li r4, 1
-; CHECK-NEXT:    lwax r3, r3, r4
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: ld_unalign16_uint64_t_int32_t:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    plwa r3, 1(r3), 0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-PREP10-LABEL: ld_unalign16_uint64_t_int32_t:
+; CHECK-PREP10:       # %bb.0: # %entry
+; CHECK-PREP10-NEXT:    li r4, 1
+; CHECK-PREP10-NEXT:    lwax r3, r3, r4
+; CHECK-PREP10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
   %0 = bitcast i8* %add.ptr to i32*
   %1 = load i32, i32* %0, align 4
   %conv = sext i32 %1 to i64
   ret i64 %conv
 }
 
entry:
   %conv = sext i32 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_unalign32_uint64_t_int32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_unalign32_uint64_t_int32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lwax r3, r3, r4
+; CHECK-P10-NEXT:    plwa r3, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_int32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463
 ; CHECK-PREP10-NEXT:    lwax r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999
   %0 = bitcast i8* %add.ptr to i32*
   %1 = load i32, i32* %0, align 4
   %conv = sext i32 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_align32_uint64_t_int32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint64_t_int32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lwax r3, r3, r4
+; CHECK-P10-NEXT:    plwa r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint64_t_int32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lwax r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr
entry:
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_unalign16_uint64_t_int32_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_unalign16_uint64_t_int32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT:    li r4, 6
-; CHECK-P10-NEXT:    lwax r3, r3, r4
+; CHECK-P10-NEXT:    plwa r3, 6(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_unalign16_uint64_t_int32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    rldicr r3, r3, 0, 51
 ; CHECK-P9-NEXT:    li r4, 6
 ; CHECK-P9-NEXT:    lwax r3, r3, r4
 ; CHECK-P9-NEXT:    blr
entry:
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_unalign32_uint64_t_int32_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_int32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lwax r3, r3, r4
+; CHECK-P10-NEXT:    plwa r3, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_int32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    rldicr r3, r3, 0, 43
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463
 ; CHECK-PREP10-NEXT:    lwax r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr
 entry:
   %and = and i64 %ptr, -1048576
   %or = or i64 %and, 99999
   %0 = inttoptr i64 %or to i32*
   %1 = load i32, i32* %0, align 4
   %conv = sext i32 %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_uint64_t_int32_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint64_t_int32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lwax r3, r3, r4
+; CHECK-P10-NEXT:    plwa r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_int32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712

 entry:
   %0 = inttoptr i64 %ptr to i64*
   %1 = load i64, i64* %0, align 8
   ret i64 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_unalign16_uint64_t_uint64_t(i8* nocapture readonly %ptr) {
-; CHECK-LABEL: ld_unalign16_uint64_t_uint64_t:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    li r4, 1
-; CHECK-NEXT:    ldx r3, r3, r4
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: ld_unalign16_uint64_t_uint64_t:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    pld r3, 1(r3), 0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-PREP10-LABEL: ld_unalign16_uint64_t_uint64_t:
+; CHECK-PREP10:       # %bb.0: # %entry
+; CHECK-PREP10-NEXT:    li r4, 1
+; CHECK-PREP10-NEXT:    ldx r3, r3, r4
+; CHECK-PREP10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
   %0 = bitcast i8* %add.ptr to i64*
   %1 = load i64, i64* %0, align 8
   ret i64 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_align16_uint64_t_uint64_t(i8* nocapture readonly %ptr) {
 ; CHECK-LABEL: ld_align16_uint64_t_uint64_t:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    ld r3, 8(r3)
 ; CHECK-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
   %0 = bitcast i8* %add.ptr to i64*
   %1 = load i64, i64* %0, align 8
   ret i64 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_unalign32_uint64_t_uint64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_unalign32_uint64_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463
 ; CHECK-PREP10-NEXT:    ldx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999
   %0 = bitcast i8* %add.ptr to i64*
   %1 = load i64, i64* %0, align 8
   ret i64 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_align32_uint64_t_uint64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint64_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    ldx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr
entry:
   ret i64 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_unalign16_uint64_t_uint64_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_unalign16_uint64_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT:    li r4, 6
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 6(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_unalign16_uint64_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    rldicr r3, r3, 0, 51
 ; CHECK-P9-NEXT:    li r4, 6
 ; CHECK-P9-NEXT:    ldx r3, r3, r4
 ; CHECK-P9-NEXT:    blr
entry:
   ret i64 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_unalign32_uint64_t_uint64_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    rldicr r3, r3, 0, 43
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463
 ; CHECK-PREP10-NEXT:    ldx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr
 entry:
   %and = and i64 %ptr, -1048576
   %or = or i64 %and, 99999
   %0 = inttoptr i64 %or to i64*
   %1 = load i64, i64* %0, align 8
   ret i64 %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_uint64_t_uint64_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint64_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    ldx r3, r3, r4
+; CHECK-P10-NEXT:    pld r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
entry:
   %0 = inttoptr i64 %ptr to float*
   %1 = load float, float* %0, align 4
   %conv = fptoui float %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_unalign16_uint64_t_float(i8* nocapture readonly %ptr) {
-; CHECK-LABEL: ld_unalign16_uint64_t_float:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    lfs f0, 1(r3)
-; CHECK-NEXT:    xscvdpuxds f0, f0
-; CHECK-NEXT:    mffprd r3, f0
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: ld_unalign16_uint64_t_float:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    plfs f0, 1(r3), 0
+; CHECK-P10-NEXT:    xscvdpuxds f0, f0
+; CHECK-P10-NEXT:    mffprd r3, f0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-PREP10-LABEL: ld_unalign16_uint64_t_float:
+; CHECK-PREP10:       # %bb.0: # %entry
+; CHECK-PREP10-NEXT:    lfs f0, 1(r3)
+; CHECK-PREP10-NEXT:    xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT:    mffprd r3, f0
+; CHECK-PREP10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
   %0 = bitcast i8* %add.ptr to float*
   %1 = load float, float* %0, align 4
   %conv = fptoui float %1 to i64
   ret i64 %conv
 }
 
entry:
   %conv = fptoui float %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_unalign32_uint64_t_float(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_unalign32_uint64_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lfsx f0, r3, r4
+; CHECK-P10-NEXT:    plfs f0, 99999(r3), 0
 ; CHECK-P10-NEXT:    xscvdpuxds f0, f0
 ; CHECK-P10-NEXT:    mffprd r3, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_float:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463
 ; CHECK-PREP10-NEXT:    lfsx f0, r3, r4
 ; CHECK-PREP10-NEXT:    xscvdpuxds f0, f0
 ; CHECK-PREP10-NEXT:    mffprd r3, f0
 ; CHECK-PREP10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999
   %0 = bitcast i8* %add.ptr to float*
   %1 = load float, float* %0, align 4
   %conv = fptoui float %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_align32_uint64_t_float(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint64_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfsx f0, r3, r4
+; CHECK-P10-NEXT:    plfs f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpuxds f0, f0
 ; CHECK-P10-NEXT:    mffprd r3, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint64_t_float:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
entry:
   %0 = inttoptr i64 %or to float*
   %1 = load float, float* %0, align 4
   %conv = fptoui float %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_unalign16_uint64_t_float(i64 %ptr) {
-; CHECK-LABEL: ld_disjoint_unalign16_uint64_t_float:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    rldicr r3, r3, 0, 51
-; CHECK-NEXT:    lfs f0, 6(r3)
-; CHECK-NEXT:    xscvdpuxds f0, f0
-; CHECK-NEXT:    mffprd r3, f0
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: ld_disjoint_unalign16_uint64_t_float:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT:    plfs f0, 6(r3), 0
+; CHECK-P10-NEXT:    xscvdpuxds f0, f0
+; CHECK-P10-NEXT:    mffprd r3, f0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-PREP10-LABEL: ld_disjoint_unalign16_uint64_t_float:
+; CHECK-PREP10:       # %bb.0: # %entry
+; CHECK-PREP10-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-PREP10-NEXT:    lfs f0, 6(r3)
+; CHECK-PREP10-NEXT:    xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT:    mffprd r3, f0
+; CHECK-PREP10-NEXT:    blr
 entry:
   %and = and i64 %ptr, -4096
   %or = or i64 %and, 6
   %0 = inttoptr i64 %or to float*
   %1 = load float, float* %0, align 4
   %conv = fptoui float %1 to i64
   ret i64 %conv
 }
entry:
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_unalign32_uint64_t_float(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lfsx f0, r3, r4
+; CHECK-P10-NEXT:    plfs f0, 99999(r3), 0
 ; CHECK-P10-NEXT:    xscvdpuxds f0, f0
 ; CHECK-P10-NEXT:    mffprd r3, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_float:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    rldicr r3, r3, 0, 43

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_uint64_t_float(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint64_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfsx f0, r3, r4
+; CHECK-P10-NEXT:    plfs f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpuxds f0, f0
 ; CHECK-P10-NEXT:    mffprd r3, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
entry:
   %0 = inttoptr i64 %ptr to double*
   %1 = load double, double* %0, align 8
   %conv = fptoui double %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_unalign16_uint64_t_double(i8* nocapture readonly %ptr) {
-; CHECK-LABEL: ld_unalign16_uint64_t_double:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    lfd f0, 1(r3)
-; CHECK-NEXT:    xscvdpuxds f0, f0
-; CHECK-NEXT:    mffprd r3, f0
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: ld_unalign16_uint64_t_double:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    plfd f0, 1(r3), 0
+; CHECK-P10-NEXT:    xscvdpuxds f0, f0
+; CHECK-P10-NEXT:    mffprd r3, f0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-PREP10-LABEL: ld_unalign16_uint64_t_double:
+; CHECK-PREP10:       # %bb.0: # %entry
+; CHECK-PREP10-NEXT:    lfd f0, 1(r3)
+; CHECK-PREP10-NEXT:    xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT:    mffprd r3, f0
+; CHECK-PREP10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
   %0 = bitcast i8* %add.ptr to double*
   %1 = load double, double* %0, align 8
   %conv = fptoui double %1 to i64
   ret i64 %conv
 }
 
entry:
   %conv = fptoui double %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_unalign32_uint64_t_double(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_unalign32_uint64_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 99999(r3), 0
 ; CHECK-P10-NEXT:    xscvdpuxds f0, f0
 ; CHECK-P10-NEXT:    mffprd r3, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_double:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    ori r4, r4, 34463
 ; CHECK-PREP10-NEXT:    lfdx f0, r3, r4
 ; CHECK-PREP10-NEXT:    xscvdpuxds f0, f0
 ; CHECK-PREP10-NEXT:    mffprd r3, f0
 ; CHECK-PREP10-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999
   %0 = bitcast i8* %add.ptr to double*
   %1 = load double, double* %0, align 8
   %conv = fptoui double %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_align32_uint64_t_double(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint64_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpuxds f0, f0
 ; CHECK-P10-NEXT:    mffprd r3, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint64_t_double:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
entry:
   %0 = inttoptr i64 %or to double*
   %1 = load double, double* %0, align 8
   %conv = fptoui double %1 to i64
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_unalign16_uint64_t_double(i64 %ptr) {
-; CHECK-LABEL: ld_disjoint_unalign16_uint64_t_double:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    rldicr r3, r3, 0, 51
-; CHECK-NEXT:    lfd f0, 6(r3)
-; CHECK-NEXT:    xscvdpuxds f0, f0
-; CHECK-NEXT:    mffprd r3, f0
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: ld_disjoint_unalign16_uint64_t_double:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT:    plfd f0, 6(r3), 0
+; CHECK-P10-NEXT:    xscvdpuxds f0, f0
+; CHECK-P10-NEXT:    mffprd r3, f0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-PREP10-LABEL: ld_disjoint_unalign16_uint64_t_double:
+; CHECK-PREP10:       # %bb.0: # %entry
+; CHECK-PREP10-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-PREP10-NEXT:    lfd f0, 6(r3)
+; CHECK-PREP10-NEXT:    xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT:    mffprd r3, f0
+; CHECK-PREP10-NEXT:    blr
 entry:
   %and = and i64 %ptr, -4096
   %or = or i64 %and, 6
   %0 = inttoptr i64 %or to double*
   %1 = load double, double* %0, align 8
   %conv = fptoui double %1 to i64
   ret i64 %conv
 }
entry:
   ret i64 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_unalign32_uint64_t_double(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 99999(r3), 0
 ; CHECK-P10-NEXT:    xscvdpuxds f0, f0
 ; CHECK-P10-NEXT:    mffprd r3, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_double:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1
 ; CHECK-PREP10-NEXT:    rldicr r3, r3, 0, 43

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local i64 @ld_disjoint_align32_uint64_t_double(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint64_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpuxds f0, f0
 ; CHECK-P10-NEXT:    mffprd r3, f0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
entry:
   store i8 %conv, i8* %add.ptr, align 1
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint64_t_uint8_t(i8* nocapture %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_align32_uint64_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stbx r4, r3, r5
+; CHECK-P10-NEXT:    pstb r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint64_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stbx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint64_t_uint8_t(i64 %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint64_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stbx r4, r3, r5
+; CHECK-P10-NEXT:    pstb r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store i16 %conv, i16* %0, align 2
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint64_t_uint16_t(i8* nocapture %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_align32_uint64_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint64_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    sthx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint64_t_uint16_t(i64 %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint64_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store i16 %conv, i16* %0, align 2
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint64_t_int16_t(i8* nocapture %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_align32_uint64_t_int16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint64_t_int16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    sthx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint64_t_int16_t(i64 %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint64_t_int16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_int16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store i32 %conv, i32* %0, align 4
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint64_t_uint32_t(i8* nocapture %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_align32_uint64_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint64_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stwx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint64_t_uint32_t(i64 %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint64_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store i64 %str, i64* %0, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint64_t_uint64_t(i8* nocapture %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_align32_uint64_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint64_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stdx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint64_t_uint64_t(i64 %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint64_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint64_t_float(i8* nocapture %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_align32_uint64_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprd f0, r4
-; CHECK-P10-NEXT:    pli r4, 99999000
 ; CHECK-P10-NEXT:    xscvuxdsp f0, f0
-; CHECK-P10-NEXT:    stfsx f0, r3, r4
+; CHECK-P10-NEXT:    pstfs f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_align32_uint64_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprd f0, r4
 ; CHECK-P9-NEXT:    lis r4, 1525
 ; CHECK-P9-NEXT:    xscvuxdsp f0, f0
 ; CHECK-P9-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint64_t_float(i64 %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint64_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprd f0, r4
 ; CHECK-P10-NEXT:    lis r5, -15264
-; CHECK-P10-NEXT:    pli r4, 999990000
 ; CHECK-P10-NEXT:    xscvuxdsp f0, f0
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    stfsx f0, r3, r4
+; CHECK-P10-NEXT:    pstfs f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprd f0, r4
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    xscvuxdsp f0, f0
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint64_t_double(i8* nocapture %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_align32_uint64_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprd f0, r4
-; CHECK-P10-NEXT:    pli r4, 99999000
 ; CHECK-P10-NEXT:    xscvuxddp f0, f0
-; CHECK-P10-NEXT:    stfdx f0, r3, r4
+; CHECK-P10-NEXT:    pstfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_align32_uint64_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprd f0, r4
 ; CHECK-P9-NEXT:    lis r4, 1525
 ; CHECK-P9-NEXT:    xscvuxddp f0, f0
 ; CHECK-P9-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint64_t_double(i64 %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint64_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprd f0, r4
 ; CHECK-P10-NEXT:    lis r5, -15264
-; CHECK-P10-NEXT:    pli r4, 999990000
 ; CHECK-P10-NEXT:    xscvuxddp f0, f0
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    stfdx f0, r3, r4
+; CHECK-P10-NEXT:    pstfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprd f0, r4
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    xscvuxddp f0, f0
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_int64_t_float(i8* nocapture %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_align32_int64_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprd f0, r4
-; CHECK-P10-NEXT:    pli r4, 99999000
 ; CHECK-P10-NEXT:    xscvsxdsp f0, f0
-; CHECK-P10-NEXT:    stfsx f0, r3, r4
+; CHECK-P10-NEXT:    pstfs f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_align32_int64_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprd f0, r4
 ; CHECK-P9-NEXT:    lis r4, 1525
 ; CHECK-P9-NEXT:    xscvsxdsp f0, f0
 ; CHECK-P9-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_int64_t_float(i64 %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int64_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprd f0, r4
 ; CHECK-P10-NEXT:    lis r5, -15264
-; CHECK-P10-NEXT:    pli r4, 999990000
 ; CHECK-P10-NEXT:    xscvsxdsp f0, f0
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    stfsx f0, r3, r4
+; CHECK-P10-NEXT:    pstfs f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int64_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprd f0, r4
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    xscvsxdsp f0, f0
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_int64_t_double(i8* nocapture %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_align32_int64_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprd f0, r4
-; CHECK-P10-NEXT:    pli r4, 99999000
 ; CHECK-P10-NEXT:    xscvsxddp f0, f0
-; CHECK-P10-NEXT:    stfdx f0, r3, r4
+; CHECK-P10-NEXT:    pstfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_align32_int64_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprd f0, r4
 ; CHECK-P9-NEXT:    lis r4, 1525
 ; CHECK-P9-NEXT:    xscvsxddp f0, f0
 ; CHECK-P9-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_int64_t_double(i64 %ptr, i64 %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int64_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprd f0, r4
 ; CHECK-P10-NEXT:    lis r5, -15264
-; CHECK-P10-NEXT:    pli r4, 999990000
 ; CHECK-P10-NEXT:    xscvsxddp f0, f0
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    stfdx f0, r3, r4
+; CHECK-P10-NEXT:    pstfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int64_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprd f0, r4
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    xscvsxddp f0, f0

llvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll

entry:
   %0 = load i8, i8* %add.ptr, align 1
   ret i8 %0
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i8 @ld_align32_int8_t_uint8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int8_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int8_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i8 @ld_disjoint_align32_int8_t_uint8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int8_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    extsb r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int8_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
entry:
   %conv = trunc i16 %1 to i8
   ret i8 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i8 @ld_align32_int8_t_uint16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LE-LABEL: ld_align32_int8_t_uint16_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
-; CHECK-P10-LE-NEXT:    pli r4, 99999000
-; CHECK-P10-LE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-LE-NEXT:    extsb r3, r3
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_align32_int8_t_uint16_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
-; CHECK-P10-BE-NEXT:    pli r4, 99999001
-; CHECK-P10-BE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT:    plbz r3, 99999001(r3), 0
 ; CHECK-P10-BE-NEXT:    extsb r3, r3
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_align32_int8_t_uint16_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, 1525
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 56600
 ; CHECK-P9-LE-NEXT:    lbzx r3, r3, r4

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i8 @ld_disjoint_align32_int8_t_uint16_t(i64 %ptr) {
 ; CHECK-P10-LE-LABEL: ld_disjoint_align32_int8_t_uint16_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    lis r4, -15264
 ; CHECK-P10-LE-NEXT:    and r3, r3, r4
-; CHECK-P10-LE-NEXT:    pli r4, 999990000
-; CHECK-P10-LE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-LE-NEXT:    extsb r3, r3
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_disjoint_align32_int8_t_uint16_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    lis r4, -15264
 ; CHECK-P10-BE-NEXT:    and r3, r3, r4
-; CHECK-P10-BE-NEXT:    pli r4, 999990001
-; CHECK-P10-BE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT:    plbz r3, 999990001(r3), 0
 ; CHECK-P10-BE-NEXT:    extsb r3, r3
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_disjoint_align32_int8_t_uint16_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, -15264
 ; CHECK-P9-LE-NEXT:    and r3, r3, r4
 ; CHECK-P9-LE-NEXT:    lis r4, 15258
entry:
   %conv = trunc i32 %1 to i8
   ret i8 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i8 @ld_align32_int8_t_uint32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LE-LABEL: ld_align32_int8_t_uint32_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
-; CHECK-P10-LE-NEXT:    pli r4, 99999000
-; CHECK-P10-LE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-LE-NEXT:    extsb r3, r3
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_align32_int8_t_uint32_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
-; CHECK-P10-BE-NEXT:    pli r4, 99999003
-; CHECK-P10-BE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT:    plbz r3, 99999003(r3), 0
 ; CHECK-P10-BE-NEXT:    extsb r3, r3
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_align32_int8_t_uint32_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, 1525
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 56600
 ; CHECK-P9-LE-NEXT:    lbzx r3, r3, r4

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i8 @ld_disjoint_align32_int8_t_uint32_t(i64 %ptr) {
 ; CHECK-P10-LE-LABEL: ld_disjoint_align32_int8_t_uint32_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    lis r4, -15264
 ; CHECK-P10-LE-NEXT:    and r3, r3, r4
-; CHECK-P10-LE-NEXT:    pli r4, 999990000
-; CHECK-P10-LE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-LE-NEXT:    extsb r3, r3
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_disjoint_align32_int8_t_uint32_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    lis r4, -15264
 ; CHECK-P10-BE-NEXT:    and r3, r3, r4
-; CHECK-P10-BE-NEXT:    pli r4, 999990003
-; CHECK-P10-BE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT:    plbz r3, 999990003(r3), 0
 ; CHECK-P10-BE-NEXT:    extsb r3, r3
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_disjoint_align32_int8_t_uint32_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, -15264
 ; CHECK-P9-LE-NEXT:    and r3, r3, r4
 ; CHECK-P9-LE-NEXT:    lis r4, 15258
entry:
   %conv = trunc i64 %1 to i8
   ret i8 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i8 @ld_align32_int8_t_uint64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LE-LABEL: ld_align32_int8_t_uint64_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
-; CHECK-P10-LE-NEXT:    pli r4, 99999000
-; CHECK-P10-LE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-LE-NEXT:    extsb r3, r3
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_align32_int8_t_uint64_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
-; CHECK-P10-BE-NEXT:    pli r4, 99999007
-; CHECK-P10-BE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT:    plbz r3, 99999007(r3), 0
 ; CHECK-P10-BE-NEXT:    extsb r3, r3
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_align32_int8_t_uint64_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, 1525
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 56600
 ; CHECK-P9-LE-NEXT:    lbzx r3, r3, r4

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i8 @ld_disjoint_align32_int8_t_uint64_t(i64 %ptr) {
 ; CHECK-P10-LE-LABEL: ld_disjoint_align32_int8_t_uint64_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    lis r4, -15264
 ; CHECK-P10-LE-NEXT:    and r3, r3, r4
-; CHECK-P10-LE-NEXT:    pli r4, 999990000
-; CHECK-P10-LE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-LE-NEXT:    extsb r3, r3
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_disjoint_align32_int8_t_uint64_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    lis r4, -15264
 ; CHECK-P10-BE-NEXT:    and r3, r3, r4
-; CHECK-P10-BE-NEXT:    pli r4, 999990007
-; CHECK-P10-BE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT:    plbz r3, 999990007(r3), 0
 ; CHECK-P10-BE-NEXT:    extsb r3, r3
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_disjoint_align32_int8_t_uint64_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, -15264
 ; CHECK-P9-LE-NEXT:    and r3, r3, r4
 ; CHECK-P9-LE-NEXT:    lis r4, 15258
entry:
   %conv = fptosi float %1 to i8
   ret i8 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i8 @ld_align32_int8_t_float(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int8_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfsx f0, r3, r4
+; CHECK-P10-NEXT:    plfs f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int8_t_float:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i8 @ld_disjoint_align32_int8_t_float(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int8_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfsx f0, r3, r4
+; CHECK-P10-NEXT:    plfs f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int8_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
entry:
   %conv = fptosi double %1 to i8
   ret i8 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i8 @ld_align32_int8_t_double(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_int8_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_int8_t_double:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local signext i8 @ld_disjoint_align32_int8_t_double(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_int8_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    extsw r3, r3
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_int8_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
entry:
   %0 = load i8, i8* %add.ptr, align 1
   ret i8 %0
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i8 @ld_align32_uint8_t_uint8_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint8_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint8_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525
 ; CHECK-PREP10-NEXT:    ori r4, r4, 56600
 ; CHECK-PREP10-NEXT:    lbzx r3, r3, r4
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint8_t(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint8_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint8_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712
entry:
   %conv = trunc i16 %1 to i8
   ret i8 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i8 @ld_align32_uint8_t_uint16_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LE-LABEL: ld_align32_uint8_t_uint16_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
-; CHECK-P10-LE-NEXT:    pli r4, 99999000
-; CHECK-P10-LE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_align32_uint8_t_uint16_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
-; CHECK-P10-BE-NEXT:    pli r4, 99999001
-; CHECK-P10-BE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT:    plbz r3, 99999001(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_align32_uint8_t_uint16_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, 1525
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 56600
 ; CHECK-P9-LE-NEXT:    lbzx r3, r3, r4
 ; CHECK-P9-LE-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint16_t(i64 %ptr) {
 ; CHECK-P10-LE-LABEL: ld_disjoint_align32_uint8_t_uint16_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    lis r4, -15264
 ; CHECK-P10-LE-NEXT:    and r3, r3, r4
-; CHECK-P10-LE-NEXT:    pli r4, 999990000
-; CHECK-P10-LE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_disjoint_align32_uint8_t_uint16_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    lis r4, -15264
 ; CHECK-P10-BE-NEXT:    and r3, r3, r4
-; CHECK-P10-BE-NEXT:    pli r4, 999990001
-; CHECK-P10-BE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT:    plbz r3, 999990001(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_disjoint_align32_uint8_t_uint16_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, -15264
 ; CHECK-P9-LE-NEXT:    and r3, r3, r4
 ; CHECK-P9-LE-NEXT:    lis r4, 15258
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 41712
entry:
   %conv = trunc i32 %1 to i8
   ret i8 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i8 @ld_align32_uint8_t_uint32_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LE-LABEL: ld_align32_uint8_t_uint32_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
-; CHECK-P10-LE-NEXT:    pli r4, 99999000
-; CHECK-P10-LE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_align32_uint8_t_uint32_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
-; CHECK-P10-BE-NEXT:    pli r4, 99999003
-; CHECK-P10-BE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT:    plbz r3, 99999003(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_align32_uint8_t_uint32_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, 1525
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 56600
 ; CHECK-P9-LE-NEXT:    lbzx r3, r3, r4
 ; CHECK-P9-LE-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint32_t(i64 %ptr) {
 ; CHECK-P10-LE-LABEL: ld_disjoint_align32_uint8_t_uint32_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    lis r4, -15264
 ; CHECK-P10-LE-NEXT:    and r3, r3, r4
-; CHECK-P10-LE-NEXT:    pli r4, 999990000
-; CHECK-P10-LE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_disjoint_align32_uint8_t_uint32_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    lis r4, -15264
 ; CHECK-P10-BE-NEXT:    and r3, r3, r4
-; CHECK-P10-BE-NEXT:    pli r4, 999990003
-; CHECK-P10-BE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT:    plbz r3, 999990003(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_disjoint_align32_uint8_t_uint32_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, -15264
 ; CHECK-P9-LE-NEXT:    and r3, r3, r4
 ; CHECK-P9-LE-NEXT:    lis r4, 15258
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 41712
entry:
   %conv = trunc i64 %1 to i8
   ret i8 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i8 @ld_align32_uint8_t_uint64_t(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LE-LABEL: ld_align32_uint8_t_uint64_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
-; CHECK-P10-LE-NEXT:    pli r4, 99999000
-; CHECK-P10-LE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT:    plbz r3, 99999000(r3), 0
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_align32_uint8_t_uint64_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
-; CHECK-P10-BE-NEXT:    pli r4, 99999007
-; CHECK-P10-BE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT:    plbz r3, 99999007(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_align32_uint8_t_uint64_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, 1525
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 56600
 ; CHECK-P9-LE-NEXT:    lbzx r3, r3, r4
 ; CHECK-P9-LE-NEXT:    blr

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint64_t(i64 %ptr) {
 ; CHECK-P10-LE-LABEL: ld_disjoint_align32_uint8_t_uint64_t:
 ; CHECK-P10-LE:       # %bb.0: # %entry
 ; CHECK-P10-LE-NEXT:    lis r4, -15264
 ; CHECK-P10-LE-NEXT:    and r3, r3, r4
-; CHECK-P10-LE-NEXT:    pli r4, 999990000
-; CHECK-P10-LE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT:    plbz r3, 999990000(r3), 0
 ; CHECK-P10-LE-NEXT:    blr
 ;
 ; CHECK-P10-BE-LABEL: ld_disjoint_align32_uint8_t_uint64_t:
 ; CHECK-P10-BE:       # %bb.0: # %entry
 ; CHECK-P10-BE-NEXT:    lis r4, -15264
 ; CHECK-P10-BE-NEXT:    and r3, r3, r4
-; CHECK-P10-BE-NEXT:    pli r4, 999990007
-; CHECK-P10-BE-NEXT:    lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT:    plbz r3, 999990007(r3), 0
 ; CHECK-P10-BE-NEXT:    blr
 ;
 ; CHECK-P9-LE-LABEL: ld_disjoint_align32_uint8_t_uint64_t:
 ; CHECK-P9-LE:       # %bb.0: # %entry
 ; CHECK-P9-LE-NEXT:    lis r4, -15264
 ; CHECK-P9-LE-NEXT:    and r3, r3, r4
 ; CHECK-P9-LE-NEXT:    lis r4, 15258
 ; CHECK-P9-LE-NEXT:    ori r4, r4, 41712
entry:
   %conv = fptoui float %1 to i8
   ret i8 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i8 @ld_align32_uint8_t_float(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint8_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfsx f0, r3, r4
+; CHECK-P10-NEXT:    plfs f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint8_t_float:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_float(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint8_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfsx f0, r3, r4
+; CHECK-P10-NEXT:    plfs f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint8_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
entry:
   %conv = fptoui double %1 to i8
   ret i8 %conv
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i8 @ld_align32_uint8_t_double(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_uint8_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: ld_align32_uint8_t_double:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r4, 1525

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_double(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_uint8_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lfdx f0, r3, r4
+; CHECK-P10-NEXT:    plfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    xscvdpsxws f0, f0
 ; CHECK-P10-NEXT:    mffprwz r3, f0
 ; CHECK-P10-NEXT:    clrldi r3, r3, 32
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_uint8_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
entry:
   store i8 %str, i8* %add.ptr, align 1
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint8_t_uint8_t(i8* nocapture %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint8_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stbx r4, r3, r5
+; CHECK-P10-NEXT:    pstb r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint8_t_uint8_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stbx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint8_t_uint8_t(i64 %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint8_t_uint8_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stbx r4, r3, r5
+; CHECK-P10-NEXT:    pstb r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint8_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store i16 %conv, i16* %0, align 2
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint8_t_uint16_t(i8* nocapture %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint8_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint8_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    sthx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint8_t_uint16_t(i64 %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint8_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store i32 %conv, i32* %0, align 4
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint8_t_uint32_t(i8* nocapture %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint8_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint8_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stwx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint8_t_uint32_t(i64 %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint8_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store i64 %conv, i64* %0, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint8_t_uint64_t(i8* nocapture %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint8_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_uint8_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stdx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint8_t_uint64_t(i64 %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint8_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint8_t_float(i8* nocapture %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint8_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwz f0, r4
-; CHECK-P10-NEXT:    pli r4, 99999000
 ; CHECK-P10-NEXT:    xscvuxdsp f0, f0
-; CHECK-P10-NEXT:    stfsx f0, r3, r4
+; CHECK-P10-NEXT:    pstfs f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_align32_uint8_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwz f0, r4
 ; CHECK-P9-NEXT:    lis r4, 1525
 ; CHECK-P9-NEXT:    xscvuxdsp f0, f0
 ; CHECK-P9-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint8_t_float(i64 %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint8_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwz f0, r4
 ; CHECK-P10-NEXT:    lis r5, -15264
-; CHECK-P10-NEXT:    pli r4, 999990000
 ; CHECK-P10-NEXT:    xscvuxdsp f0, f0
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    stfsx f0, r3, r4
+; CHECK-P10-NEXT:    pstfs f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwz f0, r4
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    xscvuxdsp f0, f0
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_uint8_t_double(i8* nocapture %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_align32_uint8_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwz f0, r4
-; CHECK-P10-NEXT:    pli r4, 99999000
 ; CHECK-P10-NEXT:    xscvuxddp f0, f0
-; CHECK-P10-NEXT:    stfdx f0, r3, r4
+; CHECK-P10-NEXT:    pstfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_align32_uint8_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwz f0, r4
 ; CHECK-P9-NEXT:    lis r4, 1525
 ; CHECK-P9-NEXT:    xscvuxddp f0, f0
 ; CHECK-P9-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_uint8_t_double(i64 %ptr, i8 zeroext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_uint8_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwz f0, r4
 ; CHECK-P10-NEXT:    lis r5, -15264
-; CHECK-P10-NEXT:    pli r4, 999990000
 ; CHECK-P10-NEXT:    xscvuxddp f0, f0
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    stfdx f0, r3, r4
+; CHECK-P10-NEXT:    pstfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwz f0, r4
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    xscvuxddp f0, f0
entry:
   store i16 %conv, i16* %0, align 2
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_int8_t_uint16_t(i8* nocapture %ptr, i8 signext %str) {
 ; CHECK-P10-LABEL: st_align32_int8_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_int8_t_uint16_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    sthx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_int8_t_uint16_t(i64 %ptr, i8 signext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int8_t_uint16_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    sthx r4, r3, r5
+; CHECK-P10-NEXT:    psth r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint16_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store i32 %conv, i32* %0, align 4
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_int8_t_uint32_t(i8* nocapture %ptr, i8 signext %str) {
 ; CHECK-P10-LABEL: st_align32_int8_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_int8_t_uint32_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stwx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_int8_t_uint32_t(i64 %ptr, i8 signext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int8_t_uint32_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stwx r4, r3, r5
+; CHECK-P10-NEXT:    pstw r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint32_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   store i64 %conv, i64* %0, align 8
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_int8_t_uint64_t(i8* nocapture %ptr, i8 signext %str) {
 ; CHECK-P10-LABEL: st_align32_int8_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r5, 99999000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-PREP10-LABEL: st_align32_int8_t_uint64_t:
 ; CHECK-PREP10:       # %bb.0: # %entry
 ; CHECK-PREP10-NEXT:    lis r5, 1525
 ; CHECK-PREP10-NEXT:    ori r5, r5, 56600
 ; CHECK-PREP10-NEXT:    stdx r4, r3, r5
 ; CHECK-PREP10-NEXT:    blr

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_int8_t_uint64_t(i64 %ptr, i8 signext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int8_t_uint64_t:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r5, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    pli r5, 999990000
-; CHECK-P10-NEXT:    stdx r4, r3, r5
+; CHECK-P10-NEXT:    pstd r4, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint64_t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r5
 ; CHECK-P9-NEXT:    lis r5, 15258
 ; CHECK-P9-NEXT:    ori r5, r5, 41712
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_int8_t_float(i8* nocapture %ptr, i8 signext %str) {
 ; CHECK-P10-LABEL: st_align32_int8_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwa f0, r4
-; CHECK-P10-NEXT:    pli r4, 99999000
 ; CHECK-P10-NEXT:    xscvsxdsp f0, f0
-; CHECK-P10-NEXT:    stfsx f0, r3, r4
+; CHECK-P10-NEXT:    pstfs f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_align32_int8_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwa f0, r4
 ; CHECK-P9-NEXT:    lis r4, 1525
 ; CHECK-P9-NEXT:    xscvsxdsp f0, f0
 ; CHECK-P9-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_int8_t_float(i64 %ptr, i8 signext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int8_t_float:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwa f0, r4
 ; CHECK-P10-NEXT:    lis r5, -15264
-; CHECK-P10-NEXT:    pli r4, 999990000
 ; CHECK-P10-NEXT:    xscvsxdsp f0, f0
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    stfsx f0, r3, r4
+; CHECK-P10-NEXT:    pstfs f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int8_t_float:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwa f0, r4
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    xscvsxdsp f0, f0
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_int8_t_double(i8* nocapture %ptr, i8 signext %str) {
 ; CHECK-P10-LABEL: st_align32_int8_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwa f0, r4
-; CHECK-P10-NEXT:    pli r4, 99999000
 ; CHECK-P10-NEXT:    xscvsxddp f0, f0
-; CHECK-P10-NEXT:    stfdx f0, r3, r4
+; CHECK-P10-NEXT:    pstfd f0, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_align32_int8_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwa f0, r4
 ; CHECK-P9-NEXT:    lis r4, 1525
 ; CHECK-P9-NEXT:    xscvsxddp f0, f0
 ; CHECK-P9-NEXT:    ori r4, r4, 56600

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_int8_t_double(i64 %ptr, i8 signext %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_int8_t_double:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    mtfprwa f0, r4
 ; CHECK-P10-NEXT:    lis r5, -15264
-; CHECK-P10-NEXT:    pli r4, 999990000
 ; CHECK-P10-NEXT:    xscvsxddp f0, f0
 ; CHECK-P10-NEXT:    and r3, r3, r5
-; CHECK-P10-NEXT:    stfdx f0, r3, r4
+; CHECK-P10-NEXT:    pstfd f0, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_int8_t_double:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mtfprwa f0, r4
 ; CHECK-P9-NEXT:    lis r5, -15264
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    xscvsxddp f0, f0

llvm/test/CodeGen/PowerPC/vec_insert_elt.ll

entry:
   %1 = load double, double* %0, align 8
   %vecins = insertelement <2 x double> %a, double %1, i32 0
   ret <2 x double> %vecins
 }
 
 define <2 x double> @testDoubleImm4(<2 x double> %a, i32* %b) {
 ; CHECK-LABEL: testDoubleImm4:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    lis r3, 4
-; CHECK-NEXT:    lfdx f0, r5, r3
+; CHECK-NEXT:    plfd f0, 262144(r5), 0
 ; CHECK-NEXT:    xxmrghd v2, v2, vs0
 ; CHECK-NEXT:    blr
 ;
 ; CHECK-BE-LABEL: testDoubleImm4:
 ; CHECK-BE:       # %bb.0: # %entry
-; CHECK-BE-NEXT:    lis r3, 4
-; CHECK-BE-NEXT:    lfdx f0, r5, r3
+; CHECK-BE-NEXT:    plfd f0, 262144(r5), 0
 ; CHECK-BE-NEXT:    xxpermdi v2, vs0, v2, 1
 ; CHECK-BE-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: testDoubleImm4:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r3, 4
 ; CHECK-P9-NEXT:    lfdx f0, r5, r3
 ; CHECK-P9-NEXT:    xxpermdi v2, vs0, v2, 1

llvm/test/CodeGen/PowerPC/vector-ldst.ll

 entry:
   %0 = inttoptr i64 %ptr to <16 x i8>*
   %1 = load <16 x i8>, <16 x i8>* %0, align 16
   ret <16 x i8> %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local <16 x i8> @ld_unalign16_vector(i8* nocapture readonly %ptr) {
-; CHECK-LABEL: ld_unalign16_vector:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    li r4, 1
-; CHECK-NEXT:    lxvx v2, r3, r4
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: ld_unalign16_vector:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    plxv v2, 1(r3), 0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-P9-LABEL: ld_unalign16_vector:
+; CHECK-P9:       # %bb.0: # %entry
+; CHECK-P9-NEXT:    li r4, 1
+; CHECK-P9-NEXT:    lxvx v2, r3, r4
+; CHECK-P9-NEXT:    blr
 ;
 ; CHECK-P8-LE-LABEL: ld_unalign16_vector:
 ; CHECK-P8-LE:       # %bb.0: # %entry
 ; CHECK-P8-LE-NEXT:    addi r3, r3, 1
 ; CHECK-P8-LE-NEXT:    lvx v2, 0, r3
 ; CHECK-P8-LE-NEXT:    blr
 ;
 ; CHECK-P8-BE-LABEL: ld_unalign16_vector:
 ; CHECK-P8-BE:       # %bb.0: # %entry
 ; CHECK-P8-BE-NEXT:    addi r3, r3, 1
 ; CHECK-P8-BE-NEXT:    lxvw4x v2, 0, r3
 ; CHECK-P8-BE-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
   %0 = bitcast i8* %add.ptr to <16 x i8>*
   %1 = load <16 x i8>, <16 x i8>* %0, align 16
   ret <16 x i8> %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local <16 x i8> @ld_align16_vector(i8* nocapture readonly %ptr) {
-; CHECK-LABEL: ld_align16_vector:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    li r4, 8
-; CHECK-NEXT:    lxvx v2, r3, r4
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: ld_align16_vector:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    plxv v2, 8(r3), 0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-P9-LABEL: ld_align16_vector:
+; CHECK-P9:       # %bb.0: # %entry
+; CHECK-P9-NEXT:    li r4, 8
+; CHECK-P9-NEXT:    lxvx v2, r3, r4
+; CHECK-P9-NEXT:    blr
 ;
 ; CHECK-P8-LE-LABEL: ld_align16_vector:
 ; CHECK-P8-LE:       # %bb.0: # %entry
 ; CHECK-P8-LE-NEXT:    addi r3, r3, 8
 ; CHECK-P8-LE-NEXT:    lvx v2, 0, r3
 ; CHECK-P8-LE-NEXT:    blr
 ;
 ; CHECK-P8-BE-LABEL: ld_align16_vector:
 ; CHECK-P8-BE:       # %bb.0: # %entry
 ; CHECK-P8-BE-NEXT:    addi r3, r3, 8
 ; CHECK-P8-BE-NEXT:    lxvw4x v2, 0, r3
 ; CHECK-P8-BE-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
   %0 = bitcast i8* %add.ptr to <16 x i8>*
   %1 = load <16 x i8>, <16 x i8>* %0, align 16
   ret <16 x i8> %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local <16 x i8> @ld_unalign32_vector(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_unalign32_vector:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lxvx v2, r3, r4
+; CHECK-P10-NEXT:    plxv v2, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_unalign32_vector:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, 1
 ; CHECK-P9-NEXT:    ori r4, r4, 34463
 ; CHECK-P9-NEXT:    lxvx v2, r3, r4
 ; CHECK-P9-NEXT:    blr
entry:
   %1 = load <16 x i8>, <16 x i8>* %0, align 16
   ret <16 x i8> %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local <16 x i8> @ld_align32_vector(i8* nocapture readonly %ptr) {
 ; CHECK-P10-LABEL: ld_align32_vector:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    lxvx v2, r3, r4
+; CHECK-P10-NEXT:    plxv v2, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_align32_vector:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, 1525
 ; CHECK-P9-NEXT:    ori r4, r4, 56600
 ; CHECK-P9-NEXT:    lxvx v2, r3, r4
 ; CHECK-P9-NEXT:    blr
entry:
   %or = or i64 %ptr, 6
   %0 = inttoptr i64 %or to <16 x i8>*
   %1 = load <16 x i8>, <16 x i8>* %0, align 16
   ret <16 x i8> %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local <16 x i8> @ld_disjoint_unalign16_vector(i64 %ptr) {
-; CHECK-LABEL: ld_disjoint_unalign16_vector:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    rldicr r3, r3, 0, 51
-; CHECK-NEXT:    li r4, 6
-; CHECK-NEXT:    lxvx v2, r3, r4
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: ld_disjoint_unalign16_vector:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT:    plxv v2, 6(r3), 0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-P9-LABEL: ld_disjoint_unalign16_vector:
+; CHECK-P9:       # %bb.0: # %entry
+; CHECK-P9-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-P9-NEXT:    li r4, 6
+; CHECK-P9-NEXT:    lxvx v2, r3, r4
+; CHECK-P9-NEXT:    blr
 ;
 ; CHECK-P8-LE-LABEL: ld_disjoint_unalign16_vector:
 ; CHECK-P8-LE:       # %bb.0: # %entry
 ; CHECK-P8-LE-NEXT:    rldicr r3, r3, 0, 51
 ; CHECK-P8-LE-NEXT:    ori r3, r3, 6
 ; CHECK-P8-LE-NEXT:    lvx v2, 0, r3
 ; CHECK-P8-LE-NEXT:    blr
 ;
 ; CHECK-P8-BE-LABEL: ld_disjoint_unalign16_vector:
 ; CHECK-P8-BE:       # %bb.0: # %entry
 ; CHECK-P8-BE-NEXT:    rldicr r3, r3, 0, 51
 ; CHECK-P8-BE-NEXT:    ori r3, r3, 6
 ; CHECK-P8-BE-NEXT:    lxvw4x v2, 0, r3
 ; CHECK-P8-BE-NEXT:    blr
 entry:
   %and = and i64 %ptr, -4096
   %or = or i64 %and, 6
   %0 = inttoptr i64 %or to <16 x i8>*
   %1 = load <16 x i8>, <16 x i8>* %0, align 16
   ret <16 x i8> %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local <16 x i8> @ld_disjoint_align16_vector(i64 %ptr) {
-; CHECK-LABEL: ld_disjoint_align16_vector:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    rldicr r3, r3, 0, 51
-; CHECK-NEXT:    li r4, 24
-; CHECK-NEXT:    lxvx v2, r3, r4
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: ld_disjoint_align16_vector:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT:    plxv v2, 24(r3), 0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-P9-LABEL: ld_disjoint_align16_vector:
+; CHECK-P9:       # %bb.0: # %entry
+; CHECK-P9-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-P9-NEXT:    li r4, 24
+; CHECK-P9-NEXT:    lxvx v2, r3, r4
+; CHECK-P9-NEXT:    blr
 ;
 ; CHECK-P8-LE-LABEL: ld_disjoint_align16_vector:
 ; CHECK-P8-LE:       # %bb.0: # %entry
 ; CHECK-P8-LE-NEXT:    rldicr r3, r3, 0, 51
 ; CHECK-P8-LE-NEXT:    ori r3, r3, 24
 ; CHECK-P8-LE-NEXT:    lvx v2, 0, r3
 ; CHECK-P8-LE-NEXT:    blr
 ;
entry:
   ret <16 x i8> %1
 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local <16 x i8> @ld_disjoint_unalign32_vector(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_unalign32_vector:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    lxvx v2, r3, r4
+; CHECK-P10-NEXT:    plxv v2, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_unalign32_vector:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, 1
 ; CHECK-P9-NEXT:    rldicr r3, r3, 0, 43
 ; CHECK-P9-NEXT:    ori r4, r4, 34463
 ; CHECK-P9-NEXT:    lxvx v2, r3, r4

 }
 
 ; Function Attrs: norecurse nounwind readonly uwtable willreturn
 define dso_local <16 x i8> @ld_disjoint_align32_vector(i64 %ptr) {
 ; CHECK-P10-LABEL: ld_disjoint_align32_vector:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    lxvx v2, r3, r4
+; CHECK-P10-NEXT:    plxv v2, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: ld_disjoint_align32_vector:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712

 entry:
   %0 = inttoptr i64 %ptr to <16 x i8>*
   store <16 x i8> %str, <16 x i8>* %0, align 16
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_unalign16_vector(i8* nocapture %ptr, <16 x i8> %str) {
-; CHECK-LABEL: st_unalign16_vector:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    li r4, 1
-; CHECK-NEXT:    stxvx v2, r3, r4
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: st_unalign16_vector:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    pstxv v2, 1(r3), 0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-P9-LABEL: st_unalign16_vector:
+; CHECK-P9:       # %bb.0: # %entry
+; CHECK-P9-NEXT:    li r4, 1
+; CHECK-P9-NEXT:    stxvx v2, r3, r4
+; CHECK-P9-NEXT:    blr
 ;
 ; CHECK-P8-LE-LABEL: st_unalign16_vector:
 ; CHECK-P8-LE:       # %bb.0: # %entry
 ; CHECK-P8-LE-NEXT:    addi r3, r3, 1
 ; CHECK-P8-LE-NEXT:    stvx v2, 0, r3
 ; CHECK-P8-LE-NEXT:    blr
 ;
 ; CHECK-P8-BE-LABEL: st_unalign16_vector:
 ; CHECK-P8-BE:       # %bb.0: # %entry
 ; CHECK-P8-BE-NEXT:    addi r3, r3, 1
 ; CHECK-P8-BE-NEXT:    stxvw4x v2, 0, r3
 ; CHECK-P8-BE-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
   %0 = bitcast i8* %add.ptr to <16 x i8>*
   store <16 x i8> %str, <16 x i8>* %0, align 16
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align16_vector(i8* nocapture %ptr, <16 x i8> %str) {
-; CHECK-LABEL: st_align16_vector:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    li r4, 8
-; CHECK-NEXT:    stxvx v2, r3, r4
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: st_align16_vector:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    pstxv v2, 8(r3), 0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-P9-LABEL: st_align16_vector:
+; CHECK-P9:       # %bb.0: # %entry
+; CHECK-P9-NEXT:    li r4, 8
+; CHECK-P9-NEXT:    stxvx v2, r3, r4
+; CHECK-P9-NEXT:    blr
 ;
 ; CHECK-P8-LE-LABEL: st_align16_vector:
 ; CHECK-P8-LE:       # %bb.0: # %entry
 ; CHECK-P8-LE-NEXT:    addi r3, r3, 8
 ; CHECK-P8-LE-NEXT:    stvx v2, 0, r3
 ; CHECK-P8-LE-NEXT:    blr
 ;
 ; CHECK-P8-BE-LABEL: st_align16_vector:
 ; CHECK-P8-BE:       # %bb.0: # %entry
 ; CHECK-P8-BE-NEXT:    addi r3, r3, 8
 ; CHECK-P8-BE-NEXT:    stxvw4x v2, 0, r3
 ; CHECK-P8-BE-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
   %0 = bitcast i8* %add.ptr to <16 x i8>*
   store <16 x i8> %str, <16 x i8>* %0, align 16
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_unalign32_vector(i8* nocapture %ptr, <16 x i8> %str) {
 ; CHECK-P10-LABEL: st_unalign32_vector:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    stxvx v2, r3, r4
+; CHECK-P10-NEXT:    pstxv v2, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_unalign32_vector:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, 1
 ; CHECK-P9-NEXT:    ori r4, r4, 34463
 ; CHECK-P9-NEXT:    stxvx v2, r3, r4
 ; CHECK-P9-NEXT:    blr
entry:
   store <16 x i8> %str, <16 x i8>* %0, align 16
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_align32_vector(i8* nocapture %ptr, <16 x i8> %str) {
 ; CHECK-P10-LABEL: st_align32_vector:
 ; CHECK-P10:       # %bb.0: # %entry
-; CHECK-P10-NEXT:    pli r4, 99999000
-; CHECK-P10-NEXT:    stxvx v2, r3, r4
+; CHECK-P10-NEXT:    pstxv v2, 99999000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_align32_vector:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, 1525
 ; CHECK-P9-NEXT:    ori r4, r4, 56600
 ; CHECK-P9-NEXT:    stxvx v2, r3, r4
 ; CHECK-P9-NEXT:    blr
entry:
   %or = or i64 %ptr, 6
   %0 = inttoptr i64 %or to <16 x i8>*
   store <16 x i8> %str, <16 x i8>* %0, align 16
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_unalign16_vector(i64 %ptr, <16 x i8> %str) {
-; CHECK-LABEL: st_disjoint_unalign16_vector:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    rldicr r3, r3, 0, 51
-; CHECK-NEXT:    li r4, 6
-; CHECK-NEXT:    stxvx v2, r3, r4
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: st_disjoint_unalign16_vector:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT:    pstxv v2, 6(r3), 0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-P9-LABEL: st_disjoint_unalign16_vector:
+; CHECK-P9:       # %bb.0: # %entry
+; CHECK-P9-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-P9-NEXT:    li r4, 6
+; CHECK-P9-NEXT:    stxvx v2, r3, r4
+; CHECK-P9-NEXT:    blr
 ;
 ; CHECK-P8-LE-LABEL: st_disjoint_unalign16_vector:
 ; CHECK-P8-LE:       # %bb.0: # %entry
 ; CHECK-P8-LE-NEXT:    rldicr r3, r3, 0, 51
 ; CHECK-P8-LE-NEXT:    ori r3, r3, 6
 ; CHECK-P8-LE-NEXT:    stvx v2, 0, r3
 ; CHECK-P8-LE-NEXT:    blr
 ;
 ; CHECK-P8-BE-LABEL: st_disjoint_unalign16_vector:
 ; CHECK-P8-BE:       # %bb.0: # %entry
 ; CHECK-P8-BE-NEXT:    rldicr r3, r3, 0, 51
 ; CHECK-P8-BE-NEXT:    ori r3, r3, 6
 ; CHECK-P8-BE-NEXT:    stxvw4x v2, 0, r3
 ; CHECK-P8-BE-NEXT:    blr
 entry:
   %and = and i64 %ptr, -4096
   %or = or i64 %and, 6
   %0 = inttoptr i64 %or to <16 x i8>*
   store <16 x i8> %str, <16 x i8>* %0, align 16
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align16_vector(i64 %ptr, <16 x i8> %str) {
-; CHECK-LABEL: st_disjoint_align16_vector:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    rldicr r3, r3, 0, 51
-; CHECK-NEXT:    li r4, 24
-; CHECK-NEXT:    stxvx v2, r3, r4
-; CHECK-NEXT:    blr
+; CHECK-P10-LABEL: st_disjoint_align16_vector:
+; CHECK-P10:       # %bb.0: # %entry
+; CHECK-P10-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT:    pstxv v2, 24(r3), 0
+; CHECK-P10-NEXT:    blr
+;
+; CHECK-P9-LABEL: st_disjoint_align16_vector:
+; CHECK-P9:       # %bb.0: # %entry
+; CHECK-P9-NEXT:    rldicr r3, r3, 0, 51
+; CHECK-P9-NEXT:    li r4, 24
+; CHECK-P9-NEXT:    stxvx v2, r3, r4
+; CHECK-P9-NEXT:    blr
 ;
 ; CHECK-P8-LE-LABEL: st_disjoint_align16_vector:
 ; CHECK-P8-LE:       # %bb.0: # %entry
 ; CHECK-P8-LE-NEXT:    rldicr r3, r3, 0, 51
 ; CHECK-P8-LE-NEXT:    ori r3, r3, 24
 ; CHECK-P8-LE-NEXT:    stvx v2, 0, r3
 ; CHECK-P8-LE-NEXT:    blr
 ;
entry:
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_unalign32_vector(i64 %ptr, <16 x i8> %str) {
 ; CHECK-P10-LABEL: st_disjoint_unalign32_vector:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT:    pli r4, 99999
-; CHECK-P10-NEXT:    stxvx v2, r3, r4
+; CHECK-P10-NEXT:    pstxv v2, 99999(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_unalign32_vector:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, 1
 ; CHECK-P9-NEXT:    rldicr r3, r3, 0, 43
 ; CHECK-P9-NEXT:    ori r4, r4, 34463
 ; CHECK-P9-NEXT:    stxvx v2, r3, r4

 }
 
 ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
 define dso_local void @st_disjoint_align32_vector(i64 %ptr, <16 x i8> %str) {
 ; CHECK-P10-LABEL: st_disjoint_align32_vector:
 ; CHECK-P10:       # %bb.0: # %entry
 ; CHECK-P10-NEXT:    lis r4, -15264
 ; CHECK-P10-NEXT:    and r3, r3, r4
-; CHECK-P10-NEXT:    pli r4, 999990000
-; CHECK-P10-NEXT:    stxvx v2, r3, r4
+; CHECK-P10-NEXT:    pstxv v2, 999990000(r3), 0
 ; CHECK-P10-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: st_disjoint_align32_vector:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    lis r4, -15264
 ; CHECK-P9-NEXT:    and r3, r3, r4
 ; CHECK-P9-NEXT:    lis r4, 15258
 ; CHECK-P9-NEXT:    ori r4, r4, 41712