[CUDA, NVPTX] Allow targeting sm_86 GPUs.

[tra]

Summary

The patch only plumbs through the option necessary for targeting sm_86 GPUs w/o adding any new functionality.

[jdoerfert]

One nit below. Seems reasonable in general.

So we add ptx72 but it's not used with sm_86, interesting.

clang/lib/Driver/ToolChains/Cuda.cpp

103

leftover?

[tra]

Removed debug printout

[tra]

So we add ptx72 but it's not used with sm_86, interesting.

ptx71 is the minimum/default requited PTX version for sm_86. If we compile with CUDA-11.2, clang will set the '+ptx72' as we may potentially need it in order to link in libdevice bitcode or if source code (e.g CUDA headers) has inline asm with instructions supported by CUDA-11.2.

[jdoerfert]

In D95974#2540352, @tra wrote:

So we add ptx72 but it's not used with sm_86, interesting.

ptx71 is the minimum/default requited PTX version for sm_86. If we compile with CUDA-11.2, clang will set the '+ptx72' as we may potentially need it in order to link in libdevice bitcode or if source code (e.g CUDA headers) has inline asm with instructions supported by CUDA-11.2.

I see, thanks :)

clang/include/clang/Basic/BuiltinsNVPTX.def

 #if defined(BUILTIN) && !defined(TARGET_BUILTIN)
 #   define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS)
 #endif
 
 #pragma push_macro("SM_70")
 #pragma push_macro("SM_72")
 #pragma push_macro("SM_75")
 #pragma push_macro("SM_80")
-#define SM_80 "sm_80"
+#pragma push_macro("SM_86")
+#define SM_86 "sm_86"
+#define SM_80 "sm_80|" SM_86
 #define SM_75 "sm_75|" SM_80
 #define SM_72 "sm_72|" SM_75
 #define SM_70 "sm_70|" SM_72
 
 #pragma push_macro("SM_60")
 #define SM_60 "sm_60|sm_61|sm_62|" SM_70
 
 #pragma push_macro("PTX60")
 #pragma push_macro("PTX61")
 #pragma push_macro("PTX63")
 #pragma push_macro("PTX64")
 #pragma push_macro("PTX65")
 #pragma push_macro("PTX70")
-#define PTX70 "ptx70"
+#pragma push_macro("PTX71")
+#define PTX71 "ptx71"
+#define PTX70 "ptx70|" PTX71
 #define PTX65 "ptx65|" PTX70
 #define PTX64 "ptx64|" PTX65
 #define PTX63 "ptx63|" PTX64
 #define PTX61 "ptx61|" PTX63
 #define PTX60 "ptx60|" PTX61
 
 #pragma push_macro("AND")
 #define AND(a, b) "(" a "),(" b ")"

 #undef BUILTIN
 #undef TARGET_BUILTIN
 #pragma pop_macro("AND")
 #pragma pop_macro("SM_60")
 #pragma pop_macro("SM_70")
 #pragma pop_macro("SM_72")
 #pragma pop_macro("SM_75")
 #pragma pop_macro("SM_80")
+#pragma pop_macro("SM_86")
 #pragma pop_macro("PTX60")
 #pragma pop_macro("PTX61")
 #pragma pop_macro("PTX63")
 #pragma pop_macro("PTX64")
 #pragma pop_macro("PTX65")
 #pragma pop_macro("PTX70")
+#pragma pop_macro("PTX71")

clang/include/clang/Basic/Cuda.h

enum class CudaVersion {
   CUDA_80,
   CUDA_90,
   CUDA_91,
   CUDA_92,
   CUDA_100,
   CUDA_101,
   CUDA_102,
   CUDA_110,
-  LATEST = CUDA_110,
+  CUDA_111,
+  CUDA_112,
+  LATEST = CUDA_112,
   LATEST_SUPPORTED = CUDA_101,
 };
 const char *CudaVersionToString(CudaVersion V);
 // Input is "Major.Minor"
 CudaVersion CudaStringToVersion(const llvm::Twine &S);
 
 enum class CudaArch {
   UNUSED,
enum class CudaArch {
   SM_53,
   SM_60,
   SM_61,
   SM_62,
   SM_70,
   SM_72,
   SM_75,
   SM_80,
+  SM_86,
   GFX600,
   GFX601,
   GFX602,
   GFX700,
   GFX701,
   GFX702,
   GFX703,
   GFX704,

clang/lib/Basic/Cuda.cpp

const char *CudaVersionToString(CudaVersion V) {
   case CudaVersion::CUDA_100:
     return "10.0";
   case CudaVersion::CUDA_101:
     return "10.1";
   case CudaVersion::CUDA_102:
     return "10.2";
   case CudaVersion::CUDA_110:
     return "11.0";
+  case CudaVersion::CUDA_111:
+    return "11.1";
+  case CudaVersion::CUDA_112:
+    return "11.2";
   }
   llvm_unreachable("invalid enum");
 }
 
 CudaVersion CudaStringToVersion(const llvm::Twine &S) {
   return llvm::StringSwitch<CudaVersion>(S.str())
       .Case("7.0", CudaVersion::CUDA_70)
       .Case("7.5", CudaVersion::CUDA_75)
       .Case("8.0", CudaVersion::CUDA_80)
       .Case("9.0", CudaVersion::CUDA_90)
       .Case("9.1", CudaVersion::CUDA_91)
       .Case("9.2", CudaVersion::CUDA_92)
       .Case("10.0", CudaVersion::CUDA_100)
       .Case("10.1", CudaVersion::CUDA_101)
       .Case("10.2", CudaVersion::CUDA_102)
       .Case("11.0", CudaVersion::CUDA_110)
+      .Case("11.1", CudaVersion::CUDA_111)
+      .Case("11.2", CudaVersion::CUDA_112)
       .Default(CudaVersion::UNKNOWN);
 }
 
 struct CudaArchToStringMap {
   CudaArch arch;
   const char *arch_name;
   const char *virtual_arch_name;
 };
 
 #define SM2(sm, ca)                                                            \
   { CudaArch::SM_##sm, "sm_" #sm, ca }
 #define SM(sm) SM2(sm, "compute_" #sm)
 #define GFX(gpu)                                                               \
   { CudaArch::GFX##gpu, "gfx" #gpu, "compute_amdgcn" }
 CudaArchToStringMap arch_names[] = {
     // clang-format off
     {CudaArch::UNUSED, "", ""},
     SM2(20, "compute_20"), SM2(21, "compute_20"), // Fermi
     SM(30), SM(32), SM(35), SM(37),  // Kepler
     SM(50), SM(52), SM(53),          // Maxwell
     SM(60), SM(61), SM(62),          // Pascal
     SM(70), SM(72),                  // Volta
     SM(75),                          // Turing
-    SM(80),                          // Ampere
+    SM(80), SM(86),                  // Ampere
     GFX(600),  // gfx600
     GFX(601),  // gfx601
     GFX(602),  // gfx602
     GFX(700),  // gfx700
     GFX(701),  // gfx701
     GFX(702),  // gfx702
     GFX(703),  // gfx703
     GFX(704),  // gfx704
CudaVersion MinVersionForCudaArch(CudaArch A) {
   case CudaArch::SM_70:
     return CudaVersion::CUDA_90;
   case CudaArch::SM_72:
     return CudaVersion::CUDA_91;
   case CudaArch::SM_75:
     return CudaVersion::CUDA_100;
   case CudaArch::SM_80:
     return CudaVersion::CUDA_110;
+  case CudaArch::SM_86:
+    return CudaVersion::CUDA_111;
   default:
     llvm_unreachable("invalid enum");
   }
 }
 
 CudaVersion MaxVersionForCudaArch(CudaArch A) {
   // AMD GPUs do not depend on CUDA versions.
   if (IsAMDGpuArch(A))
CudaVersion ToCudaVersion(llvm::VersionTuple Version) {
   case 100:
     return CudaVersion::CUDA_100;
   case 101:
     return CudaVersion::CUDA_101;
   case 102:
     return CudaVersion::CUDA_102;
   case 110:
     return CudaVersion::CUDA_110;
+  case 111:
+    return CudaVersion::CUDA_111;
+  case 112:
+    return CudaVersion::CUDA_112;
   default:
     return CudaVersion::UNKNOWN;
   }
 }
 
 bool CudaFeatureEnabled(llvm::VersionTuple  Version, CudaFeature Feature) {
   return CudaFeatureEnabled(ToCudaVersion(Version), Feature);
 }

clang/lib/Basic/Targets/NVPTX.cpp

NVPTXTargetInfo::NVPTXTargetInfo(const llvm::Triple &Triple,
   assert((TargetPointerWidth == 32 || TargetPointerWidth == 64) &&
          "NVPTX only supports 32- and 64-bit modes.");
 
   PTXVersion = 32;
   for (const StringRef Feature : Opts.FeaturesAsWritten) {
     if (!Feature.startswith("+ptx"))
       continue;
     PTXVersion = llvm::StringSwitch<unsigned>(Feature)
+                     .Case("+ptx72", 72)
+                     .Case("+ptx71", 71)
                      .Case("+ptx70", 70)
                      .Case("+ptx65", 65)
                      .Case("+ptx64", 64)
                      .Case("+ptx63", 63)
                      .Case("+ptx61", 61)
                      .Case("+ptx60", 60)
                      .Case("+ptx50", 50)
                      .Case("+ptx43", 43)
std::string CUDAArchCode = [this] {
       case CudaArch::SM_70:
         return "700";
       case CudaArch::SM_72:
         return "720";
       case CudaArch::SM_75:
         return "750";
       case CudaArch::SM_80:
         return "800";
+      case CudaArch::SM_86:
+        return "860";
       }
       llvm_unreachable("unhandled CudaArch");
     }();
     Builder.defineMacro("__CUDA_ARCH__", CUDAArchCode);
   }
 }
 
 ArrayRef<Builtin::Info> NVPTXTargetInfo::getTargetBuiltins() const {
   return llvm::makeArrayRef(BuiltinInfo, clang::NVPTX::LastTSBuiltin -
                                              Builtin::FirstTSBuiltin);
 }

clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp

if (Clause->getClauseKind() == OMPC_unified_shared_memory) {
             << " does not support unified addressing";
         CGM.Error(Clause->getBeginLoc(), Out.str());
         return;
       }
       case CudaArch::SM_70:
       case CudaArch::SM_72:
       case CudaArch::SM_75:
       case CudaArch::SM_80:
+      case CudaArch::SM_86:
       case CudaArch::GFX600:
       case CudaArch::GFX601:
       case CudaArch::GFX602:
       case CudaArch::GFX700:
       case CudaArch::GFX701:
       case CudaArch::GFX702:
       case CudaArch::GFX703:
       case CudaArch::GFX704:
static std::pair<unsigned, unsigned> getSMsBlocksPerSM(CodeGenModule &CGM) {
   case CudaArch::SM_60:
   case CudaArch::SM_61:
   case CudaArch::SM_62:
     return {56, 32};
   case CudaArch::SM_70:
   case CudaArch::SM_72:
   case CudaArch::SM_75:
   case CudaArch::SM_80:
+  case CudaArch::SM_86:
     return {84, 32};
   case CudaArch::GFX600:
   case CudaArch::GFX601:
   case CudaArch::GFX602:
   case CudaArch::GFX700:
   case CudaArch::GFX701:
   case CudaArch::GFX702:
   case CudaArch::GFX703:

clang/lib/Driver/ToolChains/Cuda.cpp

CudaVersion getCudaVersion(uint32_t raw_version) {
   if (raw_version < 10010)
     return CudaVersion::CUDA_100;
   if (raw_version < 10020)
     return CudaVersion::CUDA_101;
   if (raw_version < 11000)
     return CudaVersion::CUDA_102;
   if (raw_version < 11010)
     return CudaVersion::CUDA_110;
+  if (raw_version < 11020)
+    return CudaVersion::CUDA_111;
   return CudaVersion::LATEST;
 }
 
 CudaVersionInfo parseCudaHFile(llvm::StringRef Input) {
   // Helper lambda which skips the words if the line starts with them or returns
   // None otherwise.
   auto StartsWithWords =
       [](llvm::StringRef Line,
          const SmallVector<StringRef, 3> words) -> llvm::Optional<StringRef> {
     for (StringRef word : words) {
       if (!Line.consume_front(word))
         return {};
       Line = Line.ltrim();
     }
     return Line;
   };
 
   Input = Input.ltrim();
   while (!Input.empty()) {
     if (auto Line =
             StartsWithWords(Input.ltrim(), {"#", "define", "CUDA_VERSION"})) {
       uint32_t RawVersion;
       Line->consumeInteger(10, RawVersion);
       return {"cuda.h: CUDA_VERSION=" + Twine(RawVersion).str() + ".",
               getCudaVersion(RawVersion)};
     }
     // Find next non-empty line.
     Input = Input.drop_front(Input.find_first_of("\n\r")).ltrim();
   }
   return {"cuda.h: CUDA_VERSION not found.", CudaVersion::UNKNOWN};
 }
 } // namespace
void CudaToolChain::addClangTargetOptions(
   // back-end.
   const char *PtxFeature = nullptr;
   switch (CudaInstallation.version()) {
 #define CASE_CUDA_VERSION(CUDA_VER, PTX_VER)                                   \
   case CudaVersion::CUDA_##CUDA_VER:                                           \
     CudaVersionStr = #CUDA_VER;                                                \
     PtxFeature = "+ptx" #PTX_VER;                                              \
     break;
+    CASE_CUDA_VERSION(112, 72);
+    CASE_CUDA_VERSION(111, 71);
     CASE_CUDA_VERSION(110, 70);
     CASE_CUDA_VERSION(102, 65);
     CASE_CUDA_VERSION(101, 64);
     CASE_CUDA_VERSION(100, 63);
     CASE_CUDA_VERSION(92, 61);
     CASE_CUDA_VERSION(91, 61);
     CASE_CUDA_VERSION(90, 60);
 #undef CASE_CUDA_VERSION

llvm/lib/Target/NVPTX/NVPTX.td

 def SM70 : SubtargetFeature<"sm_70", "SmVersion", "70",
                              "Target SM 7.0">;
 def SM72 : SubtargetFeature<"sm_72", "SmVersion", "72",
                              "Target SM 7.2">;
 def SM75 : SubtargetFeature<"sm_75", "SmVersion", "75",
                              "Target SM 7.5">;
 def SM80 : SubtargetFeature<"sm_80", "SmVersion", "80",
                              "Target SM 8.0">;
+def SM86 : SubtargetFeature<"sm_86", "SmVersion", "86",
+                             "Target SM 8.6">;
 
 // PTX Versions
 def PTX32 : SubtargetFeature<"ptx32", "PTXVersion", "32",
                              "Use PTX version 3.2">;
 def PTX40 : SubtargetFeature<"ptx40", "PTXVersion", "40",
                              "Use PTX version 4.0">;
 def PTX41 : SubtargetFeature<"ptx41", "PTXVersion", "41",
                              "Use PTX version 4.1">;

 def PTX63 : SubtargetFeature<"ptx63", "PTXVersion", "63",
                              "Use PTX version 6.3">;
 def PTX64 : SubtargetFeature<"ptx64", "PTXVersion", "64",
                              "Use PTX version 6.4">;
 def PTX65 : SubtargetFeature<"ptx65", "PTXVersion", "65",
                              "Use PTX version 6.5">;
 def PTX70 : SubtargetFeature<"ptx70", "PTXVersion", "70",
                              "Use PTX version 7.0">;
+def PTX71 : SubtargetFeature<"ptx71", "PTXVersion", "71",
+                             "Use PTX version 7.1">;
+def PTX72 : SubtargetFeature<"ptx72", "PTXVersion", "72",
+                             "Use PTX version 7.2">;
 
 //===----------------------------------------------------------------------===//
 // NVPTX supported processors.
 //===----------------------------------------------------------------------===//
 
 class Proc<string Name, list<SubtargetFeature> Features>
  : Processor<Name, NoItineraries, Features>;
 
 def : Proc<"sm_20", [SM20]>;
 def : Proc<"sm_21", [SM21]>;
 def : Proc<"sm_30", [SM30]>;
 def : Proc<"sm_32", [SM32, PTX40]>;
 def : Proc<"sm_35", [SM35]>;
 def : Proc<"sm_37", [SM37, PTX41]>;
 def : Proc<"sm_50", [SM50, PTX40]>;
 def : Proc<"sm_52", [SM52, PTX41]>;
 def : Proc<"sm_53", [SM53, PTX42]>;
 def : Proc<"sm_60", [SM60, PTX50]>;
 def : Proc<"sm_61", [SM61, PTX50]>;
 def : Proc<"sm_62", [SM62, PTX50]>;
 def : Proc<"sm_70", [SM70, PTX60]>;
 def : Proc<"sm_72", [SM72, PTX61]>;
 def : Proc<"sm_75", [SM75, PTX63]>;
 def : Proc<"sm_80", [SM80, PTX70]>;
+def : Proc<"sm_86", [SM86, PTX71]>;
 
 def NVPTXInstrInfo : InstrInfo {
 }
 
 def NVPTX : Target {
   let InstructionSet = NVPTXInstrInfo;
 }