MC: AArch64: Add support for gotpage_lo15

[zatrazz]

Summary

It is not used bt LLVM itself, but it would be used on lld tests
to implement R_AARCH64_LD64_GOTPAGE_LO15 support.

[MaskRay]

llvm/test/MC/AArch64/arm64-elf-relocs.s

254

FileCheck without --match-full-lines allows trailing unmatched substring. Here you probably need sym{{$}} to make sure there is no trailing part.

[zatrazz]

Updated patch based on previous comments.

[psmith]

This looks ok to me. The gotpage_lo15 matches the operator name in GNU assembler.

[MaskRay]

llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp

331

https://llvm.org/docs/CodingStandards.html#don-t-use-else-after-a-return

llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

if (DarwinRefKind == MCSymbolRefExpr::VK_PAGEOFF ||
         ELFRefKind == AArch64MCExpr::VK_GOT_LO12 ||
         ELFRefKind == AArch64MCExpr::VK_DTPREL_LO12 ||
         ELFRefKind == AArch64MCExpr::VK_DTPREL_LO12_NC ||
         ELFRefKind == AArch64MCExpr::VK_TPREL_LO12 ||
         ELFRefKind == AArch64MCExpr::VK_TPREL_LO12_NC ||
         ELFRefKind == AArch64MCExpr::VK_GOTTPREL_LO12_NC ||
         ELFRefKind == AArch64MCExpr::VK_TLSDESC_LO12 ||
         ELFRefKind == AArch64MCExpr::VK_SECREL_LO12 ||
-        ELFRefKind == AArch64MCExpr::VK_SECREL_HI12) {
+        ELFRefKind == AArch64MCExpr::VK_SECREL_HI12 ||
+        ELFRefKind == AArch64MCExpr::VK_GOT_PAGE_LO15) {
       // Note that we don't range-check the addend. It's adjusted modulo page
       // size when converted, so there is no "out of range" condition when using
       // @pageoff.
       return true;
     } else if (DarwinRefKind == MCSymbolRefExpr::VK_GOTPAGEOFF ||
                DarwinRefKind == MCSymbolRefExpr::VK_TLVPPAGEOFF) {
       // @gotpageoff/@tlvppageoff can only be used directly, not with an addend.
       return Addend == 0;
if (DarwinRefKind == MCSymbolRefExpr::VK_None &&
                Addend != 0) {
       Error(S, "gotpage label reference not allowed an addend");
       return MatchOperand_ParseFail;
     } else if (DarwinRefKind != MCSymbolRefExpr::VK_PAGE &&
                DarwinRefKind != MCSymbolRefExpr::VK_GOTPAGE &&
                DarwinRefKind != MCSymbolRefExpr::VK_TLVPPAGE &&
                ELFRefKind != AArch64MCExpr::VK_ABS_PAGE_NC &&
                ELFRefKind != AArch64MCExpr::VK_GOT_PAGE &&
+               ELFRefKind != AArch64MCExpr::VK_GOT_PAGE_LO15 &&
                ELFRefKind != AArch64MCExpr::VK_GOTTPREL_PAGE &&
                ELFRefKind != AArch64MCExpr::VK_TLSDESC_PAGE) {
       // The operand must be an @page or @gotpage qualified symbolref.
       Error(S, "page or gotpage label reference expected");
       return MatchOperand_ParseFail;
     }
   }
 
RefKind = StringSwitch<AArch64MCExpr::VariantKind>(LowerCase)
                   .Case("tprel_g1_nc", AArch64MCExpr::VK_TPREL_G1_NC)
                   .Case("tprel_g0", AArch64MCExpr::VK_TPREL_G0)
                   .Case("tprel_g0_nc", AArch64MCExpr::VK_TPREL_G0_NC)
                   .Case("tprel_hi12", AArch64MCExpr::VK_TPREL_HI12)
                   .Case("tprel_lo12", AArch64MCExpr::VK_TPREL_LO12)
                   .Case("tprel_lo12_nc", AArch64MCExpr::VK_TPREL_LO12_NC)
                   .Case("tlsdesc_lo12", AArch64MCExpr::VK_TLSDESC_LO12)
                   .Case("got", AArch64MCExpr::VK_GOT_PAGE)
+                  .Case("gotpage_lo15", AArch64MCExpr::VK_GOT_PAGE_LO15)
                   .Case("got_lo12", AArch64MCExpr::VK_GOT_LO12)
                   .Case("gottprel", AArch64MCExpr::VK_GOTTPREL_PAGE)
                   .Case("gottprel_lo12", AArch64MCExpr::VK_GOTTPREL_LO12_NC)
                   .Case("gottprel_g1", AArch64MCExpr::VK_GOTTPREL_G1)
                   .Case("gottprel_g0_nc", AArch64MCExpr::VK_GOTTPREL_G0_NC)
                   .Case("tlsdesc", AArch64MCExpr::VK_TLSDESC_PAGE)
                   .Case("secrel_lo12", AArch64MCExpr::VK_SECREL_LO12)
                   .Case("secrel_hi12", AArch64MCExpr::VK_SECREL_HI12)

llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp

case AArch64::fixup_aarch64_ldst_imm12_scale4:
       Ctx.reportError(Fixup.getLoc(),
                       "invalid fixup for 32-bit load/store instruction "
                       "fixup_aarch64_ldst_imm12_scale4");
       return ELF::R_AARCH64_NONE;
     case AArch64::fixup_aarch64_ldst_imm12_scale8:
       if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
         return R_CLS(LDST64_ABS_LO12_NC);
       if (SymLoc == AArch64MCExpr::VK_GOT && IsNC) {
+        AArch64MCExpr::VariantKind AddressLoc =
+            AArch64MCExpr::getAddressFrag(RefKind);
         if (!IsILP32) {
+          if (AddressLoc == AArch64MCExpr::VK_LO15)
+            return ELF::R_AARCH64_LD64_GOTPAGE_LO15;
+          else
             return ELF::R_AARCH64_LD64_GOT_LO12_NC;
         } else {
           Ctx.reportError(Fixup.getLoc(), "ILP32 64-bit load/store "
                                           "relocation not supported (LP64 eqv: "
                                           "LD64_GOT_LO12_NC)");
           return ELF::R_AARCH64_NONE;
         }
       }
       if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC)

llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h

enum VariantKind {
     // MOVZ/MOVK.
     VK_PAGE     = 0x010,
     VK_PAGEOFF  = 0x020,
     VK_HI12     = 0x030,
     VK_G0       = 0x040,
     VK_G1       = 0x050,
     VK_G2       = 0x060,
     VK_G3       = 0x070,
+    VK_LO15     = 0x080,
     VK_AddressFragBits = 0x0f0,
 
     // Whether the final relocation is a checked one (where a linker should
     // perform a range-check on the final address) or not. Note that this field
     // is unfortunately sometimes omitted from the assembly syntax. E.g. :lo12:
     // on its own is a non-checked relocation. We side with ELF on being
     // explicit about this!
     VK_NC       = 0x100,
enum VariantKind {
     VK_PREL_G2           = VK_PREL     | VK_G2,
     VK_PREL_G2_NC        = VK_PREL     | VK_G2      | VK_NC,
     VK_PREL_G1           = VK_PREL     | VK_G1,
     VK_PREL_G1_NC        = VK_PREL     | VK_G1      | VK_NC,
     VK_PREL_G0           = VK_PREL     | VK_G0,
     VK_PREL_G0_NC        = VK_PREL     | VK_G0      | VK_NC,
     VK_GOT_LO12          = VK_GOT      | VK_PAGEOFF | VK_NC,
     VK_GOT_PAGE          = VK_GOT      | VK_PAGE,
+    VK_GOT_PAGE_LO15     = VK_GOT      | VK_LO15    | VK_NC,
     VK_DTPREL_G2         = VK_DTPREL   | VK_G2,
     VK_DTPREL_G1         = VK_DTPREL   | VK_G1,
     VK_DTPREL_G1_NC      = VK_DTPREL   | VK_G1      | VK_NC,
     VK_DTPREL_G0         = VK_DTPREL   | VK_G0,
     VK_DTPREL_G0_NC      = VK_DTPREL   | VK_G0      | VK_NC,
     VK_DTPREL_HI12       = VK_DTPREL   | VK_HI12,
     VK_DTPREL_LO12       = VK_DTPREL   | VK_PAGEOFF,
     VK_DTPREL_LO12_NC    = VK_DTPREL   | VK_PAGEOFF | VK_NC,

llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp

StringRef AArch64MCExpr::getVariantKindName() const {
   case VK_TPREL_HI12:          return ":tprel_hi12:";
   case VK_TPREL_LO12:          return ":tprel_lo12:";
   case VK_TPREL_LO12_NC:       return ":tprel_lo12_nc:";
   case VK_TLSDESC_LO12:        return ":tlsdesc_lo12:";
   case VK_ABS_PAGE:            return "";
   case VK_ABS_PAGE_NC:         return ":pg_hi21_nc:";
   case VK_GOT:                 return ":got:";
   case VK_GOT_PAGE:            return ":got:";
+  case VK_GOT_PAGE_LO15:       return ":gotpage_lo15:";
   case VK_GOT_LO12:            return ":got_lo12:";
   case VK_GOTTPREL:            return ":gottprel:";
   case VK_GOTTPREL_PAGE:       return ":gottprel:";
   case VK_GOTTPREL_LO12_NC:    return ":gottprel_lo12:";
   case VK_GOTTPREL_G1:         return ":gottprel_g1:";
   case VK_GOTTPREL_G0_NC:      return ":gottprel_g0_nc:";
   case VK_TLSDESC:             return "";
   case VK_TLSDESC_PAGE:        return ":tlsdesc:";

llvm/test/MC/AArch64/arm64-elf-relocs.s

// CHECK-OBJ-LP64: R_AARCH64_LDST64_ABS_LO12_NC sym-0xf
    ldr x24, [x23, :got_lo12:sym+7]
 // CHECK: ldr x24, [x23, :got_lo12:sym]
 // CHECK: ldr d22, [x21, :got_lo12:sym]
 // CHECK: ldr x24, [x23, :got_lo12:sym+7]
 // CHECK-OBJ-LP64: R_AARCH64_LD64_GOT_LO12_NC sym
 // CHECK-OBJ-LP64: R_AARCH64_LD64_GOT_LO12_NC sym
 // CHECK-OBJ-LP64: R_AARCH64_LD64_GOT_LO12_NC sym+0x7
 
+  ldr x24, [x23, #:gotpage_lo15:sym]
+  ldr d22, [x21, :gotpage_lo15:sym]
+  ldr d22, [x23, :gotpage_lo15:sym+7]
+// CHECK: ldr x24, [x23, :gotpage_lo15:sym]
+// CHECK: ldr d22, [x21, :gotpage_lo15:sym]
+// CHECK: ldr d22, [x23, :gotpage_lo15:sym+7]
+// CHECK-OBJ-LP64: R_AARCH64_LD64_GOTPAGE_LO15 sym{{$}}
+// CHECK-OBJ-LP64: R_AARCH64_LD64_GOTPAGE_LO15 sym{{$}}
+// CHECK-OBJ-LP64: R_AARCH64_LD64_GOTPAGE_LO15 sym+0x7
+
    ldr x24, [x23, :dtprel_lo12_nc:sym]
    ldr d22, [x21, #:dtprel_lo12:sym]
 // CHECK: ldr x24, [x23, :dtprel_lo12_nc:sym]
 // CHECK: ldr d22, [x21, :dtprel_lo12:sym]
 // CHECK-OBJ-LP64: R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC sym
 // CHECK-OBJ-LP64: R_AARCH64_TLSLD_LDST64_DTPREL_LO12 sym
 
    ldr q24, [x23, :dtprel_lo12_nc:sym]
// certainly be accepted when assembling.
    add x3, x5, :lo12:imm
 // CHECK: add x3, x5, :lo12:imm
 
    ldr x24, #:got:sym
    ldr d22, :got:sym
 // CHECK: ldr x24, :got:sym
 // CHECK: ldr d22, :got:sym
 // CHECK-OBJ-LP64: R_AARCH64_GOT_LD_PREL19 sym
-// CHECK-OBJ-LP64: R_AARCH64_GOT_LD_PREL19 sym
+// CHECK-OBJ-LP64: R_AARCH64_GOT_LD_PREL19 sym