[TruncInstCombine] Remove scalable vector restriction

[junparser]

Summary

This simple patch removes the restriction of scalable vector type in truncinstcombine.

TestPlan: check-llvm

[junparser]

kindly ping~

[sdesmalen]

LGTM

llvm/test/Transforms/AggressiveInstCombine/trunc_const_expr.ll

120

nit: instead of calling some @use32_scale_vec, could it simply be returned?

[junparser]

llvm/test/Transforms/AggressiveInstCombine/trunc_const_expr.ll

120

Yes, we can. However, I prefer to keep the call in case when we can represent more vscale constant vector.

llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp

Type *TruncInstCombine::getBestTruncatedType() {
   return IntegerType::get(CurrentTruncInst->getContext(), MinBitWidth);
 }
 
 /// Given a reduced scalar type \p Ty and a \p V value, return a reduced type
 /// for \p V, according to its type, if it vector type, return the vector
 /// version of \p Ty, otherwise return \p Ty.
 static Type *getReducedType(Value *V, Type *Ty) {
   assert(Ty && !Ty->isVectorTy() && "Expect Scalar Type");
-  if (auto *VTy = dyn_cast<VectorType>(V->getType())) {
-    // FIXME: should this handle scalable vectors?
-    return FixedVectorType::get(Ty,
-                                cast<FixedVectorType>(VTy)->getNumElements());
-  }
+  if (auto *VTy = dyn_cast<VectorType>(V->getType()))
+    return VectorType::get(Ty, VTy->getElementCount());
   return Ty;
 }
 
 Value *TruncInstCombine::getReducedOperand(Value *V, Type *SclTy) {
   Type *Ty = getReducedType(V, SclTy);
   if (auto *C = dyn_cast<Constant>(V)) {
     C = ConstantExpr::getIntegerCast(C, Ty, false);
     // If we got a constantexpr back, try to simplify it with DL info.

llvm/test/Transforms/AggressiveInstCombine/trunc_const_expr.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -aggressive-instcombine -S | FileCheck %s
 ; RUN: opt < %s -passes=aggressive-instcombine -S | FileCheck %s
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 
 ; Aggressive Instcombine should be able to reduce width of these constant
 ; expressions, without crashing.
 
 declare i32 @use32(i32)
 declare <2 x i32> @use32_vec(<2 x i32>)
+declare <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32>)
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;; These tests check cases where expression dag post-dominated by TruncInst
 ;; contains instruction, which has more than one usage.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 define void @const_expression_mul() {
 ; CHECK-LABEL: @const_expression_mul(

 ; CHECK-LABEL: @const_expression_trunc_vec(
 ; CHECK-NEXT:    [[TMP1:%.*]] = call <2 x i32> @use32_vec(<2 x i32> <i32 551, i32 552>)
 ; CHECK-NEXT:    ret void
 ;
   %T = trunc <2 x i64> <i64 551, i64 552> to <2 x i32>
   call <2 x i32> @use32_vec(<2 x i32> %T)
   ret void
 }
+
+define void @const_expression_mul_scale_vec() {
+; CHECK-LABEL: @const_expression_mul_scale_vec(
+; CHECK-NEXT:    [[TMP1:%.*]] = call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> zeroinitializer)
+; CHECK-NEXT:    ret void
+;
+  %A = mul <vscale x 2 x i64> zeroinitializer, zeroinitializer
+  %T = trunc <vscale x 2 x i64> %A to <vscale x 2 x i32>
+  call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> %T)
+  ret void
+}
+
+define void @const_expression_zext_scale_vec() {
+; CHECK-LABEL: @const_expression_zext_scale_vec(
+; CHECK-NEXT:    [[TMP1:%.*]] = call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> zeroinitializer)
+; CHECK-NEXT:    ret void
+;
+  %A = zext <vscale x 2 x i32> zeroinitializer to <vscale x 2 x i64>
+  %T = trunc <vscale x 2 x i64> %A to <vscale x 2 x i32>
+  call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> %T)
+  ret void
+}
+
+define void @const_expression_trunc_scale_vec() {
+; CHECK-LABEL: @const_expression_trunc_scale_vec(
+; CHECK-NEXT:    [[TMP1:%.*]] = call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> zeroinitializer)
+; CHECK-NEXT:    ret void
+;
+  %T = trunc <vscale x 2 x i64> zeroinitializer to <vscale x 2 x i32>
+  call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> %T)
+  ret void
+}