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[PowerPC] Handle FP physical register in inline asm constraint.
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Authored by sfertile on Nov 17 2020, 7:06 AM.

Details

Summary

Do not defer to the base class when the register constraint is a physical fpr. The base class will select SPILLTOVSX as the register class and register allocation will fail on subtargets without VSX registers.

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Event Timeline

sfertile created this revision.Nov 17 2020, 7:06 AM
Herald added a project: Restricted Project. · View Herald TranscriptNov 17 2020, 7:06 AM
sfertile requested review of this revision.Nov 17 2020, 7:06 AM
ZarkoCA accepted this revision.Feb 10 2021, 1:19 PM

LGTM, only some question about a comment.

llvm/lib/Target/PowerPC/PPCISelLowering.cpp
15111

I think this should be SPILLTOVSRRC instead of SPILLTOVSX

This revision is now accepted and ready to land.Feb 10 2021, 1:19 PM
This revision was landed with ongoing or failed builds.Feb 17 2021, 6:29 AM
This revision was automatically updated to reflect the committed changes.