[TableGen] Add frontend/backend phase timing capability

[Paul-C-Anagnostopoulos]

Summary

This patch adds a timing capability that shows the clock times and percentages for phases of the TableGen frontend and appropriately instrumented backends. It is requested with the --time-phases option.

I instrumented about five backends and will continue to instrument more of them over time.

I removed an old timing feature that was only used by one backend.

[Paul-C-Anagnostopoulos]

I forgot to add the new -time-phases option to the xxx-tblgen documentation.

I also added a null backend to make timing the parser easier.

[lattner]

Looks reasonable to me Paul! The null backend is a great idea for analysis

[thakis]

llvm/lib/TableGen/Record.cpp

2597

../../llvm/lib/TableGen/Record.cpp:2613:7: warning: misleading indentation; statement is not part of the previous 'if' [-Wmisleading-indentation]
      BackendTimer = false;
      ^

Was the if (BackendTime) supposed to have braces?

[jankratochvil]

http://lab.llvm.org:8014/#/builders/14/builds/1886

[144/5147] Building CXX object lib/TableGen/CMakeFiles/LLVMTableGen.dir/Main.cpp.o
FAILED: lib/TableGen/CMakeFiles/LLVMTableGen.dir/Main.cpp.o 
/usr/lib64/ccache/c++  -DGTEST_HAS_RTTI=0 -D_DEBUG -D_GNU_SOURCE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -Ilib/TableGen -I/home/buildbot/worker/lldb-x86_64-fedora/llvm-project/llvm/lib/TableGen -Iinclude -I/home/buildbot/worker/lldb-x86_64-fedora/llvm-project/llvm/include -fPIC -fvisibility-inlines-hidden -Werror=date-time -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers -pedantic -Wno-long-long -Wimplicit-fallthrough -Wno-maybe-uninitialized -Wno-class-memaccess -Wno-redundant-move -Wno-noexcept-type -Wdelete-non-virtual-dtor -Wsuggest-override -Wno-comment -fdiagnostics-color -ffunction-sections -fdata-sections -O2     -fno-exceptions -fno-rtti -UNDEBUG -std=c++14 -MD -MT lib/TableGen/CMakeFiles/LLVMTableGen.dir/Main.cpp.o -MF lib/TableGen/CMakeFiles/LLVMTableGen.dir/Main.cpp.o.d -o lib/TableGen/CMakeFiles/LLVMTableGen.dir/Main.cpp.o -c /home/buildbot/worker/lldb-x86_64-fedora/llvm-project/llvm/lib/TableGen/Main.cpp
In file included from /home/buildbot/worker/lldb-x86_64-fedora/llvm-project/llvm/include/llvm/TableGen/Error.h:18,
                 from /home/buildbot/worker/lldb-x86_64-fedora/llvm-project/llvm/lib/TableGen/TGParser.h:17,
                 from /home/buildbot/worker/lldb-x86_64-fedora/llvm-project/llvm/lib/TableGen/Main.cpp:18:
/home/buildbot/worker/lldb-x86_64-fedora/llvm-project/llvm/include/llvm/TableGen/Record.h:29:10: fatal error: llvm/Support/timer.h: No such file or directory
   29 | #include "llvm/Support/timer.h"
      |          ^~~~~~~~~~~~~~~~~~~~~~
compilation terminated.

Probably already fixed by: Fix build after 54f9ee3

[Paul-C-Anagnostopoulos]

llvm/lib/TableGen/Record.cpp

2597

Absolutely! Thanks for catching this.

llvm/docs/TableGen/BackGuide.rst

 * The records are shown with their source location, ``defm`` sequence,
   superclasses, and fields.
 
 Superclasses are shown in the order processed, with indirect superclasses in
 parentheses. Each field is shown with its value and the source location at
 which it was set.
 The ``defm`` sequence gives the locations of the ``defm`` statements that
 were involved in generating the record, in the order they were invoked.
+
+Timing TableGen Phases
+----------------------
+
+TableGen provides a phase timing feature that produces a report of the time
+used by the various phases of parsing the source files and running the
+selected backend. This feature is enabled with the ``--time-phases`` option
+of the TableGen command.
+
+If the backend is *not* instrumented for timing, then a report such as the
+following is produced. This is the timing for the
+``--print-detailed-records`` backend run on the AMDGPU target.
+
+.. code-block:: text
+
+  ===-------------------------------------------------------------------------===
+                               TableGen Phase Timing
+  ===-------------------------------------------------------------------------===
+    Total Execution Time: 101.0106 seconds (102.4819 wall clock)
+  
+     ---User Time---   --System Time--   --User+System--   ---Wall Time---  --- Name ---
+    85.5197 ( 84.9%)   0.1560 ( 50.0%)  85.6757 ( 84.8%)  85.7009 ( 83.6%)  Backend overall
+    15.1789 ( 15.1%)   0.0000 (  0.0%)  15.1789 ( 15.0%)  15.1829 ( 14.8%)  Parse, build records
+     0.0000 (  0.0%)   0.1560 ( 50.0%)   0.1560 (  0.2%)   1.5981 (  1.6%)  Write output
+    100.6986 (100.0%)   0.3120 (100.0%)  101.0106 (100.0%)  102.4819 (100.0%)  Total
+
+Note that all the time for the backend is lumped under "Backend overall".
+
+If the backend is instrumented for timing, then its processing is
+divided into phases and each one timed separately. This is the timing for
+the ``--emit-dag-isel`` backend run on the AMDGPU target.
+
+.. code-block:: text
+
+  ===-------------------------------------------------------------------------===
+                               TableGen Phase Timing
+  ===-------------------------------------------------------------------------===
+    Total Execution Time: 746.3868 seconds (747.1447 wall clock)
+  
+     ---User Time---   --System Time--   --User+System--   ---Wall Time---  --- Name ---
+    657.7938 ( 88.1%)   0.1404 ( 90.0%)  657.9342 ( 88.1%)  658.6497 ( 88.2%)  Emit matcher table
+    70.2317 (  9.4%)   0.0000 (  0.0%)  70.2317 (  9.4%)  70.2700 (  9.4%)  Convert to matchers
+    14.8825 (  2.0%)   0.0156 ( 10.0%)  14.8981 (  2.0%)  14.9009 (  2.0%)  Parse, build records
+     2.1840 (  0.3%)   0.0000 (  0.0%)   2.1840 (  0.3%)   2.1791 (  0.3%)  Sort patterns
+     1.1388 (  0.2%)   0.0000 (  0.0%)   1.1388 (  0.2%)   1.1401 (  0.2%)  Optimize matchers
+     0.0000 (  0.0%)   0.0000 (  0.0%)   0.0000 (  0.0%)   0.0050 (  0.0%)  Write output
+    746.2308 (100.0%)   0.1560 (100.0%)  746.3868 (100.0%)  747.1447 (100.0%)  Total
+
+The backend has been divided into four phases and timed separately.
+
+If you want to instrument a backend, refer to the backend ``DAGISelEmitter.cpp``
+and search for ``Records.startTimer``.
 No newline at end of file

llvm/include/llvm/TableGen/Record.h

 #include "llvm/ADT/PointerIntPair.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/Support/Casting.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/SMLoc.h"
 #include "llvm/Support/TrailingObjects.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/Support/timer.h"
 #include <algorithm>
 #include <cassert>
 #include <cstddef>
 #include <cstdint>
 #include <map>
 #include <memory>
 #include <string>
 #include <utility>
class RecordKeeper {
   using GlobalMap = std::map<std::string, Init *, std::less<>>;
 
   std::string InputFilename;
   RecordMap Classes, Defs;
   FoldingSet<RecordRecTy> RecordTypePool;
   std::map<std::string, Init *, std::less<>> ExtraGlobals;
   unsigned AnonCounter = 0;
 
+  // These members are for the phase timing feature. We need a timer group,
+  // the last timer started, and a flag to say whether the last timer
+  // is the special "backend overall timer."
+  TimerGroup *TimingGroup = nullptr;
+  Timer *LastTimer = nullptr;
+  bool BackendTimer = false;
+
 public:
   /// Get the main TableGen input file's name.
   const std::string getInputFilename() const { return InputFilename; }
 
   /// Get the map of classes.
   const RecordMap &getClasses() const { return Classes; }
 
   /// Get the map of records (defs).
void addExtraGlobal(StringRef Name, Init *I) {
     bool Ins = ExtraGlobals.insert(std::make_pair(std::string(Name), I)).second;
     (void)Ins;
     assert(!getDef(Name));
     assert(Ins && "Global already exists");
   }
 
   Init *getNewAnonymousName();
 
+  /// Start phase timing; called if the --time-phases option is specified.
+  void startPhaseTiming() {
+    TimingGroup = new TimerGroup("TableGen", "TableGen Phase Timing");
+  }
+
+  /// Start timing a phase. Automatically stops any previous phase timer.
+  void startTimer(StringRef Name);
+
+  /// Stop timing a phase.
+  void stopTimer();
+
+  /// Start timing the overall backend. If the backend starts a timer,
+  /// then this timer is cleared.
+  void startBackendTimer(StringRef Name);
+
+  /// Stop timing the overall backend.
+  void stopBackendTimer();
+
+  /// Stop phase timing and print the report.
+  void stopPhaseTiming() {
+    if (TimingGroup)
+      delete TimingGroup;
+  }
+
   //===--------------------------------------------------------------------===//
   // High-level helper methods, useful for tablegen backends.
 
   /// Get all the concrete records that inherit from all the specified
   /// classes. The classes must be defined.
   std::vector<Record *> getAllDerivedDefinitions(
       const ArrayRef<StringRef> ClassNames) const;
 

llvm/lib/TableGen/Main.cpp

 
 static cl::list<std::string>
 MacroNames("D", cl::desc("Name of the macro to be defined"),
             cl::value_desc("macro name"), cl::Prefix);
 
 static cl::opt<bool>
 WriteIfChanged("write-if-changed", cl::desc("Only write output if it changed"));
 
+static cl::opt<bool>
+TimePhases("time-phases", cl::desc("Time phases of parser and backend"));
+
 static int reportError(const char *ProgName, Twine Msg) {
   errs() << ProgName << ": " << Msg;
   errs().flush();
   return 1;
 }
 
 /// Create a dependency file for `-d` option.
 ///
static int createDependencyFile(const TGParser &Parser, const char *argv0) {
   DepOut.os() << "\n";
   DepOut.keep();
   return 0;
 }
 
 int llvm::TableGenMain(const char *argv0, TableGenMainFn *MainFn) {
   RecordKeeper Records;
 
+  if (TimePhases)
+    Records.startPhaseTiming();
+
   // Parse the input file.
+
+  Records.startTimer("Parse, build records");
   ErrorOr<std::unique_ptr<MemoryBuffer>> FileOrErr =
       MemoryBuffer::getFileOrSTDIN(InputFilename);
   if (std::error_code EC = FileOrErr.getError())
     return reportError(argv0, "Could not open input file '" + InputFilename +
                                   "': " + EC.message() + "\n");
 
   Records.saveInputFilename(InputFilename);
 
   // Tell SrcMgr about this buffer, which is what TGParser will pick up.
   SrcMgr.AddNewSourceBuffer(std::move(*FileOrErr), SMLoc());
 
   // Record the location of the include directory so that the lexer can find
   // it later.
   SrcMgr.setIncludeDirs(IncludeDirs);
 
   TGParser Parser(SrcMgr, MacroNames, Records);
 
   if (Parser.ParseFile())
     return 1;
+  Records.stopTimer();
 
   // Write output to memory.
+  Records.startBackendTimer("Backend overall");
   std::string OutString;
   raw_string_ostream Out(OutString);
-  if (MainFn(Out, Records))
+  unsigned status = MainFn(Out, Records);
+  Records.stopBackendTimer();
+  if (status)
     return 1;
 
   // Always write the depfile, even if the main output hasn't changed.
   // If it's missing, Ninja considers the output dirty.  If this was below
   // the early exit below and someone deleted the .inc.d file but not the .inc
   // file, tablegen would never write the depfile.
   if (!DependFilename.empty()) {
     if (int Ret = createDependencyFile(Parser, argv0))
       return Ret;
   }
 
+  Records.startTimer("Write output");
+  bool WriteFile = true;
   if (WriteIfChanged) {
     // Only updates the real output file if there are any differences.
     // This prevents recompilation of all the files depending on it if there
     // aren't any.
     if (auto ExistingOrErr = MemoryBuffer::getFile(OutputFilename))
       if (std::move(ExistingOrErr.get())->getBuffer() == Out.str())
-        return 0;
+        WriteFile = false;
   }
-
+  if (WriteFile) {
     std::error_code EC;
     ToolOutputFile OutFile(OutputFilename, EC, sys::fs::OF_None);
     if (EC)
-    return reportError(argv0, "error opening " + OutputFilename + ":" +
+      return reportError(argv0, "error opening " + OutputFilename + ": " +
                                     EC.message() + "\n");
     OutFile.os() << Out.str();
+    if (ErrorsPrinted == 0)
+      OutFile.keep();
+  }
+  
+  Records.stopTimer();
+  Records.stopPhaseTiming();
 
   if (ErrorsPrinted > 0)
     return reportError(argv0, Twine(ErrorsPrinted) + " errors.\n");
-
-  // Declare success.
-  OutFile.keep();
   return 0;
 }

llvm/lib/TableGen/Record.cpp

 //===- Record.cpp - Record implementation ---------------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // Implement the tablegen record classes.
 //
 //===----------------------------------------------------------------------===//
 
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/FoldingSet.h"
 #include "llvm/ADT/SmallString.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/ADT/StringSet.h"
 #include "llvm/Config/llvm-config.h"
 #include "llvm/Support/Allocator.h"
 #include "llvm/Support/Casting.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/SMLoc.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/Support/timer.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
 #include <cassert>
 #include <cstdint>
 #include <memory>
 #include <map>
 #include <string>
 #include <utility>
 #include <vector>
 
 using namespace llvm;
 
 #define DEBUG_TYPE "tblgen-records"
 

 }
 
 /// GetNewAnonymousName - Generate a unique anonymous name that can be used as
 /// an identifier.
 Init *RecordKeeper::getNewAnonymousName() {
   return StringInit::get("anonymous_" + utostr(AnonCounter++));
 }
 
+// These functions implement the phase timing facility. Starting a timer
+// when one is already running stops the running one.
+
+void RecordKeeper::startTimer(StringRef Name) {
+  if (TimingGroup) {
+    if (LastTimer && LastTimer->isRunning()) {
+      LastTimer->stopTimer();
+      if (BackendTimer) {
+        LastTimer->clear();
+        BackendTimer = false;
+      }
+    }
+
+    LastTimer = new Timer("", Name, *TimingGroup);
+    LastTimer->startTimer();
+  }
+}
+
+void RecordKeeper::stopTimer() {
+  if (TimingGroup) {
+    assert(LastTimer && "No phase timer was started");
+    LastTimer->stopTimer();
+  }
+}
+
+void RecordKeeper::startBackendTimer(StringRef Name) {
+  if (TimingGroup) {
+    startTimer(Name);
+    BackendTimer = true;
+  }
+}
+
+void RecordKeeper::stopBackendTimer() {
+  if (TimingGroup) {
+    if (BackendTimer)
+      stopTimer();
+      BackendTimer = false;
+  }
+}
+
 std::vector<Record *> RecordKeeper::getAllDerivedDefinitions(
     const ArrayRef<StringRef> ClassNames) const {
   SmallVector<Record *, 2> ClassRecs;
   std::vector<Record *> Defs;
 
   assert(ClassNames.size() > 0 && "At least one class must be passed.");
   for (const auto &ClassName : ClassNames) {
     Record *Class = getClass(ClassName);

llvm/utils/TableGen/CallingConvEmitter.cpp

 };
 } // End anonymous namespace
 
 void CallingConvEmitter::run(raw_ostream &O) {
   std::vector<Record*> CCs = Records.getAllDerivedDefinitions("CallingConv");
 
   // Emit prototypes for all of the non-custom CC's so that they can forward ref
   // each other.
+  Records.startTimer("Emit prototypes");
   for (Record *CC : CCs) {
     if (!CC->getValueAsBit("Custom")) {
       unsigned Pad = CC->getName().size();
       if (CC->getValueAsBit("Entry")) {
         O << "bool llvm::";
         Pad += 12;
       } else {
         O << "static bool ";
         Pad += 13;
       }
       O << CC->getName() << "(unsigned ValNo, MVT ValVT,\n"
         << std::string(Pad, ' ') << "MVT LocVT, CCValAssign::LocInfo LocInfo,\n"
         << std::string(Pad, ' ')
         << "ISD::ArgFlagsTy ArgFlags, CCState &State);\n";
     }
   }
 
   // Emit each non-custom calling convention description in full.
+  Records.startTimer("Emit full descriptions");
   for (Record *CC : CCs) {
     if (!CC->getValueAsBit("Custom"))
       EmitCallingConv(CC, O);
   }
 }
 
 
 void CallingConvEmitter::EmitCallingConv(Record *CC, raw_ostream &O) {

llvm/utils/TableGen/CodeGenTarget.cpp

 
 CodeGenSchedModels &CodeGenTarget::getSchedModels() const {
   if (!SchedModels)
     SchedModels = std::make_unique<CodeGenSchedModels>(Records, *this);
   return *SchedModels;
 }
 
 void CodeGenTarget::ReadInstructions() const {
-  NamedRegionTimer T("Read Instructions", "Time spent reading instructions",
-                     "CodeGenTarget", "CodeGenTarget", TimeRegions);
   std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
   if (Insts.size() <= 2)
     PrintFatalError("No 'Instruction' subclasses defined!");
 
   // Parse the instructions defined in the .td file.
   for (unsigned i = 0, e = Insts.size(); i != e; ++i)
     Instructions[Insts[i]] = std::make_unique<CodeGenInstruction>(Insts[i]);
 }

llvm/utils/TableGen/DAGISelEmitter.cpp

 using namespace llvm;
 
 #define DEBUG_TYPE "dag-isel-emitter"
 
 namespace {
 /// DAGISelEmitter - The top-level class which coordinates construction
 /// and emission of the instruction selector.
 class DAGISelEmitter {
+  RecordKeeper &Records; // Just so we can get at the timing functions.
   CodeGenDAGPatterns CGP;
 public:
-  explicit DAGISelEmitter(RecordKeeper &R) : CGP(R) {}
+  explicit DAGISelEmitter(RecordKeeper &R) : Records(R), CGP(R) {}
   void run(raw_ostream &OS);
 };
 } // End anonymous namespace
 
 //===----------------------------------------------------------------------===//
 // DAGISelEmitter Helper methods
 //
 
LLVM_DEBUG(errs() << "\n\nALL PATTERNS TO MATCH:\n\n";
                errs() << "PATTERN: ";
                I->getSrcPattern()->dump();
                errs() << "\nRESULT:  ";
                I->getDstPattern()->dump();
                errs() << "\n";
              });
 
   // Add all the patterns to a temporary list so we can sort them.
+  Records.startTimer("Sort patterns");
   std::vector<const PatternToMatch*> Patterns;
   for (CodeGenDAGPatterns::ptm_iterator I = CGP.ptm_begin(), E = CGP.ptm_end();
        I != E; ++I)
     Patterns.push_back(&*I);
 
   // We want to process the matches in order of minimal cost.  Sort the patterns
   // so the least cost one is at the start.
   std::stable_sort(Patterns.begin(), Patterns.end(),
                    PatternSortingPredicate(CGP));
 
-
   // Convert each variant of each pattern into a Matcher.
+  Records.startTimer("Convert to matchers");
   std::vector<Matcher*> PatternMatchers;
   for (unsigned i = 0, e = Patterns.size(); i != e; ++i) {
     for (unsigned Variant = 0; ; ++Variant) {
       if (Matcher *M = ConvertPatternToMatcher(*Patterns[i], Variant, CGP))
         PatternMatchers.push_back(M);
       else
         break;
     }
   }
 
   std::unique_ptr<Matcher> TheMatcher =
     std::make_unique<ScopeMatcher>(PatternMatchers);
 
+  Records.startTimer("Optimize matchers");
   OptimizeMatcher(TheMatcher, CGP);
+
   //Matcher->dump();
+
+  Records.startTimer("Emit matcher table");
   EmitMatcherTable(TheMatcher.get(), CGP, OS);
 }
 
 namespace llvm {
 
 void EmitDAGISel(RecordKeeper &RK, raw_ostream &OS) {
   DAGISelEmitter(RK).run(OS);
 }
 
 } // End llvm namespace

llvm/utils/TableGen/GICombinerEmitter.cpp

 }
 
 void CombineRule::declareMatchData(StringRef PatternSymbol, StringRef Type,
                                    StringRef VarName) {
   MatchDataDecls.emplace_back(PatternSymbol, Type, VarName);
 }
 
 bool CombineRule::parseDefs() {
-  NamedRegionTimer T("parseDefs", "Time spent parsing the defs", "Rule Parsing",
-                     "Time spent on rule parsing", TimeRegions);
   DagInit *Defs = TheDef.getValueAsDag("Defs");
 
   if (Defs->getOperatorAsDef(TheDef.getLoc())->getName() != "defs") {
     PrintError(TheDef.getLoc(), "Expected defs operator");
     return false;
   }
 
   for (unsigned I = 0, E = Defs->getNumArgs(); I < E; ++I) {
for (const auto &Arg : Matcher->getArgs()) {
                  "Arguments to wip_match_opcode must be instructions");
       return false;
     }
     return true;
   }
   return false;
 }
 bool CombineRule::parseMatcher(const CodeGenTarget &Target) {
-  NamedRegionTimer T("parseMatcher", "Time spent parsing the matcher",
-                     "Rule Parsing", "Time spent on rule parsing", TimeRegions);
   StringMap<std::vector<VarInfo>> NamedEdgeDefs;
   StringMap<std::vector<VarInfo>> NamedEdgeUses;
   DagInit *Matchers = TheDef.getValueAsDag("Match");
 
   if (Matchers->getOperatorAsDef(TheDef.getLoc())->getName() != "match") {
     PrintError(TheDef.getLoc(), "Expected match operator");
     return false;
   }
if (Uses.size() > 1) {
                                         &P->getOperandInfo()["mi1"]);
       }
     }
   }
   return true;
 }
 
 class GICombinerEmitter {
+  RecordKeeper &Records;
   StringRef Name;
   const CodeGenTarget &Target;
   Record *Combiner;
   std::vector<std::unique_ptr<CombineRule>> Rules;
   GIMatchDagContext MatchDagCtx;
 
   std::unique_ptr<CombineRule> makeCombineRule(const Record &R);
 
public:
   void generateDeclarationsCodeForTree(raw_ostream &OS, const GIMatchTree &Tree) const;
   void generateCodeForTree(raw_ostream &OS, const GIMatchTree &Tree,
                            StringRef Indent) const;
 };
 
 GICombinerEmitter::GICombinerEmitter(RecordKeeper &RK,
                                      const CodeGenTarget &Target,
                                      StringRef Name, Record *Combiner)
-    : Name(Name), Target(Target), Combiner(Combiner) {}
+    : Records(RK), Name(Name), Target(Target), Combiner(Combiner) {}
 
 void GICombinerEmitter::emitNameMatcher(raw_ostream &OS) const {
   std::vector<std::pair<std::string, std::string>> Cases;
   Cases.reserve(Rules.size());
 
   for (const CombineRule &EnumeratedRule : make_pointee_range(Rules)) {
     std::string Code;
     raw_string_ostream SS(Code);

 static void emitAdditionalHelperMethodArguments(raw_ostream &OS,
                                                 Record *Combiner) {
   for (Record *Arg : Combiner->getValueAsListOfDefs("AdditionalArguments"))
     OS << ",\n    " << Arg->getValueAsString("Type")
        << Arg->getValueAsString("Name");
 }
 
 void GICombinerEmitter::run(raw_ostream &OS) {
+  Records.startTimer("Gather rules");
   gatherRules(Rules, Combiner->getValueAsListOfDefs("Rules"));
   if (StopAfterParse) {
     MatchDagCtx.print(errs());
     PrintNote(Combiner->getLoc(),
               "Terminating due to -gicombiner-stop-after-parse");
     return;
   }
   if (ErrorsPrinted)
     PrintFatalError(Combiner->getLoc(), "Failed to parse one or more rules");
   LLVM_DEBUG(dbgs() << "Optimizing tree for " << Rules.size() << " rules\n");
   std::unique_ptr<GIMatchTree> Tree;
+  Records.startTimer("Optimize combiner");
   {
-    NamedRegionTimer T("Optimize", "Time spent optimizing the combiner",
-                       "Code Generation", "Time spent generating code",
-                       TimeRegions);
-
     GIMatchTreeBuilder TreeBuilder(0);
     for (const auto &Rule : Rules) {
       bool HadARoot = false;
       for (const auto &Root : enumerate(Rule->getMatchDag().roots())) {
         TreeBuilder.addLeaf(Rule->getName(), Root.index(), Rule->getMatchDag(),
                             Rule.get());
         HadARoot = true;
       }
       if (!HadARoot)
         PrintFatalError(Rule->getDef().getLoc(), "All rules must have a root");
     }
 
     Tree = TreeBuilder.run();
   }
   if (StopAfterBuild) {
     Tree->writeDOTGraph(outs());
     PrintNote(Combiner->getLoc(),
               "Terminating due to -gicombiner-stop-after-build");
     return;
   }
 
-  NamedRegionTimer T("Emit", "Time spent emitting the combiner",
-                     "Code Generation", "Time spent generating code",
-                     TimeRegions);
+  Records.startTimer("Emit combiner");
   OS << "#ifdef " << Name.upper() << "_GENCOMBINERHELPER_DEPS\n"
      << "#include \"llvm/ADT/SparseBitVector.h\"\n"
      << "namespace llvm {\n"
      << "extern cl::OptionCategory GICombinerOptionCategory;\n"
      << "} // end namespace llvm\n"
      << "#endif // ifdef " << Name.upper() << "_GENCOMBINERHELPER_DEPS\n\n";
 
   OS << "#ifdef " << Name.upper() << "_GENCOMBINERHELPER_H\n"

llvm/utils/TableGen/PseudoLoweringEmitter.cpp

 }
 
 void PseudoLoweringEmitter::run(raw_ostream &o) {
   StringRef Classes[] = {"PseudoInstExpansion", "Instruction"};
   std::vector<Record *> Insts =
       Records.getAllDerivedDefinitions(makeArrayRef(Classes));
 
   // Process the pseudo expansion definitions, validating them as we do so.
+  Records.startTimer("Process definitions");
   for (unsigned i = 0, e = Insts.size(); i != e; ++i)
     evaluateExpansion(Insts[i]);
 
   // Generate expansion code to lower the pseudo to an MCInst of the real
   // instruction.
+  Records.startTimer("Emit expansion code");
   emitLoweringEmitter(o);
 }
 
 namespace llvm {
 
 void EmitPseudoLowering(RecordKeeper &RK, raw_ostream &OS) {
   PseudoLoweringEmitter(RK).run(OS);
 }
 
 } // End llvm namespace

llvm/utils/TableGen/RegisterBankEmitter.cpp

OS << TargetName << "GenRegisterBankInfo::" << TargetName
      << "}\n"
      << "} // end namespace llvm\n";
 }
 
 void RegisterBankEmitter::run(raw_ostream &OS) {
   StringRef TargetName = Target.getName();
   const CodeGenRegBank &RegisterClassHierarchy = Target.getRegBank();
 
+  Records.startTimer("Analyze records");
   std::vector<RegisterBank> Banks;
   for (const auto &V : Records.getAllDerivedDefinitions("RegisterBank")) {
     SmallPtrSet<const CodeGenRegisterClass *, 8> VisitedRCs;
     RegisterBank Bank(*V);
 
     for (const CodeGenRegisterClass *RC :
          Bank.getExplicitlySpecifiedRegisterClasses(RegisterClassHierarchy)) {
       visitRegisterBankClasses(
           RegisterClassHierarchy, RC, "explicit",
           [&Bank](const CodeGenRegisterClass *RC, StringRef Kind) {
             LLVM_DEBUG(dbgs()
                        << "Added " << RC->getName() << "(" << Kind << ")\n");
             Bank.addRegisterClass(RC);
           },
           VisitedRCs);
     }
 
     Banks.push_back(Bank);
   }
 
   // Warn about ambiguous MIR caused by register bank/class name clashes.
+  Records.startTimer("Warn ambiguous");
   for (const auto &Class : RegisterClassHierarchy.getRegClasses()) {
     for (const auto &Bank : Banks) {
       if (Bank.getName().lower() == StringRef(Class.getName()).lower()) {
         PrintWarning(Bank.getDef().getLoc(), "Register bank names should be "
                                              "distinct from register classes "
                                              "to avoid ambiguous MIR");
         PrintNote(Bank.getDef().getLoc(), "RegisterBank was declared here");
         PrintNote(Class.getDef()->getLoc(), "RegisterClass was declared here");
       }
     }
   }
 
+  Records.startTimer("Emit output");
   emitSourceFileHeader("Register Bank Source Fragments", OS);
   OS << "#ifdef GET_REGBANK_DECLARATIONS\n"
      << "#undef GET_REGBANK_DECLARATIONS\n";
   emitHeader(OS, TargetName, Banks);
   OS << "#endif // GET_REGBANK_DECLARATIONS\n\n"
      << "#ifdef GET_TARGET_REGBANK_CLASS\n"
      << "#undef GET_TARGET_REGBANK_CLASS\n";
   emitBaseClassDefinition(OS, TargetName, Banks);

llvm/utils/TableGen/RegisterInfoEmitter.cpp

OS << "const " << TargetName << "FrameLowering *\n" << TargetName
      << "}\n\n";
 
   OS << "} // end namespace llvm\n\n";
   OS << "#endif // GET_REGINFO_TARGET_DESC\n\n";
 }
 
 void RegisterInfoEmitter::run(raw_ostream &OS) {
   CodeGenRegBank &RegBank = Target.getRegBank();
+  Records.startTimer("Print enums");
   runEnums(OS, Target, RegBank);
+
+  Records.startTimer("Print MC registers");
   runMCDesc(OS, Target, RegBank);
+
+  Records.startTimer("Print header fragment");
   runTargetHeader(OS, Target, RegBank);
+
+  Records.startTimer("Print target registers");
   runTargetDesc(OS, Target, RegBank);
 
   if (RegisterInfoDebug)
     debugDump(errs());
 }
 
 void RegisterInfoEmitter::debugDump(raw_ostream &OS) {
   CodeGenRegBank &RegBank = Target.getRegBank();

llvm/utils/TableGen/TableGen.cpp

enum ActionType {
   GenExegesis,
   GenAutomata,
   GenDirectivesEnumDecl,
   GenDirectivesEnumImpl,
   GenDirectivesEnumGen,
 };
 
 namespace llvm {
-/// Storage for TimeRegionsOpt as a global so that backends aren't required to
-/// include CommandLine.h
-bool TimeRegions = false;
 cl::opt<bool> EmitLongStrLiterals(
     "long-string-literals",
     cl::desc("when emitting large string tables, prefer string literals over "
              "comma-separated char literals. This can be a readability and "
              "compile-time performance win, but upsets some compilers"),
     cl::Hidden, cl::init(true));
 } // end namespace llvm
 
cl::values(
         clEnumValN(GenDirectivesEnumGen, "gen-directive-gen",
                    "Generate directive related implementation code part")));
 
 cl::OptionCategory PrintEnumsCat("Options for -print-enums");
 cl::opt<std::string> Class("class", cl::desc("Print Enum list for this class"),
                            cl::value_desc("class name"),
                            cl::cat(PrintEnumsCat));
 
-cl::opt<bool, true>
-    TimeRegionsOpt("time-regions",
-                   cl::desc("Time regions of tablegens execution"),
-                   cl::location(TimeRegions));
-
 bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) {
   switch (Action) {
   case PrintRecords:
     OS << Records;           // No argument, dump all contents
     break;
   case PrintDetailedRecords:
     EmitDetailedRecords(Records, OS);
     break;