MLIR: add SinOp Lowering to __ocml_sin_f32 and __ocml_sin_f64

[akuegel]

Summary

This mimics the recent similar patch for GPUToNVVM.

[herhut]

Thanks for fixing this!

Can you use [mlir][gpu] in the subject and make it clear that this applies to the rocm lowering only?

mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp

75

Just wondering, why is there no TanOp here? Could you add this, as well?

120

Can you keep these sorted?

[akuegel]

Address review comments.

[akuegel]

Thanks for the review comments :)

mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp

75

Yes, looks like this was an oversight. I have added it now as well.

[herhut]

Thank you!

mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp

void runOnOperation() override {
     populateVectorToLLVMConversionPatterns(converter, llvmPatterns);
     populateVectorToROCDLConversionPatterns(converter, llvmPatterns);
     populateStdToLLVMConversionPatterns(converter, llvmPatterns);
     populateGpuToROCDLConversionPatterns(converter, llvmPatterns);
     LLVMConversionTarget target(getContext());
     target.addIllegalDialect<gpu::GPUDialect>();
     target.addIllegalOp<LLVM::CosOp, LLVM::ExpOp, LLVM::FAbsOp, LLVM::FCeilOp,
                         LLVM::FFloorOp, LLVM::LogOp, LLVM::Log10Op,
-                        LLVM::Log2Op>();
+                        LLVM::Log2Op, LLVM::SinOp, LLVM::TanhOp>();
     target.addIllegalOp<FuncOp>();
     target.addLegalDialect<ROCDL::ROCDLDialect>();
     // TODO: Remove once we support replacing non-root ops.
     target.addLegalOp<gpu::YieldOp, gpu::GPUModuleOp, gpu::ModuleEndOp>();
     if (failed(applyPartialConversion(m, target, std::move(llvmPatterns))))
       signalPassFailure();
   }
 };
void mlir::populateGpuToROCDLConversionPatterns(
   patterns.insert<OpToFuncCallLowering<FloorFOp>>(converter, "__ocml_floor_f32",
                                                   "__ocml_floor_f64");
   patterns.insert<OpToFuncCallLowering<LogOp>>(converter, "__ocml_log_f32",
                                                "__ocml_log_f64");
   patterns.insert<OpToFuncCallLowering<Log10Op>>(converter, "__ocml_log10_f32",
                                                  "__ocml_log10_f64");
   patterns.insert<OpToFuncCallLowering<Log2Op>>(converter, "__ocml_log2_f32",
                                                 "__ocml_log2_f64");
+  patterns.insert<OpToFuncCallLowering<SinOp>>(converter, "__ocml_sin_f32",
+                                               "__ocml_sin_f64");
   patterns.insert<OpToFuncCallLowering<TanhOp>>(converter, "__ocml_tanh_f32",
                                                 "__ocml_tanh_f64");
 }
 
 std::unique_ptr<OperationPass<gpu::GPUModuleOp>>
 mlir::createLowerGpuOpsToROCDLOpsPass(unsigned indexBitwidth) {
   return std::make_unique<LowerGpuOpsToROCDLOpsPass>(indexBitwidth);
 }