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[PowerPC] Combine select_cc (x, 0, t, f, lt) to avoid generating `isel`
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Authored by lkail on Oct 8 2020, 5:44 PM.

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shchenz
steven.zhang
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Summary

We can combine select_cc (x, 0, t, f, lt) to avoid generating expensive isel instruction.

Diff Detail

Unit TestsFailed

TimeTest
400 mslinux > HWAddressSanitizer-x86_64.TestCases::sizes.cpp
Script: -- : 'RUN: at line 3'; /mnt/disks/ssd0/agent/llvm-project/build/./bin/clang --driver-mode=g++ -m64 -gline-tables-only -fsanitize=hwaddress -fuse-ld=lld -mcmodel=large -mllvm -hwasan-globals -mllvm -hwasan-use-short-granules -mllvm -hwasan-instrument-landing-pads=0 -mllvm -hwasan-instrument-personality-functions /mnt/disks/ssd0/agent/llvm-project/compiler-rt/test/hwasan/TestCases/sizes.cpp -nostdlib++ -lstdc++ -o /mnt/disks/ssd0/agent/llvm-project/build/projects/compiler-rt/test/hwasan/X86_64/TestCases/Output/sizes.cpp.tmp
390 mswindows > lld.ELF/invalid::symtab-sh-info.s
Script: -- : 'RUN: at line 4'; c:\ws\w64\llvm-project\premerge-checks\build\bin\yaml2obj.exe --docnum=1 C:\ws\w64\llvm-project\premerge-checks\lld\test\ELF\invalid\symtab-sh-info.s -o C:\ws\w64\llvm-project\premerge-checks\build\tools\lld\test\ELF\invalid\Output\symtab-sh-info.s.tmp.o

Event Timeline

lkail created this revision.Oct 8 2020, 5:44 PM
lkail requested review of this revision.Oct 8 2020, 5:44 PM
lkail updated this revision to Diff 297097.Oct 8 2020, 6:24 PM

Thanks for doing this. This is what we should do for PPC target.

llvm/lib/Target/PowerPC/PPCISelLowering.cpp
13624

I think it is not a win transformation for the worst case?

li
li
cmp
select

VS

srl
ext
not
shl
sub
shchenz added inline comments.Oct 8 2020, 10:18 PM
llvm/test/CodeGen/PowerPC/select.ll
56

This seems to be always profitable. Maybe we can do this transformation in void PPCDAGToDAGISel::Select(SDNode *N) {}?
We can transform it like:

select_cc (x, 0, t, f, lt)

-> subfic (rlwinm) if (f > t)
or
-> addi (rlwinm) if (f <= t)?

lkail updated this revision to Diff 297126.Oct 8 2020, 11:13 PM

Tune codegen.

lkail updated this revision to Diff 297797.Oct 13 2020, 2:34 AM

Add tests to cover zext/trunc.

I guess this opt should also be profitable for opcode SELECT, is there any reason we don't do this?

llvm/lib/Target/PowerPC/PPCISelLowering.cpp
13599

is it possible to put some conditions in early returns and put some comments there?

13608

same as above, put some contidions in early returns and put some comments there?

13614

can getZExtOrTrunc be used here?

lkail added a comment.Tue, Nov 3, 9:26 PM

I guess this opt should also be profitable for opcode SELECT, is there any reason we don't do this?

The complete form of select is select cond, true_value, false_value and cond usually comes from comparison. Most comparisons can't be transformed to shift ops easily. For current ppc backend without this ptch, such pattern is transformed into a select_cc node before pattern-matching instruction selector.

llvm/lib/Target/PowerPC/PPCISelLowering.cpp
13599

Well, it might require some refactor work if adding more select_cc related patterns.

13614

Good one.

lkail updated this revision to Diff 302739.Tue, Nov 3, 9:28 PM
lkail planned changes to this revision.Wed, Nov 25, 9:52 PM

Gonna to add more patterns and refine current code.