[GISel] Add combine for constant G_PTR_ADD offsets.

[pnappa]

Summary

This adds a single combine for GlobalISel to fold:

ptradd (inttoptr C1) C2

Into:

C1 + C2

Additionally, a small test for AArch64 is added.

[arsenm]

llvm/include/llvm/Target/GlobalISel/Combine.td

538

Do we not have a constant fold group? Probably should

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

2027

setInstrAndDebugLoc

2028

This can directly produce a pointer typed constant

[pnappa]

Addressing Matt's comments

[aemerson]

llvm/test/CodeGen/AArch64/GlobalISel/combine-ptradd-int2ptr.mir

16

FYI the integer in p64 doesn't mean the same thing as in s64. In s64 its the bit width, in p64 the integer denotes the address space of the pointer. We normally just use the default p0 on AArch64 because we only use one address space. It doesn't make a difference for this combine though.

[aditya_nandakumar]

Committed in ef3d17482ff

llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h

public:
 
   /// Transform G_ADD (G_PTRTOINT x), y -> G_PTRTOINT (G_PTR_ADD x, y)
   /// Transform G_ADD y, (G_PTRTOINT x) -> G_PTRTOINT (G_PTR_ADD x, y)
   bool matchCombineAddP2IToPtrAdd(MachineInstr &MI,
                                   std::pair<Register, bool> &PtrRegAndCommute);
   bool applyCombineAddP2IToPtrAdd(MachineInstr &MI,
                                   std::pair<Register, bool> &PtrRegAndCommute);
 
+  // Transform G_PTR_ADD (G_PTRTOINT C1), C2 -> C1 + C2
+  bool matchCombineConstPtrAddToI2P(MachineInstr &MI, int64_t &NewCst);
+  bool applyCombineConstPtrAddToI2P(MachineInstr &MI, int64_t &NewCst);
+
   /// Transform anyext(trunc(x)) to x.
   bool matchCombineAnyExtTrunc(MachineInstr &MI, Register &Reg);
   bool applyCombineAnyExtTrunc(MachineInstr &MI, Register &Reg);
 
   /// Transform [asz]ext([asz]ext(x)) to [asz]ext x.
   bool matchCombineExtOfExt(MachineInstr &MI,
                             std::tuple<Register, unsigned> &MatchInfo);
   bool applyCombineExtOfExt(MachineInstr &MI,

llvm/include/llvm/Target/GlobalISel/Combine.td

 def add_p2i_to_ptradd_matchinfo : GIDefMatchData<"std::pair<Register, bool>">;
 def add_p2i_to_ptradd : GICombineRule<
   (defs root:$root, add_p2i_to_ptradd_matchinfo:$info),
   (match (wip_match_opcode G_ADD):$root,
     [{ return Helper.matchCombineAddP2IToPtrAdd(*${root}, ${info}); }]),
   (apply [{ return Helper.applyCombineAddP2IToPtrAdd(*${root}, ${info}); }])
 >;
 
+// Fold (ptr_add (int2ptr C1), C2) -> C1 + C2
+def const_ptradd_to_i2p_matchinfo : GIDefMatchData<"int64_t">;
+def const_ptradd_to_i2p: GICombineRule<
+  (defs root:$root, const_ptradd_to_i2p_matchinfo:$info),
+  (match (wip_match_opcode G_PTR_ADD):$root,
+    [{ return Helper.matchCombineConstPtrAddToI2P(*${root}, ${info}); }]),
+  (apply [{ return Helper.applyCombineConstPtrAddToI2P(*${root}, ${info}); }])
+>;
 
 // Simplify: (logic_op (op x...), (op y...)) -> (op (logic_op x, y))
 def hoist_logic_op_with_same_opcode_hands: GICombineRule <
   (defs root:$root, instruction_steps_matchdata:$info),
   (match (wip_match_opcode G_AND, G_OR, G_XOR):$root,
     [{ return Helper.matchHoistLogicOpWithSameOpcodeHands(*${root}, ${info}); }]),
   (apply [{ return Helper.applyBuildInstructionSteps(*${root}, ${info});}])
 >;
def undef_combines : GICombineGroup<[undef_to_fp_zero, undef_to_int_zero,
                                      erase_undef_store]>;
 
 def identity_combines : GICombineGroup<[select_same_val, right_identity_zero,
                                         binop_same_val, binop_left_to_zero,
                                         binop_right_to_zero, p2i_to_i2p,
                                         i2p_to_p2i, anyext_trunc_fold,
                                         fneg_fneg_fold, right_identity_one]>;
 
+def const_combines : GICombineGroup<[constant_fp_op, const_ptradd_to_i2p]>;
+
 def known_bits_simplifications : GICombineGroup<[
   and_trivial_mask, redundant_sext_inreg]>;
 
 def width_reduction_combines : GICombineGroup<[reduce_shl_of_extend]>;
 
 def select_combines : GICombineGroup<[select_undef_cmp, select_constant_cmp]>;
 
 def trivial_combines : GICombineGroup<[copy_prop, mul_to_shl, add_p2i_to_ptradd,
                                        mul_by_neg_one]>;
 
 def all_combines : GICombineGroup<[trivial_combines, ptr_add_immed_chain,
     combines_for_extload, combine_indexed_load_store, undef_combines,
     identity_combines, simplify_add_to_sub,
     hoist_logic_op_with_same_opcode_hands,
     shl_ashr_to_sext_inreg, sext_inreg_of_load,
     width_reduction_combines, select_combines,
     known_bits_simplifications, ext_ext_fold,
     not_cmp_fold, opt_brcond_by_inverting_cond,
     unmerge_merge, fabs_fabs_fold, unmerge_cst, unmerge_dead_to_trunc,
     unmerge_zext_to_zext, trunc_ext_fold, trunc_shl,
-    constant_fp_op, xor_of_and_with_same_reg]>;
+    xor_of_and_with_same_reg, const_combines]>;

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

bool CombinerHelper::applyCombineAddP2IToPtrAdd(
 
   Builder.setInstrAndDebugLoc(MI);
   auto PtrAdd = Builder.buildPtrAdd(PtrTy, LHS, RHS);
   Builder.buildPtrToInt(Dst, PtrAdd);
   MI.eraseFromParent();
   return true;
 }
 
+bool CombinerHelper::matchCombineConstPtrAddToI2P(MachineInstr &MI,
+                                                  int64_t &NewCst) {
+  assert(MI.getOpcode() == TargetOpcode::G_PTR_ADD && "Expected a G_PTR_ADD");
+  Register LHS = MI.getOperand(1).getReg();
+  Register RHS = MI.getOperand(2).getReg();
+  MachineRegisterInfo &MRI = Builder.getMF().getRegInfo();
+
+  if (auto RHSCst = getConstantVRegVal(RHS, MRI)) {
+    int64_t Cst;
+    if (mi_match(LHS, MRI, m_GIntToPtr(m_ICst(Cst)))) {
+      NewCst = Cst + *RHSCst;
+      return true;
+    }
+  }
+
+  return false;
+}
+
+bool CombinerHelper::applyCombineConstPtrAddToI2P(MachineInstr &MI,
+                                                  int64_t &NewCst) {
+  assert(MI.getOpcode() == TargetOpcode::G_PTR_ADD && "Expected a G_PTR_ADD");
+  Register Dst = MI.getOperand(0).getReg();
+
+  Builder.setInstrAndDebugLoc(MI);
+  Builder.buildConstant(Dst, NewCst);
+  MI.eraseFromParent();
+  return true;
+}
+
 bool CombinerHelper::matchCombineAnyExtTrunc(MachineInstr &MI, Register &Reg) {
   assert(MI.getOpcode() == TargetOpcode::G_ANYEXT && "Expected a G_ANYEXT");
   Register DstReg = MI.getOperand(0).getReg();
   Register SrcReg = MI.getOperand(1).getReg();
   LLT DstTy = MRI.getType(DstReg);
   return mi_match(SrcReg, MRI,
                   m_GTrunc(m_all_of(m_Reg(Reg), m_SpecificType(DstTy))));
 }

llvm/test/CodeGen/AArch64/GlobalISel/combine-ptradd-int2ptr.mir

+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s
+# RUN: llc -debugify-and-strip-all-safe -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s
+
+---
+name:            agc.test_combine_ptradd_constants_intres
+body:             |
+  bb.1:
+    liveins: $x0
+    ; CHECK-LABEL: name: agc.test_combine_ptradd_constants_intres
+    ; CHECK: [[C:%[0-9]+]]:_(p64) = G_CONSTANT i64 44
+    ; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[C]](p64)
+    ; CHECK: $x0 = COPY [[PTRTOINT]](s64)
+    %1:_(s32) = G_CONSTANT i32 42
+    %2:_(s32) = G_CONSTANT i32 2
+    %3:_(p64) = G_INTTOPTR %2
+    %4:_(p64) = G_PTR_ADD %3, %1
+    %5:_(s64) = G_PTRTOINT %4
+    $x0 = COPY %5(s64)
+...
+---
+name:            agc.test_combine_ptradd_constants_ptrres
+body:             |
+  bb.1:
+    liveins: $x0
+    ; CHECK-LABEL: name: agc.test_combine_ptradd_constants_ptrres
+    ; CHECK: [[C:%[0-9]+]]:_(p64) = G_CONSTANT i64 44
+    ; CHECK: $x0 = COPY [[C]](p64)
+    %1:_(s32) = G_CONSTANT i32 42
+    %2:_(s32) = G_CONSTANT i32 2
+    %3:_(p64) = G_INTTOPTR %2
+    %4:_(p64) = G_PTR_ADD %3, %1
+    $x0 = COPY %4(p64)
+...
+---
+name:            agc.test_not_combine_variable_ptradd
+body:             |
+  bb.1:
+    liveins: $x0, $x1
+    ; Ensure non-constant G_PTR_ADDs are not folded.
+    ; CHECK-LABEL: name: agc.test_not_combine_variable_ptradd
+    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42
+    ; CHECK: [[COPY:%[0-9]+]]:_(p64) = COPY $x1
+    ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p64) = G_PTR_ADD [[COPY]], [[C]](s32)
+    ; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[PTR_ADD]](p64)
+    ; CHECK: $x0 = COPY [[PTRTOINT]](s64)
+    %1:_(s32) = G_CONSTANT i32 42
+    %2:_(p64) = COPY $x1
+    %3:_(p64) = G_PTR_ADD %2, %1
+    %4:_(s64) = G_PTRTOINT %3
+    $x0 = COPY %4(s64)
+...