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[AMDGPU] should expand ROTL i16 to shifts.
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Authored by alex-t on Sep 14 2020, 9:55 AM.

Details

Summary

Instruction combining pass turns library rotl implementation to llvm.fshl.i16.
In the selection dag the intrinsic is turned to ISD::ROTL node that cannot be selected.
Need to expand it to shifts again.

Diff Detail

Event Timeline

alex-t created this revision.Sep 14 2020, 9:55 AM
Herald added a project: Restricted Project. · View Herald TranscriptSep 14 2020, 9:55 AM
alex-t requested review of this revision.Sep 14 2020, 9:55 AM

Needs test.

llvm/lib/Target/AMDGPU/SIISelLowering.cpp
548–549

What about rotr?

arsenm requested changes to this revision.Sep 14 2020, 10:41 AM

Needs test

This revision now requires changes to proceed.Sep 14 2020, 10:41 AM
alex-t updated this revision to Diff 291967.Sep 15 2020, 10:32 AM

Tests added. ROTR case added.

Should go into existing fshr and fshr tests

alex-t updated this revision to Diff 292147.Sep 16 2020, 2:04 AM

tests moved to existing rotl/rotr tests

arsenm accepted this revision.Sep 16 2020, 6:16 AM
This revision is now accepted and ready to land.Sep 16 2020, 6:16 AM
This revision was automatically updated to reflect the committed changes.