Prefer vpxor over vpxorps for AVX2 PR36127

[dtemirbulatov]

Summary

As discussed in PR36127: AFAIK the throughput of the integer operations is always better or equal to the throughput of the floating-point operations in all x86/x86_64 CPU architectures to date. That is, if the default were to be changed from vxorps to vpxor things would always work out optimally (at least for now).

[craig.topper]

llvm/lib/Target/X86/X86InstrInfo.cpp

7456

I don't understand how this code works. The first thing SetBlendDomain does is check if the last operand is an immediate which should be false for XOR. And what does the 14 mean?

[RKSimon]

TBH I think we're better off working on PR44125 to handle this kind of thing

[craig.topper]

In D87295#2261408, @RKSimon wrote:

TBH I think we're better off working on PR44125 to handle this kind of thing

I had a partial patch I toyed with a while back. I'll see if i can dig it up.

[RKSimon]

In D87295#2261432, @craig.topper wrote:

In D87295#2261408, @RKSimon wrote:

TBH I think we're better off working on PR44125 to handle this kind of thing

I had a partial patch I toyed with a while back. I'll see if i can dig it up.

@craig.topper Did you manage to find that patch?

[craig.topper]

In D87295#2442370, @RKSimon wrote:

In D87295#2261432, @craig.topper wrote:

In D87295#2261408, @RKSimon wrote:

TBH I think we're better off working on PR44125 to handle this kind of thing

I had a partial patch I toyed with a while back. I'll see if i can dig it up.

@craig.topper Did you manage to find that patch?

Posted here https://reviews.llvm.org/D92993

[dtemirbulatov]

Abandoning over D92993

llvm/lib/Target/X86/X86InstrInfo.cpp

bool X86InstrInfo::setExecutionDomainCustom(MachineInstr &MI,
   case X86::PBLENDWrmi:
   case X86::PBLENDWrri:
   case X86::VPBLENDWrmi:
   case X86::VPBLENDWrri:
     return SetBlendDomain(8, false);
   case X86::VPBLENDWYrmi:
   case X86::VPBLENDWYrri:
     return SetBlendDomain(16, true);
+  case X86::VPXORYrm:
+  case X86::VPXORYrr:
+  case X86::VXORPSYrm:
+  case X86::VXORPSYrr:
+    return SetBlendDomain(14, true);
   case X86::VPANDDZ128rr:  case X86::VPANDDZ128rm:
   case X86::VPANDDZ256rr:  case X86::VPANDDZ256rm:
   case X86::VPANDQZ128rr:  case X86::VPANDQZ128rm:
   case X86::VPANDQZ256rr:  case X86::VPANDQZ256rm:
   case X86::VPANDNDZ128rr: case X86::VPANDNDZ128rm:
   case X86::VPANDNDZ256rr: case X86::VPANDNDZ256rm:
   case X86::VPANDNQZ128rr: case X86::VPANDNQZ128rm:
   case X86::VPANDNQZ256rr: case X86::VPANDNQZ256rm:

llvm/test/CodeGen/X86/avx-logic.ll

 entry:
   %0 = bitcast <8 x float> %y to <8 x i32>
   %and.i = and <8 x i32> %0, <i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938, i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938>
   %1 = bitcast <8 x i32> %and.i to <8 x float>
   ret <8 x float> %1
 }
 
 define <4 x double> @xorpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp {
-; ANY-LABEL: xorpd256:
-; ANY:       # %bb.0: # %entry
-; ANY-NEXT:    vxorpd %ymm0, %ymm1, %ymm0
-; ANY-NEXT:    vxorpd %xmm1, %xmm1, %xmm1
-; ANY-NEXT:    vaddpd %ymm1, %ymm0, %ymm0
-; ANY-NEXT:    retq
+; AVX1-LABEL: xorpd256:
+; AVX1:       # %bb.0: # %entry
+; AVX1-NEXT:    vxorps %ymm0, %ymm1, %ymm0
+; AVX1-NEXT:    vxorpd %xmm1, %xmm1, %xmm1
+; AVX1-NEXT:    vaddpd %ymm1, %ymm0, %ymm0
+; AVX1-NEXT:    retq
+;
+; INT256-LABEL: xorpd256:
+; INT256:       # %bb.0: # %entry
+; INT256-NEXT:    vpxor %ymm0, %ymm1, %ymm0
+; INT256-NEXT:    vxorpd %xmm1, %xmm1, %xmm1
+; INT256-NEXT:    vaddpd %ymm1, %ymm0, %ymm0
+; INT256-NEXT:    retq
 entry:
   %0 = bitcast <4 x double> %x to <4 x i64>
   %1 = bitcast <4 x double> %y to <4 x i64>
   %xor.i = xor <4 x i64> %0, %1
   %2 = bitcast <4 x i64> %xor.i to <4 x double>
   ; add forces execution domain
   %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>
   ret <4 x double> %3
 }
 
 define <4 x double> @xorpd256fold(<4 x double> %y) nounwind uwtable readnone ssp {
-; ANY-LABEL: xorpd256fold:
-; ANY:       # %bb.0: # %entry
-; ANY-NEXT:    vxorpd {{.*}}(%rip), %ymm0, %ymm0
-; ANY-NEXT:    vxorpd %xmm1, %xmm1, %xmm1
-; ANY-NEXT:    vaddpd %ymm1, %ymm0, %ymm0
-; ANY-NEXT:    retq
+; AVX1-LABEL: xorpd256fold:
+; AVX1:       # %bb.0: # %entry
+; AVX1-NEXT:    vxorps {{.*}}(%rip), %ymm0, %ymm0
+; AVX1-NEXT:    vxorpd %xmm1, %xmm1, %xmm1
+; AVX1-NEXT:    vaddpd %ymm1, %ymm0, %ymm0
+; AVX1-NEXT:    retq
+;
+; INT256-LABEL: xorpd256fold:
+; INT256:       # %bb.0: # %entry
+; INT256-NEXT:    vpxor {{.*}}(%rip), %ymm0, %ymm0
+; INT256-NEXT:    vxorpd %xmm1, %xmm1, %xmm1
+; INT256-NEXT:    vaddpd %ymm1, %ymm0, %ymm0
+; INT256-NEXT:    retq
 entry:
   %0 = bitcast <4 x double> %y to <4 x i64>
   %xor.i = xor <4 x i64> %0, <i64 4616752568008179712, i64 4614838538166547251, i64 4612361558371493478, i64 4608083138725491507>
   %1 = bitcast <4 x i64> %xor.i to <4 x double>
   ; add forces execution domain
   %2 = fadd <4 x double> %1, <double 0x0, double 0x0, double 0x0, double 0x0>
   ret <4 x double> %2
 }
 
 define <8 x float> @xorps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp {
-; ANY-LABEL: xorps256:
-; ANY:       # %bb.0: # %entry
-; ANY-NEXT:    vxorps %ymm0, %ymm1, %ymm0
-; ANY-NEXT:    retq
+; AVX1-LABEL: xorps256:
+; AVX1:       # %bb.0: # %entry
+; AVX1-NEXT:    vxorps %ymm0, %ymm1, %ymm0
+; AVX1-NEXT:    retq
+;
+; INT256-LABEL: xorps256:
+; INT256:       # %bb.0: # %entry
+; INT256-NEXT:    vpxor %ymm0, %ymm1, %ymm0
+; INT256-NEXT:    retq
 entry:
   %0 = bitcast <8 x float> %x to <8 x i32>
   %1 = bitcast <8 x float> %y to <8 x i32>
   %xor.i = xor <8 x i32> %0, %1
   %2 = bitcast <8 x i32> %xor.i to <8 x float>
   ret <8 x float> %2
 }
 
 define <8 x float> @xorps256fold(<8 x float> %y) nounwind uwtable readnone ssp {
-; ANY-LABEL: xorps256fold:
-; ANY:       # %bb.0: # %entry
-; ANY-NEXT:    vxorps {{.*}}(%rip), %ymm0, %ymm0
-; ANY-NEXT:    retq
+; AVX1-LABEL: xorps256fold:
+; AVX1:       # %bb.0: # %entry
+; AVX1-NEXT:    vxorps {{.*}}(%rip), %ymm0, %ymm0
+; AVX1-NEXT:    retq
+;
+; INT256-LABEL: xorps256fold:
+; INT256:       # %bb.0: # %entry
+; INT256-NEXT:    vpxor {{.*}}(%rip), %ymm0, %ymm0
+; INT256-NEXT:    retq
 entry:
   %0 = bitcast <8 x float> %y to <8 x i32>
   %xor.i = xor <8 x i32> %0, <i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938, i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938>
   %1 = bitcast <8 x i32> %xor.i to <8 x float>
   ret <8 x float> %1
 }
 
 define <4 x double> @orpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp {

llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll

 ; CHECK-NEXT:    ret{{[l|q]}}
   %res = shufflevector <4 x i64> %a0, <4 x i64> %a1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   ret <4 x i64> %res
 }
 
 define <4 x i64> @test_mm256_xor_si256(<4 x i64> %a0, <4 x i64> %a1) nounwind {
 ; CHECK-LABEL: test_mm256_xor_si256:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vxorps %ymm1, %ymm0, %ymm0
+; CHECK-NEXT:    vpxor %ymm1, %ymm0, %ymm0
 ; CHECK-NEXT:    ret{{[l|q]}}
   %res = xor <4 x i64> %a0, %a1
   ret <4 x i64> %res
 }
 
 declare <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float>, <8 x float>, i8) nounwind readnone
 
 declare <4 x double> @llvm.x86.avx.cmp.pd.256(<4 x double>, <4 x double>, i8) nounwind readnone

llvm/test/CodeGen/X86/avx512-arith.ll

; SKX-NEXT:    retq
   %res = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %a
   ret <16 x float>%res
 }
 
 define <8 x float>  @test_fxor_8f32(<8 x float> %a) {
 ; AVX512F-LABEL: test_fxor_8f32:
 ; AVX512F:       # %bb.0:
 ; AVX512F-NEXT:    vbroadcastss {{.*#+}} ymm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
-; AVX512F-NEXT:    vxorps %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT:    vpxor %ymm1, %ymm0, %ymm0
 ; AVX512F-NEXT:    retq
 ;
 ; AVX512VL-LABEL: test_fxor_8f32:
 ; AVX512VL:       # %bb.0:
 ; AVX512VL-NEXT:    vpxord {{.*}}(%rip){1to8}, %ymm0, %ymm0
 ; AVX512VL-NEXT:    retq
 ;
 ; AVX512BW-LABEL: test_fxor_8f32:
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    vbroadcastss {{.*#+}} ymm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
-; AVX512BW-NEXT:    vxorps %ymm1, %ymm0, %ymm0
+; AVX512BW-NEXT:    vpxor %ymm1, %ymm0, %ymm0
 ; AVX512BW-NEXT:    retq
 ;
 ; AVX512DQ-LABEL: test_fxor_8f32:
 ; AVX512DQ:       # %bb.0:
 ; AVX512DQ-NEXT:    vbroadcastss {{.*#+}} ymm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
-; AVX512DQ-NEXT:    vxorps %ymm1, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vpxor %ymm1, %ymm0, %ymm0
 ; AVX512DQ-NEXT:    retq
 ;
 ; SKX-LABEL: test_fxor_8f32:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vxorps {{.*}}(%rip){1to8}, %ymm0, %ymm0
 ; SKX-NEXT:    retq
   %res = fsub <8 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %a
   ret <8 x float>%res

llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll

 ; SSE2-SSSE3-NEXT:    cmpltps %xmm4, %xmm6
 ; SSE2-SSSE3-NEXT:    packssdw %xmm7, %xmm6
 ; SSE2-SSSE3-NEXT:    pxor %xmm2, %xmm6
 ; SSE2-SSSE3-NEXT:    packsswb %xmm6, %xmm6
 ; SSE2-SSSE3-NEXT:    pmovmskb %xmm6, %eax
 ; SSE2-SSSE3-NEXT:    # kill: def $al killed $al killed $eax
 ; SSE2-SSSE3-NEXT:    retq
 ;
-; AVX12-LABEL: v8f32_xor:
-; AVX12:       # %bb.0:
-; AVX12-NEXT:    vcmpltps %ymm2, %ymm3, %ymm2
-; AVX12-NEXT:    vcmpltps %ymm0, %ymm1, %ymm0
-; AVX12-NEXT:    vxorps %ymm2, %ymm0, %ymm0
-; AVX12-NEXT:    vmovmskps %ymm0, %eax
-; AVX12-NEXT:    # kill: def $al killed $al killed $eax
-; AVX12-NEXT:    vzeroupper
-; AVX12-NEXT:    retq
+; AVX1-LABEL: v8f32_xor:
+; AVX1:       # %bb.0:
+; AVX1-NEXT:    vcmpltps %ymm2, %ymm3, %ymm2
+; AVX1-NEXT:    vcmpltps %ymm0, %ymm1, %ymm0
+; AVX1-NEXT:    vxorps %ymm2, %ymm0, %ymm0
+; AVX1-NEXT:    vmovmskps %ymm0, %eax
+; AVX1-NEXT:    # kill: def $al killed $al killed $eax
+; AVX1-NEXT:    vzeroupper
+; AVX1-NEXT:    retq
+;
+; AVX2-LABEL: v8f32_xor:
+; AVX2:       # %bb.0:
+; AVX2-NEXT:    vcmpltps %ymm2, %ymm3, %ymm2
+; AVX2-NEXT:    vcmpltps %ymm0, %ymm1, %ymm0
+; AVX2-NEXT:    vpxor %ymm2, %ymm0, %ymm0
+; AVX2-NEXT:    vmovmskps %ymm0, %eax
+; AVX2-NEXT:    # kill: def $al killed $al killed $eax
+; AVX2-NEXT:    vzeroupper
+; AVX2-NEXT:    retq
 ;
 ; AVX512F-LABEL: v8f32_xor:
 ; AVX512F:       # %bb.0:
 ; AVX512F-NEXT:    vcmpltps %ymm0, %ymm1, %k0
 ; AVX512F-NEXT:    vcmpltps %ymm2, %ymm3, %k1
 ; AVX512F-NEXT:    kxorw %k1, %k0, %k0
 ; AVX512F-NEXT:    kmovw %k0, %eax
 ; AVX512F-NEXT:    # kill: def $al killed $al killed $eax

 ; SSE2-SSSE3-NEXT:    cmpltps {{[0-9]+}}(%rsp), %xmm8
 ; SSE2-SSSE3-NEXT:    packssdw %xmm9, %xmm8
 ; SSE2-SSSE3-NEXT:    pand %xmm4, %xmm8
 ; SSE2-SSSE3-NEXT:    packsswb %xmm8, %xmm8
 ; SSE2-SSSE3-NEXT:    pmovmskb %xmm8, %eax
 ; SSE2-SSSE3-NEXT:    # kill: def $al killed $al killed $eax
 ; SSE2-SSSE3-NEXT:    retq
 ;
-; AVX12-LABEL: v8f32_xor_and:
-; AVX12:       # %bb.0:
-; AVX12-NEXT:    vcmpeq_uqps %ymm3, %ymm2, %ymm2
-; AVX12-NEXT:    vcmpnleps %ymm1, %ymm0, %ymm0
-; AVX12-NEXT:    vxorps %ymm2, %ymm0, %ymm0
-; AVX12-NEXT:    vcmpltps %ymm4, %ymm5, %ymm1
-; AVX12-NEXT:    vandps %ymm1, %ymm0, %ymm0
-; AVX12-NEXT:    vmovmskps %ymm0, %eax
-; AVX12-NEXT:    # kill: def $al killed $al killed $eax
-; AVX12-NEXT:    vzeroupper
-; AVX12-NEXT:    retq
+; AVX1-LABEL: v8f32_xor_and:
+; AVX1:       # %bb.0:
+; AVX1-NEXT:    vcmpeq_uqps %ymm3, %ymm2, %ymm2
+; AVX1-NEXT:    vcmpnleps %ymm1, %ymm0, %ymm0
+; AVX1-NEXT:    vxorps %ymm2, %ymm0, %ymm0
+; AVX1-NEXT:    vcmpltps %ymm4, %ymm5, %ymm1
+; AVX1-NEXT:    vandps %ymm1, %ymm0, %ymm0
+; AVX1-NEXT:    vmovmskps %ymm0, %eax
+; AVX1-NEXT:    # kill: def $al killed $al killed $eax
+; AVX1-NEXT:    vzeroupper
+; AVX1-NEXT:    retq
+;
+; AVX2-LABEL: v8f32_xor_and:
+; AVX2:       # %bb.0:
+; AVX2-NEXT:    vcmpeq_uqps %ymm3, %ymm2, %ymm2
+; AVX2-NEXT:    vcmpnleps %ymm1, %ymm0, %ymm0
+; AVX2-NEXT:    vpxor %ymm2, %ymm0, %ymm0
+; AVX2-NEXT:    vcmpltps %ymm4, %ymm5, %ymm1
+; AVX2-NEXT:    vandps %ymm1, %ymm0, %ymm0
+; AVX2-NEXT:    vmovmskps %ymm0, %eax
+; AVX2-NEXT:    # kill: def $al killed $al killed $eax
+; AVX2-NEXT:    vzeroupper
+; AVX2-NEXT:    retq
 ;
 ; AVX512F-LABEL: v8f32_xor_and:
 ; AVX512F:       # %bb.0:
 ; AVX512F-NEXT:    vcmpnleps %ymm1, %ymm0, %k0
 ; AVX512F-NEXT:    vcmpeq_uqps %ymm3, %ymm2, %k1
 ; AVX512F-NEXT:    kxorw %k1, %k0, %k1
 ; AVX512F-NEXT:    vcmpltps %ymm4, %ymm5, %k0 {%k1}
 ; AVX512F-NEXT:    kmovw %k0, %eax

llvm/test/CodeGen/X86/fma-intrinsics-fast-isel.ll

entry:
   %sub.i = fsub <8 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %c
   %0 = tail call <8 x float> @llvm.fma.v8f32(<8 x float> %a, <8 x float> %b, <8 x float> %sub.i) #2
   ret <8 x float> %0
 }
 
 define <4 x double> @test_mm256_fmsub_pd(<4 x double> %a, <4 x double> %b, <4 x double> %c) {
 ; CHECK-LABEL: test_mm256_fmsub_pd:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    vxorpd {{.*}}(%rip), %ymm2, %ymm2
+; CHECK-NEXT:    vxorps {{.*}}(%rip), %ymm2, %ymm2
 ; CHECK-NEXT:    vfmadd213pd {{.*#+}} ymm0 = (ymm1 * ymm0) + ymm2
 ; CHECK-NEXT:    retq
 entry:
   %sub.i = fsub <4 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %c
   %0 = tail call <4 x double> @llvm.fma.v4f64(<4 x double> %a, <4 x double> %b, <4 x double> %sub.i) #2
   ret <4 x double> %0
 }
 
 define <8 x float> @test_mm256_fnmadd_ps(<8 x float> %a, <8 x float> %b, <8 x float> %c) {
 ; CHECK-LABEL: test_mm256_fnmadd_ps:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    vxorps {{.*}}(%rip), %ymm0, %ymm0
 ; CHECK-NEXT:    vfmadd213ps {{.*#+}} ymm0 = (ymm1 * ymm0) + ymm2
 ; CHECK-NEXT:    retq
 entry:
   %sub.i = fsub <8 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %a
   %0 = tail call <8 x float> @llvm.fma.v8f32(<8 x float> %sub.i, <8 x float> %b, <8 x float> %c) #2
   ret <8 x float> %0
 }
 
 define <4 x double> @test_mm256_fnmadd_pd(<4 x double> %a, <4 x double> %b, <4 x double> %c) {
 ; CHECK-LABEL: test_mm256_fnmadd_pd:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    vxorpd {{.*}}(%rip), %ymm0, %ymm0
+; CHECK-NEXT:    vxorps {{.*}}(%rip), %ymm0, %ymm0
 ; CHECK-NEXT:    vfmadd213pd {{.*#+}} ymm0 = (ymm1 * ymm0) + ymm2
 ; CHECK-NEXT:    retq
 entry:
   %sub.i = fsub <4 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %a
   %0 = tail call <4 x double> @llvm.fma.v4f64(<4 x double> %sub.i, <4 x double> %b, <4 x double> %c) #2
   ret <4 x double> %0
 }
 
entry:
   %0 = tail call <8 x float> @llvm.fma.v8f32(<8 x float> %sub.i, <8 x float> %b, <8 x float> %sub1.i) #2
   ret <8 x float> %0
 }
 
 define <4 x double> @test_mm256_fnmsub_pd(<4 x double> %a, <4 x double> %b, <4 x double> %c) {
 ; CHECK-LABEL: test_mm256_fnmsub_pd:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    vmovapd {{.*#+}} ymm3 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
-; CHECK-NEXT:    vxorpd %ymm3, %ymm0, %ymm4
-; CHECK-NEXT:    vxorpd %ymm3, %ymm2, %ymm0
+; CHECK-NEXT:    vxorps %ymm3, %ymm0, %ymm4
+; CHECK-NEXT:    vxorps %ymm3, %ymm2, %ymm0
 ; CHECK-NEXT:    vfmadd231pd {{.*#+}} ymm0 = (ymm1 * ymm4) + ymm0
 ; CHECK-NEXT:    retq
 entry:
   %sub.i = fsub <4 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %a
   %sub1.i = fsub <4 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %c
   %0 = tail call <4 x double> @llvm.fma.v4f64(<4 x double> %sub.i, <4 x double> %b, <4 x double> %sub1.i) #2
   ret <4 x double> %0
 }

llvm/test/CodeGen/X86/fma_patterns.ll

; AVX512-NEXT:    retq
   %n = fsub <4 x double> <double -0.0, double -0.0, double -0.0, double -0.0>, %m
   ret <4 x double> %n
 }
 
 define <4 x double> @test_v4f64_fneg_fmul_no_nsz(<4 x double> %x, <4 x double> %y) #0 {
 ; FMA-LABEL: test_v4f64_fneg_fmul_no_nsz:
 ; FMA:       # %bb.0:
 ; FMA-NEXT:    vmulpd %ymm1, %ymm0, %ymm0
-; FMA-NEXT:    vxorpd {{.*}}(%rip), %ymm0, %ymm0
+; FMA-NEXT:    vxorps {{.*}}(%rip), %ymm0, %ymm0
 ; FMA-NEXT:    retq
 ;
 ; FMA4-LABEL: test_v4f64_fneg_fmul_no_nsz:
 ; FMA4:       # %bb.0:
 ; FMA4-NEXT:    vmulpd %ymm1, %ymm0, %ymm0
-; FMA4-NEXT:    vxorpd {{.*}}(%rip), %ymm0, %ymm0
+; FMA4-NEXT:    vxorps {{.*}}(%rip), %ymm0, %ymm0
 ; FMA4-NEXT:    retq
 ;
 ; AVX512-LABEL: test_v4f64_fneg_fmul_no_nsz:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vmulpd %ymm1, %ymm0, %ymm0
 ; AVX512-NEXT:    vxorpd {{.*}}(%rip){1to4}, %ymm0, %ymm0
 ; AVX512-NEXT:    retq
   %m = fmul <4 x double> %x, %y

llvm/test/CodeGen/X86/fma_patterns_wide.ll

 }
 
 define <8 x double> @test_v8f64_fneg_fmul_no_nsz(<8 x double> %x, <8 x double> %y) #0 {
 ; FMA-LABEL: test_v8f64_fneg_fmul_no_nsz:
 ; FMA:       # %bb.0:
 ; FMA-NEXT:    vmulpd %ymm3, %ymm1, %ymm1
 ; FMA-NEXT:    vmulpd %ymm2, %ymm0, %ymm0
 ; FMA-NEXT:    vmovapd {{.*#+}} ymm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
-; FMA-NEXT:    vxorpd %ymm2, %ymm0, %ymm0
-; FMA-NEXT:    vxorpd %ymm2, %ymm1, %ymm1
+; FMA-NEXT:    vxorps %ymm2, %ymm0, %ymm0
+; FMA-NEXT:    vxorps %ymm2, %ymm1, %ymm1
 ; FMA-NEXT:    retq
 ;
 ; FMA4-LABEL: test_v8f64_fneg_fmul_no_nsz:
 ; FMA4:       # %bb.0:
 ; FMA4-NEXT:    vmulpd %ymm3, %ymm1, %ymm1
 ; FMA4-NEXT:    vmulpd %ymm2, %ymm0, %ymm0
 ; FMA4-NEXT:    vmovapd {{.*#+}} ymm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
-; FMA4-NEXT:    vxorpd %ymm2, %ymm0, %ymm0
-; FMA4-NEXT:    vxorpd %ymm2, %ymm1, %ymm1
+; FMA4-NEXT:    vxorps %ymm2, %ymm0, %ymm0
+; FMA4-NEXT:    vxorps %ymm2, %ymm1, %ymm1
 ; FMA4-NEXT:    retq
 ;
 ; AVX512-LABEL: test_v8f64_fneg_fmul_no_nsz:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vmulpd %zmm1, %zmm0, %zmm0
 ; AVX512-NEXT:    vxorpd {{.*}}(%rip){1to8}, %zmm0, %zmm0
 ; AVX512-NEXT:    retq
   %m = fmul <8 x double> %x, %y
   %n = fsub <8 x double> <double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0>, %m
   ret <8 x double> %n
 }
 
 attributes #0 = { "unsafe-fp-math"="true" }

llvm/test/CodeGen/X86/machine-combiner-int-vec.ll

 ; AVX2-LABEL: reassociate_umax_v4i64:
 ; AVX2:       # %bb.0:
 ; AVX2-NEXT:    vpaddq %ymm1, %ymm0, %ymm0
 ; AVX2-NEXT:    vpbroadcastq {{.*#+}} ymm1 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
 ; AVX2-NEXT:    vpxor %ymm1, %ymm2, %ymm4
 ; AVX2-NEXT:    vpxor %ymm1, %ymm0, %ymm5
 ; AVX2-NEXT:    vpcmpgtq %ymm5, %ymm4, %ymm4
 ; AVX2-NEXT:    vblendvpd %ymm4, %ymm2, %ymm0, %ymm0
-; AVX2-NEXT:    vxorpd %ymm1, %ymm0, %ymm2
+; AVX2-NEXT:    vpxor %ymm1, %ymm0, %ymm2
 ; AVX2-NEXT:    vpxor %ymm1, %ymm3, %ymm1
 ; AVX2-NEXT:    vpcmpgtq %ymm2, %ymm1, %ymm1
 ; AVX2-NEXT:    vblendvpd %ymm1, %ymm3, %ymm0, %ymm0
 ; AVX2-NEXT:    retq
 ;
 ; AVX512-LABEL: reassociate_umax_v4i64:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpaddq %ymm1, %ymm0, %ymm0

 ; AVX2-LABEL: reassociate_umin_v4i64:
 ; AVX2:       # %bb.0:
 ; AVX2-NEXT:    vpaddq %ymm1, %ymm0, %ymm0
 ; AVX2-NEXT:    vpbroadcastq {{.*#+}} ymm1 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
 ; AVX2-NEXT:    vpxor %ymm1, %ymm2, %ymm4
 ; AVX2-NEXT:    vpxor %ymm1, %ymm0, %ymm5
 ; AVX2-NEXT:    vpcmpgtq %ymm4, %ymm5, %ymm4
 ; AVX2-NEXT:    vblendvpd %ymm4, %ymm2, %ymm0, %ymm0
-; AVX2-NEXT:    vxorpd %ymm1, %ymm0, %ymm2
+; AVX2-NEXT:    vpxor %ymm1, %ymm0, %ymm2
 ; AVX2-NEXT:    vpxor %ymm1, %ymm3, %ymm1
 ; AVX2-NEXT:    vpcmpgtq %ymm1, %ymm2, %ymm1
 ; AVX2-NEXT:    vblendvpd %ymm1, %ymm3, %ymm0, %ymm0
 ; AVX2-NEXT:    retq
 ;
 ; AVX512-LABEL: reassociate_umin_v4i64:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpaddq %ymm1, %ymm0, %ymm0

 ; AVX2-NEXT:    vpxor %ymm3, %ymm1, %ymm9
 ; AVX2-NEXT:    vpcmpgtq %ymm9, %ymm8, %ymm8
 ; AVX2-NEXT:    vblendvpd %ymm8, %ymm5, %ymm1, %ymm1
 ; AVX2-NEXT:    vpaddq %ymm2, %ymm0, %ymm0
 ; AVX2-NEXT:    vpxor %ymm3, %ymm4, %ymm2
 ; AVX2-NEXT:    vpxor %ymm3, %ymm0, %ymm5
 ; AVX2-NEXT:    vpcmpgtq %ymm5, %ymm2, %ymm2
 ; AVX2-NEXT:    vblendvpd %ymm2, %ymm4, %ymm0, %ymm0
-; AVX2-NEXT:    vxorpd %ymm3, %ymm0, %ymm2
+; AVX2-NEXT:    vpxor %ymm3, %ymm0, %ymm2
 ; AVX2-NEXT:    vpxor %ymm3, %ymm6, %ymm4
 ; AVX2-NEXT:    vpcmpgtq %ymm2, %ymm4, %ymm2
 ; AVX2-NEXT:    vblendvpd %ymm2, %ymm6, %ymm0, %ymm0
-; AVX2-NEXT:    vxorpd %ymm3, %ymm1, %ymm2
+; AVX2-NEXT:    vpxor %ymm3, %ymm1, %ymm2
 ; AVX2-NEXT:    vpxor %ymm3, %ymm7, %ymm3
 ; AVX2-NEXT:    vpcmpgtq %ymm2, %ymm3, %ymm2
 ; AVX2-NEXT:    vblendvpd %ymm2, %ymm7, %ymm1, %ymm1
 ; AVX2-NEXT:    retq
 ;
 ; AVX512-LABEL: reassociate_umax_v8i64:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpaddq %zmm1, %zmm0, %zmm0

 ; AVX2-NEXT:    vpxor %ymm3, %ymm1, %ymm9
 ; AVX2-NEXT:    vpcmpgtq %ymm8, %ymm9, %ymm8
 ; AVX2-NEXT:    vblendvpd %ymm8, %ymm5, %ymm1, %ymm1
 ; AVX2-NEXT:    vpaddq %ymm2, %ymm0, %ymm0
 ; AVX2-NEXT:    vpxor %ymm3, %ymm4, %ymm2
 ; AVX2-NEXT:    vpxor %ymm3, %ymm0, %ymm5
 ; AVX2-NEXT:    vpcmpgtq %ymm2, %ymm5, %ymm2
 ; AVX2-NEXT:    vblendvpd %ymm2, %ymm4, %ymm0, %ymm0
-; AVX2-NEXT:    vxorpd %ymm3, %ymm0, %ymm2
+; AVX2-NEXT:    vpxor %ymm3, %ymm0, %ymm2
 ; AVX2-NEXT:    vpxor %ymm3, %ymm6, %ymm4
 ; AVX2-NEXT:    vpcmpgtq %ymm4, %ymm2, %ymm2
 ; AVX2-NEXT:    vblendvpd %ymm2, %ymm6, %ymm0, %ymm0
-; AVX2-NEXT:    vxorpd %ymm3, %ymm1, %ymm2
+; AVX2-NEXT:    vpxor %ymm3, %ymm1, %ymm2
 ; AVX2-NEXT:    vpxor %ymm3, %ymm7, %ymm3
 ; AVX2-NEXT:    vpcmpgtq %ymm3, %ymm2, %ymm2
 ; AVX2-NEXT:    vblendvpd %ymm2, %ymm7, %ymm1, %ymm1
 ; AVX2-NEXT:    retq
 ;
 ; AVX512-LABEL: reassociate_umin_v8i64:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpaddq %zmm1, %zmm0, %zmm0

llvm/test/CodeGen/X86/promote-cmp.ll

 ;
 ; AVX1-LABEL: PR45808:
 ; AVX1:       # %bb.0:
 ; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
 ; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
 ; AVX1-NEXT:    vpcmpgtq %xmm2, %xmm3, %xmm2
 ; AVX1-NEXT:    vpcmpgtq %xmm1, %xmm0, %xmm3
 ; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm3, %ymm2
-; AVX1-NEXT:    vxorpd {{.*}}(%rip), %ymm2, %ymm2
+; AVX1-NEXT:    vxorps {{.*}}(%rip), %ymm2, %ymm2
 ; AVX1-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
 ; AVX1-NEXT:    retq
 ;
 ; AVX2-LABEL: PR45808:
 ; AVX2:       # %bb.0:
 ; AVX2-NEXT:    vpcmpgtq %ymm1, %ymm0, %ymm2
 ; AVX2-NEXT:    vpxor {{.*}}(%rip), %ymm2, %ymm2
 ; AVX2-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
 ; AVX2-NEXT:    retq
   %3 = icmp sgt <4 x i64> %0, %1
   %4 = xor <4 x i1> %3, <i1 true, i1 true, i1 false, i1 false>
   %5 = select <4 x i1> %4, <4 x i64> %0, <4 x i64> %1
   ret <4 x i64> %5
 }

llvm/test/CodeGen/X86/sadd_sat_vec.ll

 ; AVX1-NEXT:    vpaddq %xmm2, %xmm3, %xmm2
 ; AVX1-NEXT:    vpaddq %xmm1, %xmm0, %xmm4
 ; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm4, %ymm5
 ; AVX1-NEXT:    vmovapd {{.*#+}} ymm6 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
 ; AVX1-NEXT:    vblendvpd %ymm5, {{.*}}(%rip), %ymm6, %ymm6
 ; AVX1-NEXT:    vpcmpgtq %xmm2, %xmm3, %xmm2
 ; AVX1-NEXT:    vpcmpgtq %xmm4, %xmm0, %xmm0
 ; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
-; AVX1-NEXT:    vxorpd %ymm0, %ymm1, %ymm0
+; AVX1-NEXT:    vxorps %ymm0, %ymm1, %ymm0
 ; AVX1-NEXT:    vblendvpd %ymm0, %ymm6, %ymm5, %ymm0
 ; AVX1-NEXT:    retq
 ;
 ; AVX2-LABEL: v4i64:
 ; AVX2:       # %bb.0:
 ; AVX2-NEXT:    vpaddq %ymm1, %ymm0, %ymm2
 ; AVX2-NEXT:    vbroadcastsd {{.*#+}} ymm3 = [9223372036854775807,9223372036854775807,9223372036854775807,9223372036854775807]
 ; AVX2-NEXT:    vbroadcastsd {{.*#+}} ymm4 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]

 ; AVX1-NEXT:    vpaddq %xmm2, %xmm0, %xmm6
 ; AVX1-NEXT:    vinsertf128 $1, %xmm4, %ymm6, %ymm7
 ; AVX1-NEXT:    vmovapd {{.*#+}} ymm8 = [9223372036854775807,9223372036854775807,9223372036854775807,9223372036854775807]
 ; AVX1-NEXT:    vmovapd {{.*#+}} ymm9 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
 ; AVX1-NEXT:    vblendvpd %ymm7, %ymm8, %ymm9, %ymm10
 ; AVX1-NEXT:    vpcmpgtq %xmm4, %xmm5, %xmm4
 ; AVX1-NEXT:    vpcmpgtq %xmm6, %xmm0, %xmm0
 ; AVX1-NEXT:    vinsertf128 $1, %xmm4, %ymm0, %ymm0
-; AVX1-NEXT:    vxorpd %ymm0, %ymm2, %ymm0
+; AVX1-NEXT:    vxorps %ymm0, %ymm2, %ymm0
 ; AVX1-NEXT:    vblendvpd %ymm0, %ymm10, %ymm7, %ymm0
 ; AVX1-NEXT:    vextractf128 $1, %ymm3, %xmm2
 ; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm4
 ; AVX1-NEXT:    vpaddq %xmm2, %xmm4, %xmm2
 ; AVX1-NEXT:    vpaddq %xmm3, %xmm1, %xmm5
 ; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm5, %ymm6
 ; AVX1-NEXT:    vblendvpd %ymm6, %ymm8, %ymm9, %ymm7
 ; AVX1-NEXT:    vpcmpgtq %xmm2, %xmm4, %xmm2
 ; AVX1-NEXT:    vpcmpgtq %xmm5, %xmm1, %xmm1
 ; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm1, %ymm1
-; AVX1-NEXT:    vxorpd %ymm1, %ymm3, %ymm1
+; AVX1-NEXT:    vxorps %ymm1, %ymm3, %ymm1
 ; AVX1-NEXT:    vblendvpd %ymm1, %ymm7, %ymm6, %ymm1
 ; AVX1-NEXT:    retq
 ;
 ; AVX2-LABEL: v8i64:
 ; AVX2:       # %bb.0:
 ; AVX2-NEXT:    vpaddq %ymm2, %ymm0, %ymm4
 ; AVX2-NEXT:    vbroadcastsd {{.*#+}} ymm5 = [9223372036854775807,9223372036854775807,9223372036854775807,9223372036854775807]
 ; AVX2-NEXT:    vbroadcastsd {{.*#+}} ymm6 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]

llvm/test/CodeGen/X86/ssub_sat_vec.ll

 ; AVX1-NEXT:    vpcmpgtq %xmm3, %xmm1, %xmm3
 ; AVX1-NEXT:    vinsertf128 $1, %xmm4, %ymm3, %ymm3
 ; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm4
 ; AVX1-NEXT:    vpsubq %xmm2, %xmm4, %xmm2
 ; AVX1-NEXT:    vpcmpgtq %xmm2, %xmm4, %xmm4
 ; AVX1-NEXT:    vpsubq %xmm1, %xmm0, %xmm1
 ; AVX1-NEXT:    vpcmpgtq %xmm1, %xmm0, %xmm0
 ; AVX1-NEXT:    vinsertf128 $1, %xmm4, %ymm0, %ymm0
-; AVX1-NEXT:    vxorpd %ymm0, %ymm3, %ymm0
+; AVX1-NEXT:    vxorps %ymm0, %ymm3, %ymm0
 ; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm1, %ymm1
 ; AVX1-NEXT:    vmovapd {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
 ; AVX1-NEXT:    vblendvpd %ymm1, {{.*}}(%rip), %ymm2, %ymm2
 ; AVX1-NEXT:    vblendvpd %ymm0, %ymm2, %ymm1, %ymm0
 ; AVX1-NEXT:    retq
 ;
 ; AVX2-LABEL: v4i64:
 ; AVX2:       # %bb.0:

 ; AVX1-NEXT:    vpcmpgtq %xmm5, %xmm2, %xmm7
 ; AVX1-NEXT:    vinsertf128 $1, %xmm6, %ymm7, %ymm6
 ; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm7
 ; AVX1-NEXT:    vpsubq %xmm4, %xmm7, %xmm4
 ; AVX1-NEXT:    vpcmpgtq %xmm4, %xmm7, %xmm7
 ; AVX1-NEXT:    vpsubq %xmm2, %xmm0, %xmm2
 ; AVX1-NEXT:    vpcmpgtq %xmm2, %xmm0, %xmm0
 ; AVX1-NEXT:    vinsertf128 $1, %xmm7, %ymm0, %ymm0
-; AVX1-NEXT:    vxorpd %ymm0, %ymm6, %ymm0
+; AVX1-NEXT:    vxorps %ymm0, %ymm6, %ymm0
 ; AVX1-NEXT:    vinsertf128 $1, %xmm4, %ymm2, %ymm2
 ; AVX1-NEXT:    vmovapd {{.*#+}} ymm4 = [9223372036854775807,9223372036854775807,9223372036854775807,9223372036854775807]
 ; AVX1-NEXT:    vmovapd {{.*#+}} ymm6 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
 ; AVX1-NEXT:    vblendvpd %ymm2, %ymm4, %ymm6, %ymm7
 ; AVX1-NEXT:    vblendvpd %ymm0, %ymm7, %ymm2, %ymm0
 ; AVX1-NEXT:    vextractf128 $1, %ymm3, %xmm2
 ; AVX1-NEXT:    vpcmpgtq %xmm5, %xmm2, %xmm7
 ; AVX1-NEXT:    vpcmpgtq %xmm5, %xmm3, %xmm5
 ; AVX1-NEXT:    vinsertf128 $1, %xmm7, %ymm5, %ymm5
 ; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm7
 ; AVX1-NEXT:    vpsubq %xmm2, %xmm7, %xmm2
 ; AVX1-NEXT:    vpcmpgtq %xmm2, %xmm7, %xmm7
 ; AVX1-NEXT:    vpsubq %xmm3, %xmm1, %xmm3
 ; AVX1-NEXT:    vpcmpgtq %xmm3, %xmm1, %xmm1
 ; AVX1-NEXT:    vinsertf128 $1, %xmm7, %ymm1, %ymm1
-; AVX1-NEXT:    vxorpd %ymm1, %ymm5, %ymm1
+; AVX1-NEXT:    vxorps %ymm1, %ymm5, %ymm1
 ; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm3, %ymm2
 ; AVX1-NEXT:    vblendvpd %ymm2, %ymm4, %ymm6, %ymm3
 ; AVX1-NEXT:    vblendvpd %ymm1, %ymm3, %ymm2, %ymm1
 ; AVX1-NEXT:    retq
 ;
 ; AVX2-LABEL: v8i64:
 ; AVX2:       # %bb.0:
 ; AVX2-NEXT:    vpxor %xmm4, %xmm4, %xmm4

llvm/test/CodeGen/X86/stack-folding-fp-avx1.ll

 
 define <4 x double> @stack_fold_xorpd_ymm(<4 x double> %a0, <4 x double> %a1) {
 ; CHECK-LABEL: stack_fold_xorpd_ymm:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
 ; CHECK-NEXT:    #APP
 ; CHECK-NEXT:    nop
 ; CHECK-NEXT:    #NO_APP
-; CHECK-NEXT:    vxorpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload
+; CHECK-NEXT:    vxorps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload
 ; CHECK-NEXT:    vxorpd %xmm1, %xmm1, %xmm1
 ; CHECK-NEXT:    vaddpd %ymm1, %ymm0, %ymm0
 ; CHECK-NEXT:    retq
   %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
   %2 = bitcast <4 x double> %a0 to <4 x i64>
   %3 = bitcast <4 x double> %a1 to <4 x i64>
   %4 = xor <4 x i64> %2, %3
   %5 = bitcast <4 x i64> %4 to <4 x double>

llvm/test/CodeGen/X86/v8i1-masks.ll

 ; X64-NEXT:    retq
 ;
 ; X32-AVX2-LABEL: four_or_and_xor:
 ; X32-AVX2:       ## %bb.0: ## %entry
 ; X32-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
 ; X32-AVX2-NEXT:    vcmpleps %ymm0, %ymm1, %ymm1
 ; X32-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
 ; X32-AVX2-NEXT:    vcmpltps %ymm2, %ymm0, %ymm2
-; X32-AVX2-NEXT:    vxorps %ymm2, %ymm1, %ymm1
+; X32-AVX2-NEXT:    vpxor %ymm2, %ymm1, %ymm1
 ; X32-AVX2-NEXT:    vxorps %xmm2, %xmm2, %xmm2
 ; X32-AVX2-NEXT:    vcmpneqps %ymm2, %ymm0, %ymm2
 ; X32-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
 ; X32-AVX2-NEXT:    vcmpneqps %ymm3, %ymm0, %ymm0
 ; X32-AVX2-NEXT:    vandps %ymm0, %ymm2, %ymm0
 ; X32-AVX2-NEXT:    vorps %ymm0, %ymm1, %ymm0
 ; X32-AVX2-NEXT:    retl
 ;
 ; X64-AVX2-LABEL: four_or_and_xor:
 ; X64-AVX2:       ## %bb.0: ## %entry
 ; X64-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
 ; X64-AVX2-NEXT:    vcmpleps %ymm0, %ymm1, %ymm1
 ; X64-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
 ; X64-AVX2-NEXT:    vcmpltps %ymm2, %ymm0, %ymm2
-; X64-AVX2-NEXT:    vxorps %ymm2, %ymm1, %ymm1
+; X64-AVX2-NEXT:    vpxor %ymm2, %ymm1, %ymm1
 ; X64-AVX2-NEXT:    vxorps %xmm2, %xmm2, %xmm2
 ; X64-AVX2-NEXT:    vcmpneqps %ymm2, %ymm0, %ymm2
 ; X64-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
 ; X64-AVX2-NEXT:    vcmpneqps %ymm3, %ymm0, %ymm0
 ; X64-AVX2-NEXT:    vandps %ymm0, %ymm2, %ymm0
 ; X64-AVX2-NEXT:    vorps %ymm0, %ymm1, %ymm0
 ; X64-AVX2-NEXT:    retq
 entry:

 ; X32-AVX2-NEXT:    vcmpltps %ymm2, %ymm0, %ymm2
 ; X32-AVX2-NEXT:    vxorps %xmm3, %xmm3, %xmm3
 ; X32-AVX2-NEXT:    vcmpneqps %ymm3, %ymm0, %ymm3
 ; X32-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm4 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
 ; X32-AVX2-NEXT:    vcmpneqps %ymm4, %ymm0, %ymm4
 ; X32-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm5 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1]
 ; X32-AVX2-NEXT:    vcmpneqps %ymm5, %ymm0, %ymm0
 ; X32-AVX2-NEXT:    vandps %ymm0, %ymm4, %ymm0
-; X32-AVX2-NEXT:    vxorps %ymm0, %ymm3, %ymm0
-; X32-AVX2-NEXT:    vxorps %ymm0, %ymm2, %ymm0
+; X32-AVX2-NEXT:    vpxor %ymm0, %ymm3, %ymm0
+; X32-AVX2-NEXT:    vpxor %ymm0, %ymm2, %ymm0
 ; X32-AVX2-NEXT:    vorps %ymm1, %ymm0, %ymm0
 ; X32-AVX2-NEXT:    retl
 ;
 ; X64-AVX2-LABEL: five_or_and_xor:
 ; X64-AVX2:       ## %bb.0: ## %entry
 ; X64-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
 ; X64-AVX2-NEXT:    vcmpleps %ymm0, %ymm1, %ymm1
 ; X64-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
 ; X64-AVX2-NEXT:    vcmpltps %ymm2, %ymm0, %ymm2
 ; X64-AVX2-NEXT:    vxorps %xmm3, %xmm3, %xmm3
 ; X64-AVX2-NEXT:    vcmpneqps %ymm3, %ymm0, %ymm3
 ; X64-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm4 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
 ; X64-AVX2-NEXT:    vcmpneqps %ymm4, %ymm0, %ymm4
 ; X64-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm5 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1]
 ; X64-AVX2-NEXT:    vcmpneqps %ymm5, %ymm0, %ymm0
 ; X64-AVX2-NEXT:    vandps %ymm0, %ymm4, %ymm0
-; X64-AVX2-NEXT:    vxorps %ymm0, %ymm3, %ymm0
-; X64-AVX2-NEXT:    vxorps %ymm0, %ymm2, %ymm0
+; X64-AVX2-NEXT:    vpxor %ymm0, %ymm3, %ymm0
+; X64-AVX2-NEXT:    vpxor %ymm0, %ymm2, %ymm0
 ; X64-AVX2-NEXT:    vorps %ymm1, %ymm0, %ymm0
 ; X64-AVX2-NEXT:    retq
 entry:
   %cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01>
   %cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
   %cmp3 = fcmp une <8 x float> %x, zeroinitializer
   %xor14 = xor <8 x i1> %cmp1, %cmp3
   %cmp5 = fcmp une <8 x float> %x, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>

 ; X32-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
 ; X32-AVX2-NEXT:    vcmpltps %ymm2, %ymm0, %ymm2
 ; X32-AVX2-NEXT:    vxorps %xmm3, %xmm3, %xmm3
 ; X32-AVX2-NEXT:    vcmpneqps %ymm3, %ymm0, %ymm3
 ; X32-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm4 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
 ; X32-AVX2-NEXT:    vcmpneqps %ymm4, %ymm0, %ymm4
 ; X32-AVX2-NEXT:    vandps %ymm4, %ymm3, %ymm3
 ; X32-AVX2-NEXT:    vandps %ymm3, %ymm2, %ymm2
-; X32-AVX2-NEXT:    vxorps %ymm2, %ymm1, %ymm1
+; X32-AVX2-NEXT:    vpxor %ymm2, %ymm1, %ymm1
 ; X32-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm2 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1]
 ; X32-AVX2-NEXT:    vcmpneqps %ymm2, %ymm0, %ymm2
-; X32-AVX2-NEXT:    vxorps %ymm1, %ymm2, %ymm1
+; X32-AVX2-NEXT:    vpxor %ymm1, %ymm2, %ymm1
 ; X32-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm2 = [4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1]
 ; X32-AVX2-NEXT:    vcmpneqps %ymm2, %ymm0, %ymm0
 ; X32-AVX2-NEXT:    vorps %ymm0, %ymm1, %ymm0
 ; X32-AVX2-NEXT:    retl
 ;
 ; X64-AVX2-LABEL: six_or_and_xor:
 ; X64-AVX2:       ## %bb.0: ## %entry
 ; X64-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
 ; X64-AVX2-NEXT:    vcmpleps %ymm0, %ymm1, %ymm1
 ; X64-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
 ; X64-AVX2-NEXT:    vcmpltps %ymm2, %ymm0, %ymm2
 ; X64-AVX2-NEXT:    vxorps %xmm3, %xmm3, %xmm3
 ; X64-AVX2-NEXT:    vcmpneqps %ymm3, %ymm0, %ymm3
 ; X64-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm4 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
 ; X64-AVX2-NEXT:    vcmpneqps %ymm4, %ymm0, %ymm4
 ; X64-AVX2-NEXT:    vandps %ymm4, %ymm3, %ymm3
 ; X64-AVX2-NEXT:    vandps %ymm3, %ymm2, %ymm2
-; X64-AVX2-NEXT:    vxorps %ymm2, %ymm1, %ymm1
+; X64-AVX2-NEXT:    vpxor %ymm2, %ymm1, %ymm1
 ; X64-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm2 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1]
 ; X64-AVX2-NEXT:    vcmpneqps %ymm2, %ymm0, %ymm2
-; X64-AVX2-NEXT:    vxorps %ymm1, %ymm2, %ymm1
+; X64-AVX2-NEXT:    vpxor %ymm1, %ymm2, %ymm1
 ; X64-AVX2-NEXT:    vbroadcastss {{.*#+}} ymm2 = [4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1]
 ; X64-AVX2-NEXT:    vcmpneqps %ymm2, %ymm0, %ymm0
 ; X64-AVX2-NEXT:    vorps %ymm0, %ymm1, %ymm0
 ; X64-AVX2-NEXT:    retq
 entry:
   %cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01>
   %cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
   %cmp3 = fcmp une <8 x float> %x, zeroinitializer

llvm/test/CodeGen/X86/vec_fp_to_int.ll

 ;
 ; AVX2-LABEL: fptoui_8f32_to_8i32:
 ; AVX2:       # %bb.0:
 ; AVX2-NEXT:    vbroadcastss {{.*#+}} ymm1 = [2.14748365E+9,2.14748365E+9,2.14748365E+9,2.14748365E+9,2.14748365E+9,2.14748365E+9,2.14748365E+9,2.14748365E+9]
 ; AVX2-NEXT:    vcmpltps %ymm1, %ymm0, %ymm2
 ; AVX2-NEXT:    vsubps %ymm1, %ymm0, %ymm1
 ; AVX2-NEXT:    vcvttps2dq %ymm1, %ymm1
 ; AVX2-NEXT:    vbroadcastss {{.*#+}} ymm3 = [2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648]
-; AVX2-NEXT:    vxorps %ymm3, %ymm1, %ymm1
+; AVX2-NEXT:    vpxor %ymm3, %ymm1, %ymm1
 ; AVX2-NEXT:    vcvttps2dq %ymm0, %ymm0
 ; AVX2-NEXT:    vblendvps %ymm2, %ymm0, %ymm1, %ymm0
 ; AVX2-NEXT:    retq
 ;
 ; AVX512F-LABEL: fptoui_8f32_to_8i32:
 ; AVX512F:       # %bb.0:
 ; AVX512F-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
 ; AVX512F-NEXT:    vcvttps2udq %zmm0, %zmm0

llvm/test/CodeGen/X86/vector-partial-undef.ll

 ; SSE-NEXT:    shufps {{.*#+}} xmm2 = xmm2[3,0],xmm1[0,0]
 ; SSE-NEXT:    shufps {{.*#+}} xmm1 = xmm1[3,2],xmm2[2,0]
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: xor_undef_elts_alt:
 ; AVX:       # %bb.0:
 ; AVX-NEXT:    # kill: def $xmm0 killed $xmm0 def $ymm0
 ; AVX-NEXT:    vinsertf128 $1, %xmm0, %ymm0, %ymm0
-; AVX-NEXT:    vxorps {{.*}}(%rip), %ymm0, %ymm0
+; AVX-NEXT:    vpxor {{.*}}(%rip), %ymm0, %ymm0
 ; AVX-NEXT:    vmovaps {{.*#+}} ymm1 = [6,1,5,4,3,2,0,7]
 ; AVX-NEXT:    vpermps %ymm0, %ymm1, %ymm0
 ; AVX-NEXT:    retq
   %extend = shufflevector <4 x i32> %x, <4 x i32> undef, <8 x i32> <i32 undef, i32 undef, i32 2, i32 3, i32 0, i32 1, i32 undef, i32 undef>
   %bogus_bo = xor <8 x i32> %extend, <i32 42, i32 43, i32 undef, i32 undef, i32 undef, i32 undef, i32 44, i32 12>
   %arbitrary_shuf = shufflevector <8 x i32> %bogus_bo, <8 x i32> undef, <8 x i32> <i32 6, i32 1, i32 5, i32 4, i32 3, i32 2, i32 0, i32 7>
   ret <8 x i32> %arbitrary_shuf
 }
 

llvm/test/CodeGen/X86/vector-reduce-umax.ll

 ; AVX2-NEXT:    vpxor %ymm4, %ymm2, %ymm5
 ; AVX2-NEXT:    vpxor %ymm4, %ymm0, %ymm6
 ; AVX2-NEXT:    vpcmpgtq %ymm5, %ymm6, %ymm5
 ; AVX2-NEXT:    vblendvpd %ymm5, %ymm0, %ymm2, %ymm0
 ; AVX2-NEXT:    vpxor %ymm4, %ymm3, %ymm2
 ; AVX2-NEXT:    vpxor %ymm4, %ymm1, %ymm5
 ; AVX2-NEXT:    vpcmpgtq %ymm2, %ymm5, %ymm2
 ; AVX2-NEXT:    vblendvpd %ymm2, %ymm1, %ymm3, %ymm1
-; AVX2-NEXT:    vxorpd %ymm4, %ymm1, %ymm2
-; AVX2-NEXT:    vxorpd %ymm4, %ymm0, %ymm3
+; AVX2-NEXT:    vpxor %ymm4, %ymm1, %ymm2
+; AVX2-NEXT:    vpxor %ymm4, %ymm0, %ymm3
 ; AVX2-NEXT:    vpcmpgtq %ymm2, %ymm3, %ymm2
 ; AVX2-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
 ; AVX2-NEXT:    vextractf128 $1, %ymm0, %xmm1
 ; AVX2-NEXT:    vxorpd %xmm4, %xmm1, %xmm2
 ; AVX2-NEXT:    vxorpd %xmm4, %xmm0, %xmm3
 ; AVX2-NEXT:    vpcmpgtq %xmm2, %xmm3, %xmm2
 ; AVX2-NEXT:    vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
 ; AVX2-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[2,3,2,3]

llvm/test/CodeGen/X86/vector-reduce-umin.ll

 ; AVX2-NEXT:    vpxor %ymm4, %ymm1, %ymm5
 ; AVX2-NEXT:    vpxor %ymm4, %ymm3, %ymm6
 ; AVX2-NEXT:    vpcmpgtq %ymm5, %ymm6, %ymm5
 ; AVX2-NEXT:    vblendvpd %ymm5, %ymm1, %ymm3, %ymm1
 ; AVX2-NEXT:    vpxor %ymm4, %ymm0, %ymm3
 ; AVX2-NEXT:    vpxor %ymm4, %ymm2, %ymm5
 ; AVX2-NEXT:    vpcmpgtq %ymm3, %ymm5, %ymm3
 ; AVX2-NEXT:    vblendvpd %ymm3, %ymm0, %ymm2, %ymm0
-; AVX2-NEXT:    vxorpd %ymm4, %ymm0, %ymm2
-; AVX2-NEXT:    vxorpd %ymm4, %ymm1, %ymm3
+; AVX2-NEXT:    vpxor %ymm4, %ymm0, %ymm2
+; AVX2-NEXT:    vpxor %ymm4, %ymm1, %ymm3
 ; AVX2-NEXT:    vpcmpgtq %ymm2, %ymm3, %ymm2
 ; AVX2-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
 ; AVX2-NEXT:    vextractf128 $1, %ymm0, %xmm1
 ; AVX2-NEXT:    vxorpd %xmm4, %xmm0, %xmm2
 ; AVX2-NEXT:    vxorpd %xmm4, %xmm1, %xmm3
 ; AVX2-NEXT:    vpcmpgtq %xmm2, %xmm3, %xmm2
 ; AVX2-NEXT:    vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
 ; AVX2-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[2,3,2,3]

llvm/test/CodeGen/X86/vector-trunc-math.ll

 ; AVX1-NEXT:    vxorps %ymm1, %ymm0, %ymm0
 ; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
 ; AVX1-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
 ; AVX1-NEXT:    vzeroupper
 ; AVX1-NEXT:    retq
 ;
 ; AVX2-SLOW-LABEL: trunc_xor_v4i64_v4i32:
 ; AVX2-SLOW:       # %bb.0:
-; AVX2-SLOW-NEXT:    vxorps %ymm1, %ymm0, %ymm0
+; AVX2-SLOW-NEXT:    vpxor %ymm1, %ymm0, %ymm0
 ; AVX2-SLOW-NEXT:    vextractf128 $1, %ymm0, %xmm1
 ; AVX2-SLOW-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
 ; AVX2-SLOW-NEXT:    vzeroupper
 ; AVX2-SLOW-NEXT:    retq
 ;
 ; AVX2-FAST-LABEL: trunc_xor_v4i64_v4i32:
 ; AVX2-FAST:       # %bb.0:
-; AVX2-FAST-NEXT:    vxorps %ymm1, %ymm0, %ymm0
+; AVX2-FAST-NEXT:    vpxor %ymm1, %ymm0, %ymm0
 ; AVX2-FAST-NEXT:    vmovaps {{.*#+}} ymm1 = <0,2,4,6,u,u,u,u>
 ; AVX2-FAST-NEXT:    vpermps %ymm0, %ymm1, %ymm0
 ; AVX2-FAST-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
 ; AVX2-FAST-NEXT:    vzeroupper
 ; AVX2-FAST-NEXT:    retq
 ;
 ; AVX512-LABEL: trunc_xor_v4i64_v4i32:
 ; AVX512:       # %bb.0:

 ; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
 ; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
 ; AVX1-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
 ; AVX1-NEXT:    vzeroupper
 ; AVX1-NEXT:    retq
 ;
 ; AVX2-SLOW-LABEL: trunc_xor_v8i64_v8i16:
 ; AVX2-SLOW:       # %bb.0:
-; AVX2-SLOW-NEXT:    vxorps %ymm3, %ymm1, %ymm1
-; AVX2-SLOW-NEXT:    vxorps %ymm2, %ymm0, %ymm0
+; AVX2-SLOW-NEXT:    vpxor %ymm3, %ymm1, %ymm1
+; AVX2-SLOW-NEXT:    vpxor %ymm2, %ymm0, %ymm0
 ; AVX2-SLOW-NEXT:    vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3]
 ; AVX2-SLOW-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
 ; AVX2-SLOW-NEXT:    vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm2[0,2],ymm0[4,6],ymm2[4,6]
 ; AVX2-SLOW-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u,16,17,20,21,24,25,28,29,u,u,u,u,u,u,u,u]
 ; AVX2-SLOW-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
 ; AVX2-SLOW-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
 ; AVX2-SLOW-NEXT:    vzeroupper
 ; AVX2-SLOW-NEXT:    retq

 ; AVX1-NEXT:    vpackusdw %xmm3, %xmm0, %xmm0
 ; AVX1-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
 ; AVX1-NEXT:    vpackuswb %xmm2, %xmm0, %xmm0
 ; AVX1-NEXT:    vzeroupper
 ; AVX1-NEXT:    retq
 ;
 ; AVX2-SLOW-LABEL: trunc_xor_v16i64_v16i8:
 ; AVX2-SLOW:       # %bb.0:
-; AVX2-SLOW-NEXT:    vxorps %ymm5, %ymm1, %ymm1
-; AVX2-SLOW-NEXT:    vxorps %ymm4, %ymm0, %ymm0
-; AVX2-SLOW-NEXT:    vxorps %ymm7, %ymm3, %ymm3
-; AVX2-SLOW-NEXT:    vxorps %ymm6, %ymm2, %ymm2
+; AVX2-SLOW-NEXT:    vpxor %ymm5, %ymm1, %ymm1
+; AVX2-SLOW-NEXT:    vpxor %ymm4, %ymm0, %ymm0
+; AVX2-SLOW-NEXT:    vpxor %ymm7, %ymm3, %ymm3
+; AVX2-SLOW-NEXT:    vpxor %ymm6, %ymm2, %ymm2
 ; AVX2-SLOW-NEXT:    vperm2f128 {{.*#+}} ymm4 = ymm2[2,3],ymm3[2,3]
 ; AVX2-SLOW-NEXT:    vinsertf128 $1, %xmm3, %ymm2, %ymm2
 ; AVX2-SLOW-NEXT:    vshufps {{.*#+}} ymm2 = ymm2[0,2],ymm4[0,2],ymm2[4,6],ymm4[4,6]
 ; AVX2-SLOW-NEXT:    vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
 ; AVX2-SLOW-NEXT:    vpshufb %ymm3, %ymm2, %ymm2
 ; AVX2-SLOW-NEXT:    vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3]
 ; AVX2-SLOW-NEXT:    vmovdqa {{.*#+}} xmm4 = [255,255,255,255,255,255,255,255]
 ; AVX2-SLOW-NEXT:    vpand %xmm4, %xmm2, %xmm2