Add a callback to FunctionPass to enable skipping execution on a per-function basis

[ahatanak]

Summary

The callback function object enables the function pass to skip execution based on the per-function subtarget object. With this change, we can remove the code in the subclasses of TargetPassConfig that calls subtarget methods to decide if a pass should be added to the pass pipeline. I've only made changes to ARM's pass configuration, but other targets can be fixed the same way.

[echristo]

Hi Akira,

Yep. This is about what I was thinking about when we chatted. It seems to be a bit less cognitive overhead than a pass decorator, which would just be another (possible TargetMachine local) pass framework that implements Pass with a pile of overloads.

What do you think Chandler?

-eric

[kariddi]

Hi,

I'm very interested by this improvement too.

I have a pass that needs to run polling state from the subtarget , but I don't want to pull in all the target specific subtarget into my pass.

This would be very helpful for my case :)

[echristo]

Can you elaborate here a bit? I'm curious about your use case.

[kariddi]

On the targets I work on I have an IR pass that does a transformation that is general across the targets that support a certain feature .

The idea is to run the pass only if we detect that our subtarget has that particular feature and needs the transformation , which was done by adding conditionally the pass in the targetmachine after querying the subtarget. That is not possible now because of the dependency on the function. The subtarget needs to be queried in the pass, which means pulling a lot of target specific code into the pass.

That would be pretty bad and before seeing this I was trying to find an alternative approach.

[chandlerc]

I feel like we could do something much simpler than this. This feeling is predicated on one primary theory: most passes will run for most subtargets. Put another way, there will only be a small number of passes that we actually want to opt out of on a per-subtarget basis.

If we think that's likely to be the case, here is an alternative suggestion:

• Add bool-returning predicates for each pass to the subtarget base class (eg, "isIfConversionProfitable()") with the expected default ("true").
• Override these for the subtargets that want to opt out.
• Change the pass to directly get the subtarget, query it, and bail without doing anything if it gets "false".

From looking at and thinking about if-conversion at least, this seems nicer to me. It makes someone working on the pass aware that there are subtarget profitability concerns, and it makes it very clear that we are *running* all of the passes, just that some have no effect on certain subtargets.

This also matches how an optimization pass should query the function for the 'noopt' attribute and bail.

Thoughts?

[silvas]

Adding Paul as this seems related to optnone.

[echristo]

Optnone, IMO, needs to be replaced by something less terrible.

I'm not sure how this is going to work with the "I want to run the first
cfgcleanup unconditionally, but not the second" without tying the
subtargets to things like shouldRunCfgCleanup2().

[echristo]

It's a real case, check out the ARM port for it.

[echristo]

Right, I agree with this in general, but looking to avoid the weird
subtarget flags that I mentioned. Perhaps we should revisit Akira's
original idea of wrapping pass in a decorator if you want to pull it out of
the pass manager machinery?

[echristo]

How would that work? A parameter doesn't get us subtarget Independence in
the pass manager construction as far as I can tell. I could be dense here
though.

[echristo]

Or do you mean a predicate lambda passed during pass construction? I'd be
totally down with that.

[echristo]

Yeah. I think the predicate lambda makes the most sense. Originally what
direction I thought we were going with this.

Akira: make sense?

[ahatanak]

Yes, that makes sense. Passing the predicate lambda to the pass's constructor seems like a much simpler approach than passing it to addPass.

[ahatanak]

Here is the updated patch.

In addition to making changes necessary to pass the predicate to the passes' constructors, I moved the piece of code in lib/CodeGen/Passes.cpp which adds passes in InsertedPasses to the pass pipeline. This change was necessary to enable inserting the machineinstr-printer pass via command line option -print-machineinstrs (two tests, CodeGen/ARM/ifcvt-branch-weight-bug.ll and ifcvt-branch-weight.ll, fail without this change).

[echristo]

Yep. This is where I was going with it.

Thanks for the work and your patience!

-eric

lib/CodeGen/Passes.cpp

295–312 ↗

(On Diff #23532)

I'm probably missing something, but why move this code?

[ahatanak]

lib/CodeGen/Passes.cpp

295–312 ↗

(On Diff #23532)

Two make-check tests (CodeGen/ARM/ifcvt-branch-weight-bug.ll and ifcvt-branch-weight.ll) fail without this change.

Currently, this code is executed when print-machineinstrs pass has to be added to the pipeline and it is executed only when the overloaded version of addPass that takes AnalysisID is called. Since this patch changes ARMPassConfig::addPreSched2 to use the version of addPass that takes Pass* to add the if-converter pass, I had to move this code to addPass(Pass*) so that it gets executed when either of the overloaded functions is called.

[ahatanak]

Eric, did the inline comment I added answer your question?

[echristo]

Oh sure, yes. I was hoping that Chandler would take a look and ack that
part though.

I'll poke him and get an answer today :)

-eric

[chandlerc]

Thanks for prodding me Eric, I didn't realize you all actuall ywanted me to look at part of this.

include/llvm/Pass.h

313 ↗

(On Diff #23532)

I would much rather not have a typedef here. The typedef is in a large part obscuring what is happening. By saying "std::function<bool(const Function &)>" in the signature where this is used it's a lot clearer what signature of predicate should be used.

lib/CodeGen/Passes.cpp

295–312 ↗

(On Diff #23532)

This is clearly a correct change, but please make it in a separate commit. This code should never have lived in the AnalyisID overload when the point of it (at least the only used point I can find) is to insert machine instr printing passes after each other pass added in the backend.

[ahatanak]

Made changes to remove the typedef and use std::function<bool(const Function &)> to make clearer what signature should be used for the predicate. Also, committed the change that enables inserting machine function printer in r239192 separately.

[chandlerc]

LGTM

include/llvm/Transforms/Scalar.h

18 ↗

(On Diff #27235)

I think you can remove this now.

[ahatanak]

Thank you. I'll make the corrections and commit this patch with a test case.

[vsukharev]

Hi Akira, Eric
Performing tidying up features for default processors on my checkout, I face a regression due to this patch.
test/CodeGen/ARM/2014-08-04-muls-it.ll failed, after I removed "+db" as a default feature for architectures, including thumbv7.
The effect I see is the following:
without FeatureDB, the pass "SimplifyCFG" is not called at all, and optimization "SpeculativelyExecuteBB" (lib/Transform/Utils/SimplifyCFG.cpp::line 1462) is not called, that is essential for this test.

I guess SpeculativelyExecuteBB must not depend on FeatureDB presence, as well other useful CFG simplifications in this pass.
What's your vision?
Vladimir

[ahatanak]

Hi Vladimir,

Does the test still fail if you revert the changes made to ARMPassConfig::addIRPasses?

I'm not sure what your clean-up patch looks like, but I'm guessing the changes you made caused the predicate function passed to createCFGSimplificationPass to return false, which caused CFGSimplifyPass::runOnFunction to return immediately.

[vsukharev]

Hi Akira,
Sorry, I have misread this patch. It was just the last, but not essential.
I have reverted the patch and see nothing changed. So I had to revert the previous change, that introduced call to hasAnyDataBarrier(), and it was another patch by Eric.
I have asked Eric in scope of that patch http://reviews.llvm.org/rL211314#24841

Vladimir

[echristo]

I've replied on the thread you just created. Needless to say your revert of
my patch is going to be incorrect.

-eric

llvm/trunk/include/llvm/CodeGen/Passes.h

 #define LLVM_CODEGEN_PASSES_H
 
 #include "llvm/Pass.h"
 #include "llvm/Target/TargetMachine.h"
 #include <string>
 
 namespace llvm {
 
-class FunctionPass;
 class MachineFunctionPass;
 class PassConfigImpl;
 class PassInfo;
 class ScheduleDAGInstrs;
 class TargetLowering;
 class TargetLoweringBase;
 class TargetRegisterClass;
 class raw_ostream;
/// MachineDominanaceFrontier - This pass is a machine dominators analysis pass.
 
   /// StackSlotColoring - This pass performs stack coloring and merging.
   /// It merges disjoint allocas to reduce the stack size.
   extern char &StackColoringID;
 
   /// IfConverter - This pass performs machine code if conversion.
   extern char &IfConverterID;
 
+  FunctionPass *createIfConverter(std::function<bool(const Function &)> Ftor);
+
   /// MachineBlockPlacement - This pass places basic blocks based on branch
   /// probabilities.
   extern char &MachineBlockPlacementID;
 
   /// MachineBlockPlacementStats - This pass collects statistics about the
   /// basic block placement using branch probabilities and block frequency
   /// information.
   extern char &MachineBlockPlacementStatsID;
/// MachineDominanaceFrontier - This pass is a machine dominators analysis pass.
   ///
   /// The pass will examine instructions using and defining registers in RC.
   ///
   FunctionPass *createExecutionDependencyFixPass(const TargetRegisterClass *RC);
 
   /// UnpackMachineBundles - This pass unpack machine instruction bundles.
   extern char &UnpackMachineBundlesID;
 
+  FunctionPass *
+  createUnpackMachineBundles(std::function<bool(const Function &)> Ftor);
+
   /// FinalizeMachineBundles - This pass finalize machine instruction
   /// bundles (created earlier, e.g. during pre-RA scheduling).
   extern char &FinalizeMachineBundlesID;
 
   /// StackMapLiveness - This pass analyses the register live-out set of
   /// stackmap/patchpoint intrinsics and attaches the calculated information to
   /// the intrinsic for later emission to the StackMap.
   extern char &StackMapLivenessID;

llvm/trunk/include/llvm/Transforms/Scalar.h

 // in the Scalar transformations library.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_TRANSFORMS_SCALAR_H
 #define LLVM_TRANSFORMS_SCALAR_H
 
 #include "llvm/ADT/StringRef.h"
+#include <functional>
 
 namespace llvm {
 
 class BasicBlockPass;
+class Function;
 class FunctionPass;
 class ModulePass;
 class Pass;
 class GetElementPtrInst;
 class PassInfo;
 class TerminatorInst;
 class TargetLowering;
 class TargetMachine;

 //
 FunctionPass *createJumpThreadingPass(int Threshold = -1);
 
 //===----------------------------------------------------------------------===//
 //
 // CFGSimplification - Merge basic blocks, eliminate unreachable blocks,
 // simplify terminator instructions, etc...
 //
-FunctionPass *createCFGSimplificationPass(int Threshold = -1);
+FunctionPass *createCFGSimplificationPass(
+    int Threshold = -1, std::function<bool(const Function &)> Ftor = nullptr);
 
 //===----------------------------------------------------------------------===//
 //
 // FlattenCFG - flatten CFG, reduce number of conditional branches by using
 // parallel-and and parallel-or mode, etc...
 //
 FunctionPass *createFlattenCFGPass();
 

llvm/trunk/lib/CodeGen/IfConversion.cpp

class IfConverter : public MachineFunctionPass {
     MachineRegisterInfo *MRI;
 
     LivePhysRegs Redefs;
     LivePhysRegs DontKill;
 
     bool PreRegAlloc;
     bool MadeChange;
     int FnNum;
+    std::function<bool(const Function &)> PredicateFtor;
+
   public:
     static char ID;
-    IfConverter() : MachineFunctionPass(ID), FnNum(-1) {
+    IfConverter(std::function<bool(const Function &)> Ftor = nullptr)
+        : MachineFunctionPass(ID), FnNum(-1), PredicateFtor(Ftor) {
       initializeIfConverterPass(*PassRegistry::getPassRegistry());
     }
 
     void getAnalysisUsage(AnalysisUsage &AU) const override {
       AU.addRequired<MachineBlockFrequencyInfo>();
       AU.addRequired<MachineBranchProbabilityInfo>();
       MachineFunctionPass::getAnalysisUsage(AU);
     }

 
 char &llvm::IfConverterID = IfConverter::ID;
 
 INITIALIZE_PASS_BEGIN(IfConverter, "if-converter", "If Converter", false, false)
 INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
 INITIALIZE_PASS_END(IfConverter, "if-converter", "If Converter", false, false)
 
 bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
+  if (PredicateFtor && !PredicateFtor(*MF.getFunction()))
+    return false;
+
   const TargetSubtargetInfo &ST = MF.getSubtarget();
   TLI = ST.getTargetLowering();
   TII = ST.getInstrInfo();
   TRI = ST.getRegisterInfo();
   MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
   MBPI = &getAnalysis<MachineBranchProbabilityInfo>();
   MRI = &MF.getRegInfo();
   SchedModel.init(ST.getSchedModel(), &ST, TII);
void IfConverter::MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges) {
   FromBBI.ExtraCost = 0;
   FromBBI.ExtraCost2 = 0;
 
   ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
   ToBBI.HasFallThrough = FromBBI.HasFallThrough;
   ToBBI.IsAnalyzed = false;
   FromBBI.IsAnalyzed = false;
 }
+
+FunctionPass *
+llvm::createIfConverter(std::function<bool(const Function &)> Ftor) {
+  return new IfConverter(Ftor);
+}

llvm/trunk/lib/CodeGen/MachineInstrBundle.cpp

 #include "llvm/Target/TargetRegisterInfo.h"
 #include "llvm/Target/TargetSubtargetInfo.h"
 using namespace llvm;
 
 namespace {
   class UnpackMachineBundles : public MachineFunctionPass {
   public:
     static char ID; // Pass identification
-    UnpackMachineBundles() : MachineFunctionPass(ID) {
+    UnpackMachineBundles(std::function<bool(const Function &)> Ftor = nullptr)
+        : MachineFunctionPass(ID), PredicateFtor(Ftor) {
       initializeUnpackMachineBundlesPass(*PassRegistry::getPassRegistry());
     }
 
     bool runOnMachineFunction(MachineFunction &MF) override;
+
+  private:
+    std::function<bool(const Function &)> PredicateFtor;
   };
 } // end anonymous namespace
 
 char UnpackMachineBundles::ID = 0;
 char &llvm::UnpackMachineBundlesID = UnpackMachineBundles::ID;
 INITIALIZE_PASS(UnpackMachineBundles, "unpack-mi-bundles",
                 "Unpack machine instruction bundles", false, false)
 
 bool UnpackMachineBundles::runOnMachineFunction(MachineFunction &MF) {
+  if (PredicateFtor && !PredicateFtor(*MF.getFunction()))
+    return false;
+
   bool Changed = false;
   for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
     MachineBasicBlock *MBB = &*I;
 
     for (MachineBasicBlock::instr_iterator MII = MBB->instr_begin(),
            MIE = MBB->instr_end(); MII != MIE; ) {
       MachineInstr *MI = &*MII;
 
for (MachineBasicBlock::instr_iterator MII = MBB->instr_begin(),
 
       ++MII;
     }
   }
 
   return Changed;
 }
 
+FunctionPass *
+llvm::createUnpackMachineBundles(std::function<bool(const Function &)> Ftor) {
+  return new UnpackMachineBundles(Ftor);
+}
 
 namespace {
   class FinalizeMachineBundles : public MachineFunctionPass {
   public:
     static char ID; // Pass identification
     FinalizeMachineBundles() : MachineFunctionPass(ID) {
       initializeFinalizeMachineBundlesPass(*PassRegistry::getPassRegistry());
     }

llvm/trunk/lib/Target/ARM/ARM.h

 // ARM back-end.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_LIB_TARGET_ARM_ARM_H
 #define LLVM_LIB_TARGET_ARM_ARM_H
 
 #include "llvm/Support/CodeGen.h"
+#include <functional>
 
 namespace llvm {
 
 class ARMAsmPrinter;
 class ARMBaseTargetMachine;
+class Function;
 class FunctionPass;
 class ImmutablePass;
 class MachineInstr;
 class MCInst;
 class TargetLowering;
 class TargetMachine;
 
 FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM,
                                CodeGenOpt::Level OptLevel);
 FunctionPass *createA15SDOptimizerPass();
 FunctionPass *createARMLoadStoreOptimizationPass(bool PreAlloc = false);
 FunctionPass *createARMExpandPseudoPass();
 FunctionPass *createARMGlobalBaseRegPass();
 FunctionPass *createARMConstantIslandPass();
 FunctionPass *createMLxExpansionPass();
 FunctionPass *createThumb2ITBlockPass();
 FunctionPass *createARMOptimizeBarriersPass();
-FunctionPass *createThumb2SizeReductionPass();
+FunctionPass *createThumb2SizeReductionPass(
+    std::function<bool(const Function &)> Ftor = nullptr);
 
 void LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
                                   ARMAsmPrinter &AP);
 
 } // end namespace llvm;
 
 #endif

llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp

 public:
   ARMPassConfig(ARMBaseTargetMachine *TM, PassManagerBase &PM)
     : TargetPassConfig(TM, PM) {}
 
   ARMBaseTargetMachine &getARMTargetMachine() const {
     return getTM<ARMBaseTargetMachine>();
   }
 
-  const ARMSubtarget &getARMSubtarget() const {
-    return *getARMTargetMachine().getSubtargetImpl();
-  }
-
   void addIRPasses() override;
   bool addPreISel() override;
   bool addInstSelector() override;
   void addPreRegAlloc() override;
   void addPreSched2() override;
   void addPreEmitPass() override;
 };
 } // namespace
 
 TargetPassConfig *ARMBaseTargetMachine::createPassConfig(PassManagerBase &PM) {
   return new ARMPassConfig(this, PM);
 }
 
 void ARMPassConfig::addIRPasses() {
   if (TM->Options.ThreadModel == ThreadModel::Single)
     addPass(createLowerAtomicPass());
   else
     addPass(createAtomicExpandPass(TM));
 
   // Cmpxchg instructions are often used with a subsequent comparison to
   // determine whether it succeeded. We can exploit existing control-flow in
   // ldrex/strex loops to simplify this, but it needs tidying up.
-  const ARMSubtarget *Subtarget = &getARMSubtarget();
-  if (Subtarget->hasAnyDataBarrier() && !Subtarget->isThumb1Only())
-    if (TM->getOptLevel() != CodeGenOpt::None && EnableAtomicTidy)
-      addPass(createCFGSimplificationPass());
+    addPass(createCFGSimplificationPass(-1, [this](const Function &F) {
+      const auto &ST = this->TM->getSubtarget<ARMSubtarget>(F);
+      return ST.hasAnyDataBarrier() && !ST.isThumb1Only();
+    }));
 
   TargetPassConfig::addIRPasses();
 }
 
 bool ARMPassConfig::addPreISel() {
   if ((TM->getOptLevel() != CodeGenOpt::None &&
        EnableGlobalMerge == cl::BOU_UNSET) ||
       EnableGlobalMerge == cl::BOU_TRUE) {
void ARMPassConfig::addPreSched2() {
   }
 
   // Expand some pseudo instructions into multiple instructions to allow
   // proper scheduling.
   addPass(createARMExpandPseudoPass());
 
   if (getOptLevel() != CodeGenOpt::None) {
     // in v8, IfConversion depends on Thumb instruction widths
-    if (getARMSubtarget().restrictIT())
-      addPass(createThumb2SizeReductionPass());
-    if (!getARMSubtarget().isThumb1Only())
-      addPass(&IfConverterID);
+    addPass(createThumb2SizeReductionPass([this](const Function &F) {
+      return this->TM->getSubtarget<ARMSubtarget>(F).restrictIT();
+    }));
+
+    addPass(createIfConverter([this](const Function &F) {
+      return !this->TM->getSubtarget<ARMSubtarget>(F).isThumb1Only();
+    }));
   }
   addPass(createThumb2ITBlockPass());
 }
 
 void ARMPassConfig::addPreEmitPass() {
   addPass(createThumb2SizeReductionPass());
 
   // Constant island pass work on unbundled instructions.
-  if (getARMSubtarget().isThumb2())
-    addPass(&UnpackMachineBundlesID);
+  addPass(createUnpackMachineBundles([this](const Function &F) {
+    return this->TM->getSubtarget<ARMSubtarget>(F).isThumb2();
+  }));
 
   // Don't optimize barriers at -O0.
   if (getOptLevel() != CodeGenOpt::None)
     addPass(createARMOptimizeBarriersPass());
 
   addPass(createARMConstantIslandPass());
 }

llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp

namespace {
   // ARM::t2STM (with no basereg writeback) has no Thumb1 equivalent
   { ARM::t2STMIA_UPD,ARM::tSTMIA_UPD, 0,       0,   0,   1,   1,  1,1, 0,1,0 },
   { ARM::t2STMDB_UPD, 0,        ARM::tPUSH,    0,   0,   1,   1,  1,1, 0,1,0 }
   };
 
   class Thumb2SizeReduce : public MachineFunctionPass {
   public:
     static char ID;
-    Thumb2SizeReduce();
+    Thumb2SizeReduce(std::function<bool(const Function &)> Ftor);
 
     const Thumb2InstrInfo *TII;
     const ARMSubtarget *STI;
 
     bool runOnMachineFunction(MachineFunction &MF) override;
 
     const char *getPassName() const override {
       return "Thumb2 instruction size reduction pass";
struct MBBInfo {
       bool HighLatencyCPSR;
       // Has this block been visited yet?
       bool Visited;
 
       MBBInfo() : HighLatencyCPSR(false), Visited(false) {}
     };
 
     SmallVector<MBBInfo, 8> BlockInfo;
+
+    std::function<bool(const Function &)> PredicateFtor;
   };
   char Thumb2SizeReduce::ID = 0;
 }
 
-Thumb2SizeReduce::Thumb2SizeReduce() : MachineFunctionPass(ID) {
+Thumb2SizeReduce::Thumb2SizeReduce(std::function<bool(const Function &)> Ftor)
+    : MachineFunctionPass(ID), PredicateFtor(Ftor) {
   OptimizeSize = MinimizeSize = false;
   for (unsigned i = 0, e = array_lengthof(ReduceTable); i != e; ++i) {
     unsigned FromOpc = ReduceTable[i].WideOpc;
     if (!ReduceOpcodeMap.insert(std::make_pair(FromOpc, i)).second)
       assert(false && "Duplicated entries?");
   }
 }
 
bool Thumb2SizeReduce::ReduceMBB(MachineBasicBlock &MBB) {
 
   MBBInfo &Info = BlockInfo[MBB.getNumber()];
   Info.HighLatencyCPSR = HighLatencyCPSR;
   Info.Visited = true;
   return Modified;
 }
 
 bool Thumb2SizeReduce::runOnMachineFunction(MachineFunction &MF) {
+  if (PredicateFtor && !PredicateFtor(*MF.getFunction()))
+    return false;
+
   STI = &static_cast<const ARMSubtarget &>(MF.getSubtarget());
   if (STI->isThumb1Only() || STI->prefers32BitThumb())
     return false;
 
   TII = static_cast<const Thumb2InstrInfo *>(STI->getInstrInfo());
 
   // Optimizing / minimizing size?
   OptimizeSize = MF.getFunction()->hasFnAttribute(Attribute::OptimizeForSize);
bool Thumb2SizeReduce::runOnMachineFunction(MachineFunction &MF) {
   for (ReversePostOrderTraversal<MachineFunction*>::rpo_iterator
        I = RPOT.begin(), E = RPOT.end(); I != E; ++I)
     Modified |= ReduceMBB(**I);
   return Modified;
 }
 
 /// createThumb2SizeReductionPass - Returns an instance of the Thumb2 size
 /// reduction pass.
-FunctionPass *llvm::createThumb2SizeReductionPass() {
-  return new Thumb2SizeReduce();
+FunctionPass *llvm::createThumb2SizeReductionPass(
+    std::function<bool(const Function &)> Ftor) {
+  return new Thumb2SizeReduce(Ftor);
 }

llvm/trunk/lib/Transforms/Scalar/SimplifyCFGPass.cpp

PreservedAnalyses SimplifyCFGPass::run(Function &F,
 
   return PreservedAnalyses::all();
 }
 
 namespace {
 struct CFGSimplifyPass : public FunctionPass {
   static char ID; // Pass identification, replacement for typeid
   unsigned BonusInstThreshold;
-  CFGSimplifyPass(int T = -1) : FunctionPass(ID) {
+  std::function<bool(const Function &)> PredicateFtor;
+
+  CFGSimplifyPass(int T = -1,
+                  std::function<bool(const Function &)> Ftor = nullptr)
+      : FunctionPass(ID), PredicateFtor(Ftor) {
     BonusInstThreshold = (T == -1) ? UserBonusInstThreshold : unsigned(T);
     initializeCFGSimplifyPassPass(*PassRegistry::getPassRegistry());
   }
   bool runOnFunction(Function &F) override {
+    if (PredicateFtor && !PredicateFtor(F))
+      return false;
+
     if (skipOptnoneFunction(F))
       return false;
 
     AssumptionCache *AC =
         &getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
     const TargetTransformInfo &TTI =
         getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
     return simplifyFunctionCFG(F, TTI, AC, BonusInstThreshold);

 INITIALIZE_PASS_BEGIN(CFGSimplifyPass, "simplifycfg", "Simplify the CFG", false,
                       false)
 INITIALIZE_PASS_DEPENDENCY(TargetTransformInfoWrapperPass)
 INITIALIZE_PASS_DEPENDENCY(AssumptionCacheTracker)
 INITIALIZE_PASS_END(CFGSimplifyPass, "simplifycfg", "Simplify the CFG", false,
                     false)
 
 // Public interface to the CFGSimplification pass
-FunctionPass *llvm::createCFGSimplificationPass(int Threshold) {
-  return new CFGSimplifyPass(Threshold);
+FunctionPass *
+llvm::createCFGSimplificationPass(int Threshold,
+                                  std::function<bool(const Function &)> Ftor) {
+  return new CFGSimplifyPass(Threshold, Ftor);
 }
 

llvm/trunk/test/CodeGen/ARM/ifcvt-callback.ll

+; RUN: llc -march thumb %s -o - | FileCheck %s
+
+; This test checks that if-conversion pass is unconditionally added to the pass
+; pipeline and is conditionally executed based on the per-function targert-cpu
+; attribute.
+ 
+; CHECK: ite eq
+
+define i32 @test_ifcvt(i32 %a, i32 %b) #0 {
+  %tmp2 = icmp eq i32 %a, 0
+  br i1 %tmp2, label %cond_false, label %cond_true
+
+cond_true:
+  %tmp5 = add i32 %b, 1
+  ret i32 %tmp5
+
+cond_false:
+  %tmp7 = add i32 %b, -1
+  ret i32 %tmp7
+}
+
+attributes #0 = { "target-cpu"="cortex-a8" }