[AMDGPU] Remove the dead spill slots while spilling FP/BP to memory

[RamNalamothu]

Summary

During the PEI pass, the dead TargetStackID::SGPRSpill spill slots
are not being removed while spilling the FP/BP to memory.

Fixes: SWDEV-250393

[RamNalamothu]

Update a relevant test in 'callee-frame-setup.ll' for validating the patch.

[arsenm]

llvm/lib/Target/AMDGPU/SIFrameLowering.cpp

126

Single quotes around \n

llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll

466 ↗

(On Diff #289478)

Why start hardcoding this?

[RamNalamothu]

Address review comments.

[RamNalamothu]

Ah, wrong changset was committed in the previous update.

[RamNalamothu]

llvm/lib/Target/AMDGPU/SIFrameLowering.cpp

126

Done.

llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll

466 ↗

(On Diff #289478)

To ensure we are getting correct/expected stack offset here after the removal of dead spill slots.

llvm/lib/Target/AMDGPU/SIFrameLowering.cpp

if (MFI->allocateSGPRSpillToVGPR(MF, NewFI)) {
           dbgs() << (IsFP ? "FP" : "BP") << " requires fallback spill to "
                  << printReg(Spill.VGPR, TRI) << ':' << Spill.Lane << '\n';);
     } else {
       // Remove dead <NewFI> index
       MF.getFrameInfo().RemoveStackObject(NewFI);
       // 4: If all else fails, spill the FP/BP to memory.
       FrameIndex = FrameInfo.CreateSpillStackObject(4, Align(4));
       LLVM_DEBUG(dbgs() << "Reserved FI " << FrameIndex << " for spilling "
-                        << (IsFP ? "FP" : "BP") << "\n");
+                        << (IsFP ? "FP" : "BP") << '\n');
     }
   } else {
     LLVM_DEBUG(dbgs() << "Saving " << (IsFP ? "FP" : "BP") << " with copy to "
                       << printReg(TempSGPR, TRI) << '\n');
   }
 }
 
 // We need to specially emit stack operations here because a different frame