[PowerPC] Use SDISel instead of FISel for calls and TOC-based accesses with PC-Rel

[nemanjai]

Summary

PC-Relative addressing introduces a fair bit of complexity for correctly eliminating TOC accesses. FastISel does not include any of that handling so we miscompile code with -mcpu=pwr10 -O0 if it includes an external call that FastISel does not handle followed by any of the following:

• Floating point constant materialization
• Materialization of a GlobalValue
• Call that FastISel does handle

This patch switches to SDISel for any of the above.

[stefanp]

LGTM

[NeHuang]

LGTM. Only a nit can be addressed while committing the patch.

llvm/lib/Target/PowerPC/PPCFastISel.cpp

1570

nit: if this is a

llvm/lib/Target/PowerPC/PPCFastISel.cpp

bool PPCFastISel::fastLowerCall(CallLoweringInfo &CLI) {
   // Allow SelectionDAG isel to handle tail calls.
   if (IsTailCall)
     return false;
 
   // Let SDISel handle vararg functions.
   if (IsVarArg)
     return false;
 
+  // If we are a PC-Rel function, let SDISel handle the call.
+  if (Subtarget->isUsingPCRelativeCalls())
+    return false;
+
   // Handle simple calls for now, with legal return types and
   // those that can be extended.
   Type *RetTy = CLI.RetTy;
   MVT RetVT;
   if (RetTy->isVoidTy())
     RetVT = MVT::isVoid;
   else if (!isTypeLegal(RetTy, RetVT) && RetVT != MVT::i16 &&
            RetVT != MVT::i8)
default:
       break;
   }
   return false;
 }
 
 // Materialize a floating-point constant into a register, and return
 // the register number (or zero if we failed to handle it).
 unsigned PPCFastISel::PPCMaterializeFP(const ConstantFP *CFP, MVT VT) {
+  // If this is a PC-Rel function, let SDISel handle constant pool.
+  if (Subtarget->isUsingPCRelativeCalls())
+    return false;
+
   // No plans to handle long double here.
   if (VT != MVT::f32 && VT != MVT::f64)
     return 0;
 
   // All FP constants are loaded from the constant pool.
   Align Alignment = DL.getPrefTypeAlign(CFP->getType());
   unsigned Idx = MCP.getConstantPoolIndex(cast<Constant>(CFP), Alignment);
   const bool HasSPE = Subtarget->hasSPE();
unsigned PPCFastISel::PPCMaterializeFP(const ConstantFP *CFP, MVT VT) {
   }
 
   return DestReg;
 }
 
 // Materialize the address of a global value into a register, and return
 // the register number (or zero if we failed to handle it).
 unsigned PPCFastISel::PPCMaterializeGV(const GlobalValue *GV, MVT VT) {
+  // If this is a PC-Rel function, let SDISel handle GV materialization.
+  if (Subtarget->isUsingPCRelativeCalls())
+    return false;
+
   assert(VT == MVT::i64 && "Non-address!");
   const TargetRegisterClass *RC = &PPC::G8RC_and_G8RC_NOX0RegClass;
   unsigned DestReg = createResultReg(RC);
 
   // Global values may be plain old object addresses, TLS object
   // addresses, constant pool entries, or jump tables.  How we generate
   // code for these may depend on small, medium, or large code model.
   CodeModel::Model CModel = TM.getCodeModel();

llvm/test/CodeGen/PowerPC/fast-isel-pcrel.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -O0 -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
 ; RUN:   -fast-isel -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
 ; RUN:   FileCheck %s
 
 %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i64, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i64, i32, [20 x i8] }
 %struct._IO_marker = type { %struct._IO_marker*, %struct._IO_FILE*, i32 }
 
 @.str = private unnamed_addr constant [25 x i8] c"Breaking the TOC for FP\0A\00", align 1
 @.str.1 = private unnamed_addr constant [25 x i8] c"Breaking the TOC for GV\0A\00", align 1
 @stdout = external global %struct._IO_FILE*, align 8
 
 ; Function Attrs: noinline nounwind optnone
 define internal void @loadFP(double* %d) #0 {
 ; CHECK-LABEL: loadFP:
-; CHECK:       # %bb.0: # %entry
+; CHECK:         .localentry loadFP, 1
+; CHECK-NEXT:  # %bb.0: # %entry
 ; CHECK-NEXT:    mflr r0
 ; CHECK-NEXT:    std r0, 16(r1)
 ; CHECK-NEXT:    stdu r1, -112(r1)
 ; CHECK-NEXT:    std r3, 104(r1)
 ; CHECK-NEXT:    paddi r3, 0, .L.str@PCREL, 1
 ; CHECK-NEXT:    bl printf@notoc
-; CHECK-NEXT:    addis r4, r2, .LCPI0_0@toc@ha
-; CHECK-NEXT:    lfd f0, .LCPI0_0@toc@l(r4)
 ; CHECK-NEXT:    ld r4, 104(r1)
-; CHECK-NEXT:    stfd f0, 0(r4)
+; CHECK-NEXT:    lis r5, 16403
+; CHECK-NEXT:    ori r5, r5, 62914
+; CHECK-NEXT:    sldi r5, r5, 32
+; CHECK-NEXT:    oris r5, r5, 36700
+; CHECK-NEXT:    ori r5, r5, 10486
+; CHECK-NEXT:    std r5, 0(r4)
 ; CHECK-NEXT:    addi r1, r1, 112
 ; CHECK-NEXT:    ld r0, 16(r1)
 ; CHECK-NEXT:    mtlr r0
 ; CHECK-NEXT:    blr
 entry:
   %d.addr = alloca double*, align 8
   store double* %d, double** %d.addr, align 8
   %call = call signext i32 (i8*, ...) @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
   %0 = load double*, double** %d.addr, align 8
   store double 4.990000e+00, double* %0, align 8
   ret void
 }
 
 declare signext i32 @printf(i8*, ...)
 
 ; Function Attrs: noinline nounwind optnone
 define internal void @loadGV() #0 {
 ; CHECK-LABEL: loadGV:
-; CHECK:       # %bb.0: # %entry
+; CHECK:         .localentry loadGV, 1
+; CHECK-NEXT:  # %bb.0: # %entry
 ; CHECK-NEXT:    mflr r0
 ; CHECK-NEXT:    std r0, 16(r1)
 ; CHECK-NEXT:    stdu r1, -112(r1)
 ; CHECK-NEXT:    paddi r3, 0, .L.str.1@PCREL, 1
 ; CHECK-NEXT:    bl printf@notoc
-; CHECK-NEXT:    addis r4, r2, .LC0@toc@ha
-; CHECK-NEXT:    ld r4, .LC0@toc@l(r4)
+; CHECK-NEXT:    pld r4, stdout@got@pcrel(0), 1
 ; CHECK-NEXT:    ld r4, 0(r4)
 ; CHECK-NEXT:    li r5, 97
-; CHECK-NEXT:    extsw r5, r5
 ; CHECK-NEXT:    std r3, 104(r1) # 8-byte Folded Spill
 ; CHECK-NEXT:    mr r3, r5
-; CHECK-NEXT:    bl _IO_putc
-; CHECK-NEXT:    nop
+; CHECK-NEXT:    bl _IO_putc@notoc
 ; CHECK-NEXT:    addi r1, r1, 112
 ; CHECK-NEXT:    ld r0, 16(r1)
 ; CHECK-NEXT:    mtlr r0
 ; CHECK-NEXT:    blr
 entry:
   %call = call signext i32 (i8*, ...) @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i64 0, i64 0))
   %0 = load %struct._IO_FILE*, %struct._IO_FILE** @stdout, align 8
   %call1 = call signext i32 @_IO_putc(i32 signext 97, %struct._IO_FILE* %0)
   ret void
 }
 
 declare signext i32 @_IO_putc(i32 signext, %struct._IO_FILE*)
 
 attributes #0 = { noinline nounwind optnone }