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Differential D83947

[ARM] halfword store hits llvm_unreachable with big-endian
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Authored by simonwallis2 on Jul 16 2020, 6:24 AM.

Details

Reviewers
olista01
ostannard
Commits
rG3e0ccf9a9075: [ARM] halfword store hits llvm_unreachable with big-endian
Summary

[ARM] halfword store hits llvm_unreachable with big-endian

Provide missing case in getFixupKindContainerSizeBytes().

This stops execution reaching llvm_unreachable("Unknown fixup kind!")

D83947

Diff Detail

Event Timeline

simonwallis2 created this revision.Jul 16 2020, 6:24 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 16 2020, 6:24 AM
Herald added subscribers: llvm-commits, danielkiss, hiraditya, kristof.beyls. · View Herald Transcript
Harbormaster completed remote builds in B64504: Diff 278451.Jul 16 2020, 6:58 AM
ostannard accepted this revision.Jul 16 2020, 8:48 AM
ostannard added a subscriber: ostannard.

LGTM

This revision is now accepted and ready to land.Jul 16 2020, 8:48 AM
simonwallis2 edited the summary of this revision. (Show Details)Jul 16 2020, 11:28 PM
simonwallis2 edited the summary of this revision. (Show Details)Jul 16 2020, 11:50 PM
simonwallis2 edited the summary of this revision. (Show Details)Jul 16 2020, 11:55 PM
Closed by commit rG3e0ccf9a9075: [ARM] halfword store hits llvm_unreachable with big-endian (authored by simonwallis2). · Explain WhyJul 17 2020, 12:58 AM
This revision was automatically updated to reflect the committed changes.
simonwallis2 mentioned this in rG3e0ccf9a9075: [ARM] halfword store hits llvm_unreachable with big-endian.

Revision Contents

PathSize
llvm/
lib/
Target/
ARM/
MCTargetDesc/
1 line
test/
CodeGen/
ARM/
9 lines

Diff 278451

llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp

Show First 20 Lines • Show All 1,004 Lines • ▼ Show 20 Linesstatic unsigned getFixupKindContainerSizeBytes(unsigned Kind) {
case ARM::fixup_arm_condbl: case ARM::fixup_arm_condbl:
case ARM::fixup_arm_blx: case ARM::fixup_arm_blx:
case ARM::fixup_arm_condbranch: case ARM::fixup_arm_condbranch:
case ARM::fixup_arm_uncondbranch: case ARM::fixup_arm_uncondbranch:
case ARM::fixup_t2_ldst_pcrel_12: case ARM::fixup_t2_ldst_pcrel_12:
case ARM::fixup_t2_condbranch: case ARM::fixup_t2_condbranch:
case ARM::fixup_t2_uncondbranch: case ARM::fixup_t2_uncondbranch:
case ARM::fixup_t2_pcrel_10: case ARM::fixup_t2_pcrel_10:
case ARM::fixup_t2_pcrel_9:
case ARM::fixup_t2_adr_pcrel_12: case ARM::fixup_t2_adr_pcrel_12:
case ARM::fixup_arm_thumb_bl: case ARM::fixup_arm_thumb_bl:
case ARM::fixup_arm_thumb_blx: case ARM::fixup_arm_thumb_blx:
case ARM::fixup_arm_movt_hi16: case ARM::fixup_arm_movt_hi16:
case ARM::fixup_arm_movw_lo16: case ARM::fixup_arm_movw_lo16:
case ARM::fixup_t2_movt_hi16: case ARM::fixup_t2_movt_hi16:
case ARM::fixup_t2_movw_lo16: case ARM::fixup_t2_movw_lo16:
case ARM::fixup_arm_mod_imm: case ARM::fixup_arm_mod_imm:
▲ Show 20 Lines • Show All 295 Lines • Show Last 20 Lines

llvm/test/CodeGen/ARM/store_half.ll

  • This file was added.
; RUN: llc < %s -mtriple=thumbebv8.2a-arm-none-eabi -mattr=+fullfp16 -filetype=obj -o /dev/null
; RUN: llc < %s -mtriple=thumbv8.2a-arm-none-eabi -mattr=+fullfp16 -filetype=obj -o /dev/null
; RUN: llc < %s -mtriple=armebv8.2a-arm-none-eabi -mattr=+fullfp16 -filetype=obj -o /dev/null
; RUN: llc < %s -mtriple=armv8.2a-arm-none-eabi -mattr=+fullfp16 -filetype=obj -o /dev/null
define void @woah(half* %waythere) {
store half 0xHE110, half* %waythere
ret void
}