[PowerPC][AIX] Enable base-pointer.

[sfertile]

Summary

Enables using base-pointer on AIX.

[ZarkoCA]

I think this one is good. I wonder if there should be more tests to check corrected alignment of various allocations but that seems out of scope for the patch and the tests in https://reviews.llvm.org/D72454 covered that anyway.

llvm/test/CodeGen/PowerPC/aix-base-pointer.ll

11

typo: calculated

23

nit: align these with the line below?

llvm/lib/Target/PowerPC/PPCFrameLowering.cpp

static unsigned computeLinkageSize(const PPCSubtarget &STI) {
   if (STI.isAIXABI() || STI.isPPC64())
     return (STI.isELFv2ABI() ? 4 : 6) * (STI.isPPC64() ? 8 : 4);
 
   // 32-bit SVR4 ABI:
   return 8;
 }
 
 static unsigned computeBasePointerSaveOffset(const PPCSubtarget &STI) {
-  // SVR4 ABI: First slot in the general register save area.
-  return STI.isPPC64()
-             ? -16U
-             : STI.getTargetMachine().isPositionIndependent() ? -12U : -8U;
+  // Third slot in the general purpose register save area.
+  if (STI.is32BitELFABI() && STI.getTargetMachine().isPositionIndependent())
+    return -12U;
+
+  // Second slot in the general purpose register save area.
+  return STI.isPPC64() ? -16U : -8U;
 }
 
 static unsigned computeCRSaveOffset(const PPCSubtarget &STI) {
   return (STI.isAIXABI() && !STI.isPPC64()) ? 4 : 8;
 }
 
 PPCFrameLowering::PPCFrameLowering(const PPCSubtarget &STI)
     : TargetFrameLowering(TargetFrameLowering::StackGrowsDown,
unsigned PPCFrameLowering::getTOCSaveOffset() const {
   return TOCSaveOffset;
 }
 
 unsigned PPCFrameLowering::getFramePointerSaveOffset() const {
   return FramePointerSaveOffset;
 }
 
 unsigned PPCFrameLowering::getBasePointerSaveOffset() const {
-  if (Subtarget.isAIXABI())
-    report_fatal_error("BasePointer is not implemented on AIX yet.");
   return BasePointerSaveOffset;
 }
 
 bool PPCFrameLowering::enableShrinkWrapping(const MachineFunction &MF) const {
   if (MF.getInfo<PPCFunctionInfo>()->shrinkWrapDisabled())
     return false;
   return (MF.getSubtarget<PPCSubtarget>().isSVR4ABI() &&
           MF.getSubtarget<PPCSubtarget>().isPPC64());
 }

llvm/test/CodeGen/PowerPC/aix-base-pointer.ll

+; RUN: llc -mcpu=pwr7 -mattr=-altivec -verify-machineinstrs \
+; RUN:   -mtriple=powerpc-unknown-aix < %s  | FileCheck %s --check-prefix 32BIT
+
+; RUN: llc -mcpu=pwr7 -mattr=-altivec -verify-machineinstrs \
+; RUN:   -mtriple=powerpc64-unknown-aix < %s | FileCheck %s --check-prefix 64BIT
+
+; Use an overaligned buffer to force base-pointer usage. Test verifies:
+; - base pointer register (r30) is saved/defined/restored.
+; - stack frame is allocated with correct alignment.
+; - Address of %AlignedBuffer is calculated based off offset from the stack
+;   pointer.
+
+define void @caller() {
+  %AlignedBuffer = alloca [32 x i32], align 32
+  %Pointer = getelementptr inbounds [32 x i32], [32 x i32]* %AlignedBuffer, i64 0, i64 0
+  call void @callee(i32* %Pointer)
+  ret void
+}
+
+declare void @callee(i32*)
+
+; 32BIT-LABEL: .caller:
+; 32BIT:         stw 30, -8(1)
+; 32BIT:         mr 30, 1
+; 32BIT:         clrlwi  0, 1, 27
+; 32BIT:         subfic 0, 0, -224
+; 32BIT:         stwux 1, 1, 0
+; 32BIT:         addi 3, 1, 64
+; 32BIT:         bl .callee
+; 32BIT:         lwz 1, 0(1)
+; 32BIT:         lwz 30, -8(1)
+
+; 64BIT-LABEL: .caller:
+; 64BIT:         std 30, -16(1)
+; 64BIT:         mr 30, 1
+; 64BIT:         clrldi  0, 1, 59
+; 64BIT:         subfic 0, 0, -288
+; 64BIT:         stdux 1, 1, 0
+; 64BIT:         addi 3, 1, 128
+; 64BIT:         bl .callee
+; 64BIT:         ld 1, 0(1)
+; 64BIT:         ld 30, -16(1)