[DAG] SimplifyDemandedVectorElts Bugfix for X86ISD::VBROADCAST calculating wrong DemandedElts for its Operand

[yubing]

Summary

Assume we have:
t60: v4i32 = insert_vector_elt t29, t27, Constant:i64<2>
t63: v8i32 = X86ISD::VBROADCAST t60
if t60's DemandElts is 0b10110001, t63's DemandElts should be 0b1011 | 0b0001 = 0b1011, but current code will set t63's DemandElts to 0b0001

Simon, it seems very difficult to write a testcase, , do you have any suggestions for the testcase?

[craig.topper]

Broadcast should only demand the lowest element. The recursive call to SimplifyDemandedVectorElts call is supposed to ignore the incoming DemandedElts if the SDValue has more than one use.

[yubing]

In D80906#2065694, @craig.topper wrote:

Broadcast should only demand the lowest element. The recursive call to SimplifyDemandedVectorElts call is supposed to ignore the incoming DemandedElts if the SDValue has more than one use.

Hi, Craig. But it is X86ISD::VBroadcast, if its Operand is a vector, is that correct to demand the lowest element for its operand?

llvm/lib/Target/X86/X86ISelLowering.cpp

if (TLO.DAG.computeKnownBits(Src, DemandedUpperElts, Depth + 1).isZero())
       return TLO.CombineTo(Op, Src);
     break;
   }
   case X86ISD::VBROADCAST: {
     SDValue Src = Op.getOperand(0);
     MVT SrcVT = Src.getSimpleValueType();
     if (!SrcVT.isVector())
       return false;
+    int SrcNumElts = SrcVT.getVectorNumElements();
     // Don't bother broadcasting if we just need the 0'th element.
     if (DemandedElts == 1) {
       if (Src.getValueType() != VT)
         Src = widenSubVector(VT.getSimpleVT(), Src, false, Subtarget, TLO.DAG,
                              SDLoc(Op));
       return TLO.CombineTo(Op, Src);
     }
     APInt SrcUndef, SrcZero;
-    APInt SrcElts = APInt::getOneBitSet(SrcVT.getVectorNumElements(), 0);
+    APInt SrcElts(SrcNumElts, 0);
+    for (int Idx = 0; Idx < NumElts; Idx++) {
+      if (!DemandedElts[Idx])
+        continue;
+      SrcElts.setBit(Idx % SrcNumElts);
+    }
     if (SimplifyDemandedVectorElts(Src, SrcElts, SrcUndef, SrcZero, TLO,
                                    Depth + 1))
       return true;
     break;
   }
   case X86ISD::VPERMV: {
     SDValue Mask = Op.getOperand(0);
     APInt MaskUndef, MaskZero;