[AMDGPU] GFX10 PAL: Only pad with s_code_end in pipeline compilation

[tpr]

Summary

For PAL, GFX10 s_code_end padding is now added only for a full pipeline
compilation, not a shader compilation.

Change-Id: I0d4fa364178a79c47d8e22177c424722e3c9686d

[arsenm]

llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

323–347

Should move to predicate function

334

Could break out of the whole loop?

[rampitec]

llvm/test/CodeGen/AMDGPU/s_code_end_pal_pipeline.ll

10

Can you create a separate test instead?

[tpr]

llvm/test/CodeGen/AMDGPU/s_code_end_pal_pipeline.ll

10

This file s_code_end_pal_pipeline.ll is a new separate test. arc diff got confused in the way it constructed the diff -- I modified the original s_code_end.ll to expect PAL to not do padding, and added this new s_code_end_pal_pipeline.ll to check that it does add padding for a PAL pipeline.

[rampitec]

llvm/test/CodeGen/AMDGPU/s_code_end_pal_pipeline.ll

10

Ah, indeed. Very confusing.

[tpr]

V2: Review comments: Separate predicate function; early exit on CS.

[rampitec]

LGTM

[tpr]

I am abandoning this, because it turns out that it is difficult to reliably detect whether we have a PAL pipeline or a PAL shader compilation. Instead, the LLPC linker will remove the padding, and then adds it back on after concatenating .text sections.

llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

 
 bool AMDGPUAsmPrinter::doFinalization(Module &M) {
   CallGraphResourceInfo.clear();
 
   // Pad with s_code_end to help tools and guard against instruction prefetch
   // causing stale data in caches. Arguably this should be done by the linker,
   // which is why this isn't done for Mesa.
   const MCSubtargetInfo &STI = *getGlobalSTI();
-  if (AMDGPU::isGFX10(STI) &&
-      (STI.getTargetTriple().getOS() == Triple::AMDHSA ||
-       STI.getTargetTriple().getOS() == Triple::AMDPAL)) {
+  if (AMDGPU::isGFX10(STI)) {
+    bool AddGuard = STI.getTargetTriple().getOS() == Triple::AMDHSA;
+    if (!AddGuard && STI.getTargetTriple().getOS() == Triple::AMDPAL) {
+      // On PAL, we add the guard only if doing a full pipeline compile, as
+      // there is no later link step. We can spot a full pipeline compile by
+      // there being a PS and at least one of GS or VS, or instead a CS.
+      bool GotPs = false, GotGsOrVs = false, GotCs = false;
+      for (Function &F : M) {
+        if (!F.isDeclaration()) {
+          switch (F.getCallingConv()) {
+          case CallingConv::AMDGPU_CS:
+            GotCs = true;
+            break;
+          case CallingConv::AMDGPU_PS:
+            GotPs = true;
+            break;
+          case CallingConv::AMDGPU_GS:
+          case CallingConv::AMDGPU_VS:
+            GotGsOrVs = true;
+            break;
+          }
+        }
+      }
+      AddGuard = (GotPs && GotGsOrVs) || GotCs;
+    }
+    if (AddGuard) {
       OutStreamer->SwitchSection(getObjFileLowering().getTextSection());
       getTargetStreamer()->EmitCodeEnd();
     }
+  }
 
   return AsmPrinter::doFinalization(M);
 }
 
 // Print comments that apply to both callable functions and entry points.
 void AMDGPUAsmPrinter::emitCommonFunctionComments(
   uint32_t NumVGPR,
   Optional<uint32_t> NumAGPR,

llvm/test/CodeGen/AMDGPU/s_code_end.ll

 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -asm-verbose=0 < %s | FileCheck -check-prefixes=GCN,GCN-ASM,GFX10END,GFX10END-ASM %s
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -filetype=obj < %s | llvm-objdump --arch=amdgcn --mcpu=gfx1010 -d - | FileCheck --check-prefixes=GCN,GCN-OBJ,GFX10END,GFX10END-OBJ %s
-; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 -asm-verbose=0 < %s | FileCheck -check-prefixes=GCN,GCN-ASM,GFX10END,GFX10END-ASM %s
+; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 -asm-verbose=0 < %s | FileCheck -check-prefixes=GCN,GCN-ASM,GFX10NOEND,GFX10NOEND-ASM %s
 ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -asm-verbose=0 < %s | FileCheck -check-prefixes=GCN,GCN-ASM,GFX10NOEND,GFX10NOEND-ASM %s
 ; RUN: llc -mtriple=amdgcn-- -mcpu=gfx1010 -filetype=obj < %s | llvm-objdump --arch=amdgcn --mcpu=gfx1010 -d - | FileCheck --check-prefixes=GCN,GCN-OBJ,GFX10NOEND,GFX10NOEND-OBJ %s
 
 ; GCN:            a_kernel1{{>?}}:
 ; GCN:                    s_endpgm
 ; GCN-ASM:        [[END_LABEL1:\.Lfunc_end.*]]:
 ; GCN-ASM-NEXT:           .size   a_kernel1, [[END_LABEL1]]-a_kernel1
 

llvm/test/CodeGen/AMDGPU/s_code_end_pal_pipeline.ll

-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -asm-verbose=0 < %s | FileCheck -check-prefixes=GCN,GCN-ASM,GFX10END,GFX10END-ASM %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -filetype=obj < %s | llvm-objdump --arch=amdgcn --mcpu=gfx1010 -d - | FileCheck --check-prefixes=GCN,GCN-OBJ,GFX10END,GFX10END-OBJ %s
 ; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 -asm-verbose=0 < %s | FileCheck -check-prefixes=GCN,GCN-ASM,GFX10END,GFX10END-ASM %s
-; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -asm-verbose=0 < %s | FileCheck -check-prefixes=GCN,GCN-ASM,GFX10NOEND,GFX10NOEND-ASM %s
-; RUN: llc -mtriple=amdgcn-- -mcpu=gfx1010 -filetype=obj < %s | llvm-objdump --arch=amdgcn --mcpu=gfx1010 -d - | FileCheck --check-prefixes=GCN,GCN-OBJ,GFX10NOEND,GFX10NOEND-OBJ %s
 
 ; GCN:            a_kernel1{{>?}}:
 ; GCN:                    s_endpgm
 ; GCN-ASM:        [[END_LABEL1:\.Lfunc_end.*]]:
 ; GCN-ASM-NEXT:           .size   a_kernel1, [[END_LABEL1]]-a_kernel1
 
 ; GCN-OBJ-NEXT:           s_nop 0
 
-define amdgpu_kernel void @a_kernel1() {
+define amdgpu_vs void @a_kernel1() {
   ret void
 }
 
 ; GCN:            a_kernel2{{>?}}:
 ; GCN:                    s_endpgm
 ; GCN-ASM:        [[END_LABEL2:\.Lfunc_end.*]]:
 ; GCN-ASM-NEXT:           .size   a_kernel2, [[END_LABEL2]]-a_kernel2
 
 ; GCN-OBJ:   {{^$}}
 
-define amdgpu_kernel void @a_kernel2() {
+define amdgpu_ps void @a_kernel2() {
   ret void
 }
 
 ; GCN-ASM:                .globl  a_function
 ; GCN-ASM-NEXT:           .p2align        2
 ; GCN-ASM-NEXT:           .type   a_function,@function
 
 ; GCN-NEXT:       a_function{{>?}}: