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[RISCV] Add patterns for indirect float conversions
AbandonedPublic

Authored by lenary on Apr 27 2020, 2:27 AM.

Details

Reviewers
luismarques
Summary

This addresses some weird assembly sequences seen during float conversion
involving casts via double. In particular, the fcvt instructions should, if
GCC and I are not mistaken, compose together based on suffix/prefix, as shown in
the test.

The patterns are added for the F extension because they only need F-extension
instructions, but the tests only apply if you have enabled the D extension
because without it, the legaliser will turn the conversions into libcalls which
cannot be matched on in the same way. Maybe this is really a job for the
DAGCombiner?

Diff Detail

Event Timeline

lenary created this revision.Apr 27 2020, 2:27 AM
Herald added a project: Restricted Project. · View Herald TranscriptApr 27 2020, 2:27 AM
lenary marked an inline comment as done.
lenary added inline comments.
llvm/lib/Target/RISCV/RISCVInstrInfoF.td
396–397

These patterns were duplicated in this file, which seems incorrect.

asb added inline comments.Apr 30 2020, 2:18 AM
llvm/lib/Target/RISCV/RISCVInstrInfoF.td
396–397

Looks like a likely holdover of some rebasing. I agree, these patterns can be deleted. Please do land that NFC change directly.

lenary marked an inline comment as done.Apr 30 2020, 3:38 AM
lenary added inline comments.
llvm/lib/Target/RISCV/RISCVInstrInfoF.td
396–397

Landed directly in rG09f6b9792bc.

lenary abandoned this revision.May 31 2020, 11:32 AM