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llvm/
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lib/Target/PowerPC/
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Target/
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PowerPC/
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PPCInstrInfo.td
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test/MC/
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MC/
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Disassembler/PowerPC/
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PowerPC/
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ppc64-encoding-bookIII.txt
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PowerPC/
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ppc64-encoding-bookIII.s
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ppc64-encoding-ext.s

Differential D75821

[PowerPC] Remove the repeated definition for some InstAlias for mtspr/mfspr
ClosedPublic

Authored by ZhangKang on Mar 7 2020, 11:12 PM.

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kbarton
hiraditya
nemanjai
jsji
steven.zhang

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rG4673699a470b: [PowerPC] Remove the repeated definition for some InstAlias for mtspr/mfspr

Summary

Below InstAlias have been redefined, this patch is to remove the repeated definition.
mtdec/mfdec mtsdr1/mfsdr1 mtsrr0/mfsrr0 mtsrr1/mfsrr1 mtasr

4517 def : InstAlias<"mtdec $Rx", (MTSPR 22, gprc:$Rx)>;
4518 def : InstAlias<"mfdec $Rx", (MFSPR gprc:$Rx, 22)>;
4519
4520 def : InstAlias<"mtsdr1 $Rx", (MTSPR 25, gprc:$Rx)>;
4521 def : InstAlias<"mfsdr1 $Rx", (MFSPR gprc:$Rx, 25)>;
4522
4523 def : InstAlias<"mtsrr0 $Rx", (MTSPR 26, gprc:$Rx)>;
4524 def : InstAlias<"mfsrr0 $Rx", (MFSPR gprc:$Rx, 26)>;
4525
4526 def : InstAlias<"mtsrr1 $Rx", (MTSPR 27, gprc:$Rx)>;
4527 def : InstAlias<"mfsrr1 $Rx", (MFSPR gprc:$Rx, 27)>;
4528
4529 def : InstAlias<"mtcfar $Rx", (MTSPR 28, gprc:$Rx)>;
4530 def : InstAlias<"mfcfar $Rx", (MFSPR gprc:$Rx, 28)>;
...

4557 def : InstAlias<"mtasr $RT", (MTSPR 280, gprc:$RT)>;

...
4621 def : InstAlias<"mtasr $RS", (MTSPR 280, gprc:$RS)>;
4622
4623 def : InstAlias<"mfdec $RT", (MFSPR gprc:$RT, 22)>;
4624 def : InstAlias<"mtdec $RT", (MTSPR 22, gprc:$RT)>;
4625
4626 def : InstAlias<"mfsdr1 $RT", (MFSPR gprc:$RT, 25)>;
4627 def : InstAlias<"mtsdr1 $RT", (MTSPR 25, gprc:$RT)>;
4628
4629 def : InstAlias<"mfsrr0 $RT", (MFSPR gprc:$RT, 26)>;
4630 def : InstAlias<"mfsrr1 $RT", (MFSPR gprc:$RT, 27)>;
4631 def : InstAlias<"mtsrr0 $RT", (MTSPR 26, gprc:$RT)>;
4632 def : InstAlias<"mtsrr1 $RT", (MTSPR 27, gprc:$RT)>;

Diff Detail

Repository: rG LLVM Github Monorepo

Event Timeline

ZhangKang created this revision.Mar 7 2020, 11:12 PM

Herald added subscribers: shchenz, • wuzish. · View Herald TranscriptMar 7 2020, 11:12 PM

ZhangKang edited the summary of this revision. (Show Details)Mar 7 2020, 11:17 PM

Remove mtasr.

Harbormaster completed remote builds in B48484: Diff 248985.Mar 8 2020, 12:01 AM

ZhangKang edited the summary of this revision. (Show Details)Mar 8 2020, 12:05 AM

ZhangKang set the repository for this revision to rG LLVM Github Monorepo.

Rebase the latest code.

Harbormaster completed remote builds in B48488: Diff 248992.Mar 8 2020, 5:50 AM

This is a curious situation. How did we end up having multiple definitions of instruction aliases?

In D75821#1912110, @nemanjai wrote:

This is a curious situation. How did we end up having multiple definitions of instruction aliases?

These were added six years ago in different time. The code is added from different patch. The one is https://reviews.llvm.org/rG62cb635 Implement asm support for a few PowerPC bookIII that are needed for assembling in 2013.9, and the other is https://reviews.llvm.org/rGb1ccf56 Add a number of aliases for SPR access in 2014.7.

Before my NFC patch https://reviews.llvm.org/rGb0f3d49a05ce487650ac0b3e3a23eae21f494a96 , the alias definition for MTSPR/MFSPR is unordered. The second author added the repeated code whether search whether there is the same definition.

In D75821#1912110, @nemanjai wrote:

This is a curious situation. How did we end up having multiple definitions of instruction aliases?

If there is multiple definitions of instruction aliases, there will be two identical entries in the match table except the aliased mnemonic generated by tblgen. Maybe, tblgen need to be improved to diagnose such case.

Ping.

LGTM (but see if Nemanjai(@nemanjai ) has comments)

This revision is now accepted and ready to land.Mar 19 2020, 7:22 PM

LGTM. Thanks for cleaning it up. I was mainly concerned with making sure this is an omission rather than something that was done on purpose to work around some bug. But it does indeed appear to be something we accidentally added.

Closed by commit rG4673699a470b: [PowerPC] Remove the repeated definition for some InstAlias for mtspr/mfspr (authored by ZhangKang). · Explain WhyMar 26 2020, 3:12 AM

This revision was automatically updated to reflect the committed changes.

Revision Contents

Path

Size

llvm/

lib/

Target/

PowerPC/

PPCInstrInfo.td

13 lines

test/

MC/

Disassembler/

PowerPC/

ppc64-encoding-bookIII.txt

18 lines

PowerPC/

ppc64-encoding-bookIII.s

36 lines

ppc64-encoding-ext.s

36 lines

Diff 252782

llvm/lib/Target/PowerPC/PPCInstrInfo.td

	Show First 20 Lines • Show All 4,608 Lines • ▼ Show 20 Lines
	def : InstAlias<"mfsrr3 $Rx", (MFSPR gprc:$Rx, 991)>, Requires<[IsPPC4xx]>;			def : InstAlias<"mfsrr3 $Rx", (MFSPR gprc:$Rx, 991)>, Requires<[IsPPC4xx]>;

	def : InstAlias<"mtdccr $Rx", (MTSPR 1018, gprc:$Rx)>, Requires<[IsPPC4xx]>;			def : InstAlias<"mtdccr $Rx", (MTSPR 1018, gprc:$Rx)>, Requires<[IsPPC4xx]>;
	def : InstAlias<"mfdccr $Rx", (MFSPR gprc:$Rx, 1018)>, Requires<[IsPPC4xx]>;			def : InstAlias<"mfdccr $Rx", (MFSPR gprc:$Rx, 1018)>, Requires<[IsPPC4xx]>;

	def : InstAlias<"mticcr $Rx", (MTSPR 1019, gprc:$Rx)>, Requires<[IsPPC4xx]>;			def : InstAlias<"mticcr $Rx", (MTSPR 1019, gprc:$Rx)>, Requires<[IsPPC4xx]>;
	def : InstAlias<"mficcr $Rx", (MFSPR gprc:$Rx, 1019)>, Requires<[IsPPC4xx]>;			def : InstAlias<"mficcr $Rx", (MFSPR gprc:$Rx, 1019)>, Requires<[IsPPC4xx]>;

	def : InstAlias<"mtasr $RS", (MTSPR 280, gprc:$RS)>;

	def : InstAlias<"mfdec $RT", (MFSPR gprc:$RT, 22)>;
	def : InstAlias<"mtdec $RT", (MTSPR 22, gprc:$RT)>;

	def : InstAlias<"mfsdr1 $RT", (MFSPR gprc:$RT, 25)>;
	def : InstAlias<"mtsdr1 $RT", (MTSPR 25, gprc:$RT)>;

	def : InstAlias<"mfsrr0 $RT", (MFSPR gprc:$RT, 26)>;
	def : InstAlias<"mfsrr1 $RT", (MFSPR gprc:$RT, 27)>;
	def : InstAlias<"mtsrr0 $RT", (MTSPR 26, gprc:$RT)>;
	def : InstAlias<"mtsrr1 $RT", (MTSPR 27, gprc:$RT)>;


	def : InstAlias<"tlbie $RB", (TLBIE R0, gprc:$RB)>;			def : InstAlias<"tlbie $RB", (TLBIE R0, gprc:$RB)>;

	def : InstAlias<"tlbrehi $RS, $A", (TLBRE2 gprc:$RS, gprc:$A, 0)>,			def : InstAlias<"tlbrehi $RS, $A", (TLBRE2 gprc:$RS, gprc:$A, 0)>,
	Requires<[IsPPC4xx]>;			Requires<[IsPPC4xx]>;
	def : InstAlias<"tlbrelo $RS, $A", (TLBRE2 gprc:$RS, gprc:$A, 1)>,			def : InstAlias<"tlbrelo $RS, $A", (TLBRE2 gprc:$RS, gprc:$A, 1)>,
	Requires<[IsPPC4xx]>;			Requires<[IsPPC4xx]>;
	def : InstAlias<"tlbwehi $RS, $A", (TLBWE2 gprc:$RS, gprc:$A, 0)>,			def : InstAlias<"tlbwehi $RS, $A", (TLBWE2 gprc:$RS, gprc:$A, 0)>,
	▲ Show 20 Lines • Show All 515 Lines • Show Last 20 Lines

llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt

	Show First 20 Lines • Show All 51 Lines • ▼ Show 20 Lines
	0x7c 0x91 0x43 0xa6			0x7c 0x91 0x43 0xa6

	# CHECK: mtspr 274, 4			# CHECK: mtspr 274, 4
	0x7c 0x92 0x43 0xa6			0x7c 0x92 0x43 0xa6

	# CHECK: mtspr 275, 4			# CHECK: mtspr 275, 4
	0x7c 0x93 0x43 0xa6			0x7c 0x93 0x43 0xa6

	# CHECK: mtspr 280, 4			# CHECK: mtasr 4
	0x7c 0x98 0x43 0xa6			0x7c 0x98 0x43 0xa6

	# CHECK: mfspr 4, 22			# CHECK: mfdec 4
	0x7c 0x96 0x02 0xa6			0x7c 0x96 0x02 0xa6

	# CHECK: mtspr 22, 4			# CHECK: mtdec 4
	0x7c 0x96 0x03 0xa6			0x7c 0x96 0x03 0xa6

	# CHECK: mfpvr 4			# CHECK: mfpvr 4
	0x7c 0x9f 0x42 0xa6			0x7c 0x9f 0x42 0xa6

	# CHECK: mfspr 4, 25			# CHECK: mfsdr1 4
	0x7c 0x99 0x02 0xa6			0x7c 0x99 0x02 0xa6

	# CHECK: mtspr 25, 4			# CHECK: mtsdr1 4
	0x7c 0x99 0x03 0xa6			0x7c 0x99 0x03 0xa6

	# CHECK: mfspr 4, 26			# CHECK: mfsrr0 4
	0x7c 0x9a 0x02 0xa6			0x7c 0x9a 0x02 0xa6

	# CHECK: mtspr 26, 4			# CHECK: mtsrr0 4
	0x7c 0x9a 0x03 0xa6			0x7c 0x9a 0x03 0xa6

	# CHECK: mfspr 4, 27			# CHECK: mfsrr1 4
	0x7c 0x9b 0x02 0xa6			0x7c 0x9b 0x02 0xa6

	# CHECK: mtspr 27, 4			# CHECK: mtsrr1 4
	0x7c 0x9b 0x03 0xa6			0x7c 0x9b 0x03 0xa6

	# CHECK: slbie 4			# CHECK: slbie 4
	0x7c 0x00 0x23 0x64			0x7c 0x00 0x23 0x64

	# CHECK: slbmte 4, 5			# CHECK: slbmte 4, 5
	0x7c 0x80 0x2b 0x24			0x7c 0x80 0x2b 0x24

	▲ Show 20 Lines • Show All 50 Lines • Show Last 20 Lines

llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s

	Show First 20 Lines • Show All 84 Lines • ▼ Show 20 Lines
	# CHECK-BE: mtspr 262, 4 # encoding: [0x7c,0x86,0x43,0xa6]			# CHECK-BE: mtspr 262, 4 # encoding: [0x7c,0x86,0x43,0xa6]
	# CHECK-LE: mtspr 262, 4 # encoding: [0xa6,0x43,0x86,0x7c]			# CHECK-LE: mtspr 262, 4 # encoding: [0xa6,0x43,0x86,0x7c]
	mtsprg6 %r4			mtsprg6 %r4

	# CHECK-BE: mtspr 263, 4 # encoding: [0x7c,0x87,0x43,0xa6]			# CHECK-BE: mtspr 263, 4 # encoding: [0x7c,0x87,0x43,0xa6]
	# CHECK-LE: mtspr 263, 4 # encoding: [0xa6,0x43,0x87,0x7c]			# CHECK-LE: mtspr 263, 4 # encoding: [0xa6,0x43,0x87,0x7c]
	mtsprg7 %r4			mtsprg7 %r4

	# CHECK-BE: mtspr 280, 4 # encoding: [0x7c,0x98,0x43,0xa6]			# CHECK-BE: mtasr 4 # encoding: [0x7c,0x98,0x43,0xa6]
	# CHECK-LE: mtspr 280, 4 # encoding: [0xa6,0x43,0x98,0x7c]			# CHECK-LE: mtasr 4 # encoding: [0xa6,0x43,0x98,0x7c]
	mtasr %r4			mtasr %r4

	# CHECK-BE: mfspr 4, 22 # encoding: [0x7c,0x96,0x02,0xa6]			# CHECK-BE: mfdec 4 # encoding: [0x7c,0x96,0x02,0xa6]
	# CHECK-LE: mfspr 4, 22 # encoding: [0xa6,0x02,0x96,0x7c]			# CHECK-LE: mfdec 4 # encoding: [0xa6,0x02,0x96,0x7c]
	mfdec %r4			mfdec %r4

	# CHECK-BE: mtspr 22, 4 # encoding: [0x7c,0x96,0x03,0xa6]			# CHECK-BE: mtdec 4 # encoding: [0x7c,0x96,0x03,0xa6]
	# CHECK-LE: mtspr 22, 4 # encoding: [0xa6,0x03,0x96,0x7c]			# CHECK-LE: mtdec 4 # encoding: [0xa6,0x03,0x96,0x7c]
	mtdec %r4			mtdec %r4

	# CHECK-BE: mfpvr 4 # encoding: [0x7c,0x9f,0x42,0xa6]			# CHECK-BE: mfpvr 4 # encoding: [0x7c,0x9f,0x42,0xa6]
	# CHECK-LE: mfpvr 4 # encoding: [0xa6,0x42,0x9f,0x7c]			# CHECK-LE: mfpvr 4 # encoding: [0xa6,0x42,0x9f,0x7c]
	mfpvr %r4			mfpvr %r4

	# CHECK-BE: mfspr 4, 25 # encoding: [0x7c,0x99,0x02,0xa6]			# CHECK-BE: mfsdr1 4 # encoding: [0x7c,0x99,0x02,0xa6]
	# CHECK-LE: mfspr 4, 25 # encoding: [0xa6,0x02,0x99,0x7c]			# CHECK-LE: mfsdr1 4 # encoding: [0xa6,0x02,0x99,0x7c]
	mfsdr1 %r4			mfsdr1 %r4

	# CHECK-BE: mtspr 25, 4 # encoding: [0x7c,0x99,0x03,0xa6]			# CHECK-BE: mtsdr1 4 # encoding: [0x7c,0x99,0x03,0xa6]
	# CHECK-LE: mtspr 25, 4 # encoding: [0xa6,0x03,0x99,0x7c]			# CHECK-LE: mtsdr1 4 # encoding: [0xa6,0x03,0x99,0x7c]
	mtsdr1 %r4			mtsdr1 %r4

	# CHECK-BE: mfspr 4, 26 # encoding: [0x7c,0x9a,0x02,0xa6]			# CHECK-BE: mfsrr0 4 # encoding: [0x7c,0x9a,0x02,0xa6]
	# CHECK-LE: mfspr 4, 26 # encoding: [0xa6,0x02,0x9a,0x7c]			# CHECK-LE: mfsrr0 4 # encoding: [0xa6,0x02,0x9a,0x7c]
	mfsrr0 %r4			mfsrr0 %r4

	# CHECK-BE: mtspr 26, 4 # encoding: [0x7c,0x9a,0x03,0xa6]			# CHECK-BE: mtsrr0 4 # encoding: [0x7c,0x9a,0x03,0xa6]
	# CHECK-LE: mtspr 26, 4 # encoding: [0xa6,0x03,0x9a,0x7c]			# CHECK-LE: mtsrr0 4 # encoding: [0xa6,0x03,0x9a,0x7c]
	mtsrr0 %r4			mtsrr0 %r4

	# CHECK-BE: mfspr 4, 27 # encoding: [0x7c,0x9b,0x02,0xa6]			# CHECK-BE: mfsrr1 4 # encoding: [0x7c,0x9b,0x02,0xa6]
	# CHECK-LE: mfspr 4, 27 # encoding: [0xa6,0x02,0x9b,0x7c]			# CHECK-LE: mfsrr1 4 # encoding: [0xa6,0x02,0x9b,0x7c]
	mfsrr1 %r4			mfsrr1 %r4

	# CHECK-BE: mtspr 27, 4 # encoding: [0x7c,0x9b,0x03,0xa6]			# CHECK-BE: mtsrr1 4 # encoding: [0x7c,0x9b,0x03,0xa6]
	# CHECK-LE: mtspr 27, 4 # encoding: [0xa6,0x03,0x9b,0x7c]			# CHECK-LE: mtsrr1 4 # encoding: [0xa6,0x03,0x9b,0x7c]
	mtsrr1 %r4			mtsrr1 %r4

	# CHECK-BE: slbie 4 # encoding: [0x7c,0x00,0x23,0x64]			# CHECK-BE: slbie 4 # encoding: [0x7c,0x00,0x23,0x64]
	# CHECK-LE: slbie 4 # encoding: [0x64,0x23,0x00,0x7c]			# CHECK-LE: slbie 4 # encoding: [0x64,0x23,0x00,0x7c]
	slbie %r4			slbie %r4

	# CHECK-BE: slbmte 4, 5 # encoding: [0x7c,0x80,0x2b,0x24]			# CHECK-BE: slbmte 4, 5 # encoding: [0x7c,0x80,0x2b,0x24]
	# CHECK-LE: slbmte 4, 5 # encoding: [0x24,0x2b,0x80,0x7c]			# CHECK-LE: slbmte 4, 5 # encoding: [0x24,0x2b,0x80,0x7c]
	▲ Show 20 Lines • Show All 78 Lines • Show Last 20 Lines

llvm/test/MC/PowerPC/ppc64-encoding-ext.s

	Show First 20 Lines • Show All 3,437 Lines • ▼ Show 20 Lines
	# CHECK-LE: mfdsisr 2 # encoding: [0xa6,0x02,0x52,0x7c]			# CHECK-LE: mfdsisr 2 # encoding: [0xa6,0x02,0x52,0x7c]
	mfdsisr 2			mfdsisr 2
	# CHECK-BE: mtdar 2 # encoding: [0x7c,0x53,0x03,0xa6]			# CHECK-BE: mtdar 2 # encoding: [0x7c,0x53,0x03,0xa6]
	# CHECK-LE: mtdar 2 # encoding: [0xa6,0x03,0x53,0x7c]			# CHECK-LE: mtdar 2 # encoding: [0xa6,0x03,0x53,0x7c]
	mtdar 2			mtdar 2
	# CHECK-BE: mfdar 2 # encoding: [0x7c,0x53,0x02,0xa6]			# CHECK-BE: mfdar 2 # encoding: [0x7c,0x53,0x02,0xa6]
	# CHECK-LE: mfdar 2 # encoding: [0xa6,0x02,0x53,0x7c]			# CHECK-LE: mfdar 2 # encoding: [0xa6,0x02,0x53,0x7c]
	mfdar 2			mfdar 2
	# CHECK-BE: mtspr 22, 2 # encoding: [0x7c,0x56,0x03,0xa6]			# CHECK-BE: mtdec 2 # encoding: [0x7c,0x56,0x03,0xa6]
	# CHECK-LE: mtspr 22, 2 # encoding: [0xa6,0x03,0x56,0x7c]			# CHECK-LE: mtdec 2 # encoding: [0xa6,0x03,0x56,0x7c]
	mtdec 2			mtdec 2
	# CHECK-BE: mfspr 2, 22 # encoding: [0x7c,0x56,0x02,0xa6]			# CHECK-BE: mfdec 2 # encoding: [0x7c,0x56,0x02,0xa6]
	# CHECK-LE: mfspr 2, 22 # encoding: [0xa6,0x02,0x56,0x7c]			# CHECK-LE: mfdec 2 # encoding: [0xa6,0x02,0x56,0x7c]
	mfdec 2			mfdec 2
	# CHECK-BE: mtspr 25, 2 # encoding: [0x7c,0x59,0x03,0xa6]			# CHECK-BE: mtsdr1 2 # encoding: [0x7c,0x59,0x03,0xa6]
	# CHECK-LE: mtspr 25, 2 # encoding: [0xa6,0x03,0x59,0x7c]			# CHECK-LE: mtsdr1 2 # encoding: [0xa6,0x03,0x59,0x7c]
	mtsdr1 2			mtsdr1 2
	# CHECK-BE: mfspr 2, 25 # encoding: [0x7c,0x59,0x02,0xa6]			# CHECK-BE: mfsdr1 2 # encoding: [0x7c,0x59,0x02,0xa6]
	# CHECK-LE: mfspr 2, 25 # encoding: [0xa6,0x02,0x59,0x7c]			# CHECK-LE: mfsdr1 2 # encoding: [0xa6,0x02,0x59,0x7c]
	mfsdr1 2			mfsdr1 2
	# CHECK-BE: mtspr 26, 2 # encoding: [0x7c,0x5a,0x03,0xa6]			# CHECK-BE: mtsrr0 2 # encoding: [0x7c,0x5a,0x03,0xa6]
	# CHECK-LE: mtspr 26, 2 # encoding: [0xa6,0x03,0x5a,0x7c]			# CHECK-LE: mtsrr0 2 # encoding: [0xa6,0x03,0x5a,0x7c]
	mtsrr0 2			mtsrr0 2
	# CHECK-BE: mfspr 2, 26 # encoding: [0x7c,0x5a,0x02,0xa6]			# CHECK-BE: mfsrr0 2 # encoding: [0x7c,0x5a,0x02,0xa6]
	# CHECK-LE: mfspr 2, 26 # encoding: [0xa6,0x02,0x5a,0x7c]			# CHECK-LE: mfsrr0 2 # encoding: [0xa6,0x02,0x5a,0x7c]
	mfsrr0 2			mfsrr0 2
	# CHECK-BE: mtspr 27, 2 # encoding: [0x7c,0x5b,0x03,0xa6]			# CHECK-BE: mtsrr1 2 # encoding: [0x7c,0x5b,0x03,0xa6]
	# CHECK-LE: mtspr 27, 2 # encoding: [0xa6,0x03,0x5b,0x7c]			# CHECK-LE: mtsrr1 2 # encoding: [0xa6,0x03,0x5b,0x7c]
	mtsrr1 2			mtsrr1 2
	# CHECK-BE: mfspr 2, 27 # encoding: [0x7c,0x5b,0x02,0xa6]			# CHECK-BE: mfsrr1 2 # encoding: [0x7c,0x5b,0x02,0xa6]
	# CHECK-LE: mfspr 2, 27 # encoding: [0xa6,0x02,0x5b,0x7c]			# CHECK-LE: mfsrr1 2 # encoding: [0xa6,0x02,0x5b,0x7c]
	mfsrr1 2			mfsrr1 2
	# CHECK-BE: mtcfar 2 # encoding: [0x7c,0x5c,0x03,0xa6]			# CHECK-BE: mtcfar 2 # encoding: [0x7c,0x5c,0x03,0xa6]
	# CHECK-LE: mtcfar 2 # encoding: [0xa6,0x03,0x5c,0x7c]			# CHECK-LE: mtcfar 2 # encoding: [0xa6,0x03,0x5c,0x7c]
	mtcfar 2			mtcfar 2
	# CHECK-BE: mfcfar 2 # encoding: [0x7c,0x5c,0x02,0xa6]			# CHECK-BE: mfcfar 2 # encoding: [0x7c,0x5c,0x02,0xa6]
	# CHECK-LE: mfcfar 2 # encoding: [0xa6,0x02,0x5c,0x7c]			# CHECK-LE: mfcfar 2 # encoding: [0xa6,0x02,0x5c,0x7c]
	mfcfar 2			mfcfar 2
	# CHECK-BE: mtamr 2 # encoding: [0x7c,0x5d,0x03,0xa6]			# CHECK-BE: mtamr 2 # encoding: [0x7c,0x5d,0x03,0xa6]
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	# CHECK-BE: rfid # encoding: [0x4c,0x00,0x00,0x24]			# CHECK-BE: rfid # encoding: [0x4c,0x00,0x00,0x24]
	# CHECK-LE: rfid # encoding: [0x24,0x00,0x00,0x4c]			# CHECK-LE: rfid # encoding: [0x24,0x00,0x00,0x4c]
	rfid			rfid

	# CHECK-BE: mfasr 2 # encoding: [0x7c,0x58,0x42,0xa6]			# CHECK-BE: mfasr 2 # encoding: [0x7c,0x58,0x42,0xa6]
	# CHECK-LE: mfasr 2 # encoding: [0xa6,0x42,0x58,0x7c]			# CHECK-LE: mfasr 2 # encoding: [0xa6,0x42,0x58,0x7c]
	mfasr 2			mfasr 2
	# CHECK-BE: mtspr 280, 2 # encoding: [0x7c,0x58,0x43,0xa6]			# CHECK-BE: mtasr 2 # encoding: [0x7c,0x58,0x43,0xa6]
	# CHECK-LE: mtspr 280, 2 # encoding: [0xa6,0x43,0x58,0x7c]			# CHECK-LE: mtasr 2 # encoding: [0xa6,0x43,0x58,0x7c]
	mtasr 2			mtasr 2

	# Load and Store Caching Inhibited Instructions			# Load and Store Caching Inhibited Instructions
	# CHECK-BE: lbzcix 21, 5, 7 # encoding: [0x7e,0xa5,0x3e,0xaa]			# CHECK-BE: lbzcix 21, 5, 7 # encoding: [0x7e,0xa5,0x3e,0xaa]
	# CHECK-LE: lbzcix 21, 5, 7 # encoding: [0xaa,0x3e,0xa5,0x7e]			# CHECK-LE: lbzcix 21, 5, 7 # encoding: [0xaa,0x3e,0xa5,0x7e]
	lbzcix 21, 5, 7			lbzcix 21, 5, 7
	# CHECK-BE: lhzcix 21, 5, 7 # encoding: [0x7e,0xa5,0x3e,0x6a]			# CHECK-BE: lhzcix 21, 5, 7 # encoding: [0x7e,0xa5,0x3e,0x6a]
	# CHECK-LE: lhzcix 21, 5, 7 # encoding: [0x6a,0x3e,0xa5,0x7e]			# CHECK-LE: lhzcix 21, 5, 7 # encoding: [0x6a,0x3e,0xa5,0x7e]
	Show All 39 Lines

This is an archive of the discontinued LLVM Phabricator instance.

[PowerPC] Remove the repeated definition for some InstAlias for mtspr/mfsprClosedPublic

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Diff 252782

llvm/lib/Target/PowerPC/PPCInstrInfo.td

llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt

llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s

llvm/test/MC/PowerPC/ppc64-encoding-ext.s

[PowerPC] Remove the repeated definition for some InstAlias for mtspr/mfspr
ClosedPublic