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ZhangKang (Zhang Kang)
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User Since
Nov 19 2018, 6:03 PM (60 w, 4 d)

Recent Activity

Wed, Jan 8

ZhangKang added a comment to rG907cefe72143: Always deduce the lengths of contained parameter packs when deducing a pack….

@rsmith , Can you reproduce the error my case give?

Wed, Jan 8, 10:04 PM

Tue, Jan 7

ZhangKang added a comment to rG907cefe72143: Always deduce the lengths of contained parameter packs when deducing a pack….

This patch has caused a regression on PowerPC(target powerpc64le-unknown-linux-gnu).
Below is the test case:
cat test.cpp

struct a1{};
struct a2{};
struct a3{};
struct a4{};
Tue, Jan 7, 8:21 AM

Mon, Jan 6

ZhangKang updated the diff for D71883: [PowerPC] Use PredictableSelectIsExpensive to enable select to branch in CGP.

Modified the patch to follow Nemanjai's comments.

Mon, Jan 6, 10:53 PM · Restricted Project
ZhangKang added inline comments to D71883: [PowerPC] Use PredictableSelectIsExpensive to enable select to branch in CGP.
Mon, Jan 6, 10:43 PM · Restricted Project

Sun, Jan 5

ZhangKang added a comment to D71983: [PowerPC] Set the SideEffects of branch & call instructions from 1 to 0.

Do you expect any effect at all from doing this? These are all scheduling barriers?

Sun, Jan 5, 6:25 PM · Restricted Project

Wed, Jan 1

ZhangKang added reviewers for D71883: [PowerPC] Use PredictableSelectIsExpensive to enable select to branch in CGP: Restricted Project, hfinkel.
Wed, Jan 1, 9:41 PM · Restricted Project

Mon, Dec 30

ZhangKang added a comment to D71983: [PowerPC] Set the SideEffects of branch & call instructions from 1 to 0.

Do you expect any effect at all from doing this? These are all scheduling barriers?

Mon, Dec 30, 11:30 PM · Restricted Project
ZhangKang added a comment to D71983: [PowerPC] Set the SideEffects of branch & call instructions from 1 to 0.

I have tested the spec performance for this patch, there is no degression.

Mon, Dec 30, 6:10 AM · Restricted Project

Sun, Dec 29

ZhangKang updated the summary of D71983: [PowerPC] Set the SideEffects of branch & call instructions from 1 to 0.
Sun, Dec 29, 6:57 PM · Restricted Project
ZhangKang created D71983: [PowerPC] Set the SideEffects of branch & call instructions from 1 to 0.
Sun, Dec 29, 6:56 PM · Restricted Project

Sat, Dec 28

ZhangKang committed rGd1b51c5de7a0: [PowerPC] Modify the hasSideEffects of some VSX instructions from 1 to 0 (authored by ZhangKang).
[PowerPC] Modify the hasSideEffects of some VSX instructions from 1 to 0
Sat, Dec 28, 1:11 AM
ZhangKang closed D71391: [PowerPC] Modify the hasSideEffects of some VSX instructions from 1 to 0.
Sat, Dec 28, 1:11 AM · Restricted Project

Wed, Dec 25

ZhangKang created D71883: [PowerPC] Use PredictableSelectIsExpensive to enable select to branch in CGP.
Wed, Dec 25, 6:23 PM · Restricted Project
ZhangKang committed rG6d88b7d6e712: [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0 (authored by ZhangKang).
[PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0
Wed, Dec 25, 6:14 PM
ZhangKang closed D71390: [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0.
Wed, Dec 25, 6:14 PM · Restricted Project

Tue, Dec 24

ZhangKang removed a reviewer for D71390: [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0: Restricted Project.
Tue, Dec 24, 6:28 PM · Restricted Project
ZhangKang added reviewers for D71390: [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0: Restricted Project, jsji.
Tue, Dec 24, 6:28 PM · Restricted Project
ZhangKang removed a reviewer for D71390: [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0: jsji.
Tue, Dec 24, 6:28 PM · Restricted Project

Mon, Dec 23

ZhangKang added a comment to D71390: [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0.

I have run the performance for this patch, there is no regression.

Mon, Dec 23, 7:29 PM · Restricted Project

Fri, Dec 20

ZhangKang added a comment to D71391: [PowerPC] Modify the hasSideEffects of some VSX instructions from 1 to 0.

I have done the performance test for this patch, there is no degression.

Fri, Dec 20, 1:06 AM · Restricted Project

Dec 18 2019

ZhangKang added inline comments to D71391: [PowerPC] Modify the hasSideEffects of some VSX instructions from 1 to 0.
Dec 18 2019, 4:49 AM · Restricted Project
ZhangKang updated the diff for D71391: [PowerPC] Modify the hasSideEffects of some VSX instructions from 1 to 0.

Set the hasSideEffect flag for on instructions instead for format.

Dec 18 2019, 4:43 AM · Restricted Project

Dec 17 2019

ZhangKang added a comment to D71390: [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0.

Something doesn't match up here. The description/title say that you are changing the flag for both MFLR/MTLR. But in the code I only see the change for MTLR. Why is that?
Also, the context is missing from this patch so it cannot be reviewed properly, please fix that.

Dec 17 2019, 5:38 PM · Restricted Project
ZhangKang updated the diff for D71390: [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0.

Add the context.

Dec 17 2019, 5:38 PM · Restricted Project

Dec 15 2019

ZhangKang added inline comments to D71390: [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0.
Dec 15 2019, 10:25 PM · Restricted Project
ZhangKang updated the diff for D71390: [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0.

Fix the empty line.

Dec 15 2019, 10:25 PM · Restricted Project

Dec 14 2019

ZhangKang added a comment to D71390: [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0.

Seems currently we haven't modeled mtlr correctly. In PPCFrameLowering

if (MustSaveLR)
  BuildMI(MBB, StackUpdateLoc, dl, MTLRInst).addReg(ScratchReg);

We might lack a implicit-def of $lr here. As a result, we might get wrong code if set hasSideEffect = 0 for mtlr. What do you think?

Dec 14 2019, 12:31 AM · Restricted Project

Dec 12 2019

ZhangKang added inline comments to D71391: [PowerPC] Modify the hasSideEffects of some VSX instructions from 1 to 0.
Dec 12 2019, 1:12 AM · Restricted Project
ZhangKang updated the diff for D71391: [PowerPC] Modify the hasSideEffects of some VSX instructions from 1 to 0.

Set the hasSideEffects in VX1_RT5_RA5_VB5 .

Dec 12 2019, 1:12 AM · Restricted Project
ZhangKang added a comment to D71391: [PowerPC] Modify the hasSideEffects of some VSX instructions from 1 to 0.
In D71391#1781086, @Jim wrote:

It looks like not only this 6 instructions have to set hasSideEffects to 0.

Dec 12 2019, 12:25 AM · Restricted Project

Dec 11 2019

ZhangKang updated the diff for D71391: [PowerPC] Modify the hasSideEffects of some VSX instructions from 1 to 0.

Modify the patch.

Dec 11 2019, 10:25 PM · Restricted Project
ZhangKang created D71391: [PowerPC] Modify the hasSideEffects of some VSX instructions from 1 to 0.
Dec 11 2019, 10:25 PM · Restricted Project
ZhangKang updated the summary of D71390: [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0.
Dec 11 2019, 10:25 PM · Restricted Project
ZhangKang added reviewers for D71390: [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0: Restricted Project, hfinkel.
Dec 11 2019, 9:59 PM · Restricted Project
ZhangKang created D71390: [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0.
Dec 11 2019, 9:59 PM · Restricted Project
ZhangKang committed rG1408e7e17525: [PowerPC] [CodeGen] Use MachineBranchProbabilityInfo in EarlyIfPredicator to… (authored by ZhangKang).
[PowerPC] [CodeGen] Use MachineBranchProbabilityInfo in EarlyIfPredicator to…
Dec 11 2019, 1:48 AM
ZhangKang closed D71273: [CodeGen] Use MachineBranchProbabilityInfo in EarlyIfPredicator to avoid the potential bug.
Dec 11 2019, 1:48 AM · Restricted Project

Dec 10 2019

ZhangKang updated subscribers of D71273: [CodeGen] Use MachineBranchProbabilityInfo in EarlyIfPredicator to avoid the potential bug.
Dec 10 2019, 6:00 PM · Restricted Project
ZhangKang created D71273: [CodeGen] Use MachineBranchProbabilityInfo in EarlyIfPredicator to avoid the potential bug.
Dec 10 2019, 7:37 AM · Restricted Project

Nov 3 2019

ZhangKang added a comment to D69437: [RAGreedy] Enable -consider-local-interval-cost for AArch64.

Hmm. That's interesting. I'm guessing the flags you use between base and peak are quite different? The only consistent results was exchange2_r, which was getting better! How noisy are these results? What kind of a confidence interval do you have?

It may be simpler to make this AArch64 only instead, same as the X86 backend previously had. We know that there it fixes the issue with repeatedly spilling registers, and the performance is otherwise not largely effected.

Nov 3 2019, 3:32 AM · Restricted Project

Nov 2 2019

ZhangKang committed rG4e9778e346f2: [CodeGen] [ExpandReduction] Fix the bug for ExpandReduction() when vector size… (authored by ZhangKang).
[CodeGen] [ExpandReduction] Fix the bug for ExpandReduction() when vector size…
Nov 2 2019, 9:06 PM
ZhangKang closed D68625: [CodeGen] [ExpandReduction] Fix the bug for ExpandReduction() when vector size isn't power of 2.
Nov 2 2019, 9:06 PM · Restricted Project

Oct 30 2019

ZhangKang added a comment to D69437: [RAGreedy] Enable -consider-local-interval-cost for AArch64.
Oct 30 2019, 7:17 PM · Restricted Project

Oct 29 2019

ZhangKang updated the diff for D66576: [Regalloc][WIP] Increase CSR cost in RegAllocGreedy to favour splitting/spill over CSR first use.

Use the script to update the test cases.

Oct 29 2019, 7:45 PM · Restricted Project
ZhangKang updated the diff for D66576: [Regalloc][WIP] Increase CSR cost in RegAllocGreedy to favour splitting/spill over CSR first use.

Update the test cases using the tool update_llc_test_checks.py.

Oct 29 2019, 12:58 AM · Restricted Project

Oct 28 2019

ZhangKang added a comment to D69437: [RAGreedy] Enable -consider-local-interval-cost for AArch64.

Can you add tests for other targets as well? eg: PowerPC, RISC-V?
And maybe pre-commit the testcases, so that it is easier to see what the diff .

@ZhangKang Can you help to do size and performance evaluation on SPEC2017 on PowerPC. Thanks.

Oct 28 2019, 5:24 AM · Restricted Project

Oct 23 2019

ZhangKang added inline comments to D66576: [Regalloc][WIP] Increase CSR cost in RegAllocGreedy to favour splitting/spill over CSR first use.
Oct 23 2019, 6:24 PM · Restricted Project

Oct 19 2019

ZhangKang added a comment to D66576: [Regalloc][WIP] Increase CSR cost in RegAllocGreedy to favour splitting/spill over CSR first use.

I can.. but next week.

Maybe @Carrot @evandro @fhahn could check it too.

Oct 19 2019, 12:38 AM · Restricted Project

Oct 17 2019

ZhangKang added a comment to D66576: [Regalloc][WIP] Increase CSR cost in RegAllocGreedy to favour splitting/spill over CSR first use.

Do you have numbers also for x86?

Oct 17 2019, 6:59 PM · Restricted Project

Oct 11 2019

ZhangKang added a comment to D66576: [Regalloc][WIP] Increase CSR cost in RegAllocGreedy to favour splitting/spill over CSR first use.

Do you have numbers also for x86?

Oct 11 2019, 9:01 AM · Restricted Project
ZhangKang commandeered D66576: [Regalloc][WIP] Increase CSR cost in RegAllocGreedy to favour splitting/spill over CSR first use.
Oct 11 2019, 2:44 AM · Restricted Project
ZhangKang added a comment to D66576: [Regalloc][WIP] Increase CSR cost in RegAllocGreedy to favour splitting/spill over CSR first use.

.AMDGPU also override the getCSRFirstUseCost() but your patch didn't catch that. And would you please post some improve number for powerpc of this patch ?

Not done; would be good to have some perf numbers here, for ppc and x86

Oct 11 2019, 2:34 AM · Restricted Project

Oct 10 2019

ZhangKang added a reviewer for D66576: [Regalloc][WIP] Increase CSR cost in RegAllocGreedy to favour splitting/spill over CSR first use: ZhangKang.
Oct 10 2019, 10:23 PM · Restricted Project

Oct 7 2019

ZhangKang updated the summary of D68625: [CodeGen] [ExpandReduction] Fix the bug for ExpandReduction() when vector size isn't power of 2.
Oct 7 2019, 7:10 PM · Restricted Project
ZhangKang created D68625: [CodeGen] [ExpandReduction] Fix the bug for ExpandReduction() when vector size isn't power of 2.
Oct 7 2019, 7:05 PM · Restricted Project

Sep 25 2019

Herald added a project to D32245: Add an IR expansion pass for the experimental reductions: Restricted Project.
Sep 25 2019, 12:46 AM · Restricted Project

Sep 6 2019

ZhangKang committed rGf879c6875563: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the… (authored by ZhangKang).
[CodeGen] Do the Simple Early Return in block-placement pass to optimize the…
Sep 6 2019, 1:16 AM
ZhangKang committed rL371177: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the….
[CodeGen] Do the Simple Early Return in block-placement pass to optimize the…
Sep 6 2019, 1:15 AM
ZhangKang closed D63972: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks.
Sep 6 2019, 1:14 AM · Restricted Project

Sep 3 2019

ZhangKang updated the diff for D63972: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks.

Fix the error for jump table.

Sep 3 2019, 11:31 PM · Restricted Project

Sep 2 2019

ZhangKang committed rL370692: Request commit access for zhangkang.
Request commit access for zhangkang
Sep 2 2019, 7:48 PM

Aug 21 2019

ZhangKang added a comment to D59403: [PowerPC] Add the support for __builtin_setrnd() in clang.

Looks like you did not commit the version (Diff 190782) that was accepted!

So introduced duplicate documents in commits (Diff 192788) .
Thanks @davezarzycki for noticing this and fix it in https://reviews.llvm.org/rL369496.

@ZhangKang Please pay more attention next time. Thanks.

Aug 21 2019, 7:38 AM · Restricted Project

Aug 17 2019

ZhangKang committed rGb3d258fc44b5: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the… (authored by ZhangKang).
[CodeGen] Do the Simple Early Return in block-placement pass to optimize the…
Aug 17 2019, 7:39 AM
ZhangKang committed rL369191: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the….
[CodeGen] Do the Simple Early Return in block-placement pass to optimize the…
Aug 17 2019, 7:36 AM

Aug 15 2019

ZhangKang committed rG2a903c0b679b: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the… (authored by ZhangKang).
[CodeGen] Do the Simple Early Return in block-placement pass to optimize the…
Aug 15 2019, 6:08 AM
ZhangKang committed rL368997: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the….
[CodeGen] Do the Simple Early Return in block-placement pass to optimize the…
Aug 15 2019, 6:04 AM

Aug 12 2019

ZhangKang committed rG2a9efbf2484d: [NFC][PowerPC] Add the test case shrink-wrap.mir and shrink-wrap.ll for PPC (authored by ZhangKang).
[NFC][PowerPC] Add the test case shrink-wrap.mir and shrink-wrap.ll for PPC
Aug 12 2019, 10:52 AM
ZhangKang committed rL368597: [NFC][PowerPC] Add the test case shrink-wrap.mir and shrink-wrap.ll for PPC.
[NFC][PowerPC] Add the test case shrink-wrap.mir and shrink-wrap.ll for PPC
Aug 12 2019, 10:52 AM
ZhangKang committed rG489efc68a572: Revert r368565: [CodeGen] Do the Simple Early Return in block-placement pass to… (authored by ZhangKang).
Revert r368565: [CodeGen] Do the Simple Early Return in block-placement pass to…
Aug 12 2019, 7:01 AM
ZhangKang committed rL368574: Revert r368565: [CodeGen] Do the Simple Early Return in block-placement pass to….
Revert r368565: [CodeGen] Do the Simple Early Return in block-placement pass to…
Aug 12 2019, 7:00 AM
ZhangKang committed rG342fb0db6d98: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the… (authored by ZhangKang).
[CodeGen] Do the Simple Early Return in block-placement pass to optimize the…
Aug 12 2019, 6:16 AM
ZhangKang committed rL368565: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the….
[CodeGen] Do the Simple Early Return in block-placement pass to optimize the…
Aug 12 2019, 6:14 AM

Aug 11 2019

ZhangKang committed rGb1a62d168f8c: [NFC][CodeGen] Use while loop instead for loop in MachineBlockPlacement… (authored by ZhangKang).
[NFC][CodeGen] Use while loop instead for loop in MachineBlockPlacement…
Aug 11 2019, 6:02 AM
ZhangKang committed rL368532: [NFC][CodeGen] Use while loop instead for loop in MachineBlockPlacement….
[NFC][CodeGen] Use while loop instead for loop in MachineBlockPlacement…
Aug 11 2019, 5:58 AM

Aug 10 2019

ZhangKang committed rG555f7495df1c: [NFC][CodeGen] Modify the PI++ to ++PI in MachineBlockPlacement… (authored by ZhangKang).
[NFC][CodeGen] Modify the PI++ to ++PI in MachineBlockPlacement…
Aug 10 2019, 9:23 AM
ZhangKang committed rL368514: [NFC][CodeGen] Modify the PI++ to ++PI in MachineBlockPlacement….
[NFC][CodeGen] Modify the PI++ to ++PI in MachineBlockPlacement…
Aug 10 2019, 9:22 AM
ZhangKang committed rG36cd84bdd9a7: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the… (authored by ZhangKang).
[CodeGen] Do the Simple Early Return in block-placement pass to optimize the…
Aug 10 2019, 3:02 AM
ZhangKang committed rL368509: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the….
[CodeGen] Do the Simple Early Return in block-placement pass to optimize the…
Aug 10 2019, 3:02 AM
ZhangKang closed D63972: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks.
Aug 10 2019, 3:02 AM · Restricted Project
ZhangKang updated the diff for D63972: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks.

The patch [MBP] Disable aggressive loop rotate in plain mode has modified the test case, so I update the test case to sync the test case.

Aug 10 2019, 2:33 AM · Restricted Project

Aug 5 2019

ZhangKang added a comment to D63972: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks.

@efriedma , I have updated the patch, do you have any comments?

Aug 5 2019, 6:32 PM · Restricted Project

Aug 3 2019

ZhangKang updated the diff for D63972: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks.

Add the comment about post-dominator tree.

Aug 3 2019, 8:24 AM · Restricted Project
ZhangKang added a comment to D63972: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks.

Can you remove the dead MachineDominatorTree *MDT; declaration?

the function MachineBlockPlacement::runOnMachineFunction will do some clean work and will never use the MachinePostDominatorTree info, and this pass don't preserve the MachinePostDominatorTree

Please add this explanation as an explicit comment in the code.

Aug 3 2019, 7:57 AM · Restricted Project

Aug 2 2019

ZhangKang updated the diff for D63972: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks.

Update the MachineLoopInfo.

Aug 2 2019, 1:16 AM · Restricted Project
ZhangKang added a comment to D63972: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks.

Okay, delaying some of the work to sense, since you can't really modify FunctionChain while you're iterating over it.

Any response to my other comment?

Looking over this patch again, some of the other work involved in updating various data structures isn't complete here; the MachineDominatorTree/MachinePostDominatorTree isn't updated, MachineLoopInfo isn't updated.

Aug 2 2019, 12:57 AM · Restricted Project

Aug 1 2019

ZhangKang committed rG038dd43782b0: [NFC][CodeGen] Modify the type element of TailCalls to simplify the… (authored by ZhangKang).
[NFC][CodeGen] Modify the type element of TailCalls to simplify the…
Aug 1 2019, 8:11 PM
ZhangKang committed rL367644: [NFC][CodeGen] Modify the type element of TailCalls to simplify the….
[NFC][CodeGen] Modify the type element of TailCalls to simplify the…
Aug 1 2019, 8:11 PM
ZhangKang closed D64905: [NFC][CodeGen] Modify the type element of TailCalls to simplify the dupRetToEnableTailCallOpts().
Aug 1 2019, 8:11 PM · Restricted Project
ZhangKang added inline comments to D64905: [NFC][CodeGen] Modify the type element of TailCalls to simplify the dupRetToEnableTailCallOpts().
Aug 1 2019, 8:06 PM · Restricted Project
ZhangKang updated the diff for D64905: [NFC][CodeGen] Modify the type element of TailCalls to simplify the dupRetToEnableTailCallOpts().

Use the for range loop.

Aug 1 2019, 8:06 PM · Restricted Project

Jul 31 2019

ZhangKang updated the diff for D63972: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks.

Move the clean EmptyBB work out of the for loop.

Jul 31 2019, 12:19 AM · Restricted Project
ZhangKang added a comment to D63972: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks.

Here, if I use F->erase(TBB), the memory leak error is still existed.

What exactly is leaking? (If you're calling erase(), it isn't the MBB itself.)

Of course, that isn't a substitute for calling FunctionChain.remove etc.

Looking over this patch again, some of the other work involved in updating various data structures isn't complete here; the MachineDominatorTree/MachinePostDominatorTree isn't updated, MachineLoopInfo isn't updated.

Jul 31 2019, 12:06 AM · Restricted Project

Jul 29 2019

ZhangKang added a comment to D63972: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks.

You probably want F->erase(TBB), which both removes TBB from the list of blocks in the function, and deallocates TBB. I guess the empty block with no predecessors doesn't really matter much, in the long run, but easier to understand if the transform cleans up after itself properly.

Jul 29 2019, 9:53 PM · Restricted Project

Jul 27 2019

ZhangKang updated the diff for D63972: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks.

The old patch has the memory leak error.
The new patch fix the memory leak error by using:

FunctionChain.remove(TBB);
BlockToChain.erase(TBB);

instead

F->remove(TBB);
Jul 27 2019, 2:12 AM · Restricted Project
ZhangKang retitled D63972: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks from [PowerPC] Do the Simple Early Return in block-placement pass to optimize the blocks to [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks.
Jul 27 2019, 1:51 AM · Restricted Project

Jul 25 2019

ZhangKang committed rG4e794a8bae00: Some case eror for: detected memory leaks (authored by ZhangKang).
Some case eror for: detected memory leaks
Jul 25 2019, 8:27 PM
ZhangKang committed rL367083: Some case eror for: detected memory leaks.
Some case eror for: detected memory leaks
Jul 25 2019, 8:25 PM
ZhangKang committed rG5c6101545583: [PowerPC] Do the Simple Early Return in block-placement pass to optimize the… (authored by ZhangKang).
[PowerPC] Do the Simple Early Return in block-placement pass to optimize the…
Jul 25 2019, 7:01 PM
ZhangKang committed rL367080: [PowerPC] Do the Simple Early Return in block-placement pass to optimize the….
[PowerPC] Do the Simple Early Return in block-placement pass to optimize the…
Jul 25 2019, 7:01 PM
ZhangKang closed D63972: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks.
Jul 25 2019, 7:01 PM · Restricted Project