This patch renames some of the instruction formats within PPCInstrPrefix.td to adopt a more uniform naming convention.
Details
- Reviewers
power-llvm-team lei nemanjai stefanp - Group Reviewers
Restricted Project - Commits
- rG1ba3d2639d1c: [PowerPC][NFC] Rename instruction formats in PPCInstrPrefix.td
Diff Detail
- Repository
- rG LLVM Github Monorepo
Event Timeline
llvm/lib/Target/PowerPC/PPCInstrPrefix.td | ||
---|---|---|
46–47 | Note that I've changed this format to have SI34_FRS5. I was originally going to change just D34 to SI34 but then the instruction format name would be MLS_DForm_R_SI34_RTA5. This would not be possible, as there already exists an instruction format with this name (below the current instruction format). |
Just 1 minor name change. Otherwise LGTM.
llvm/lib/Target/PowerPC/PPCInstrPrefix.td | ||
---|---|---|
46–47 | Based on the other names, I think this should be MLS_DForm_R_SI34_FRSA5 since D_RA is 34 bits immediate + 5 bit register field RA. |
Talked this over with the team and we have decided on a way to rename that class. See the comment.
llvm/lib/Target/PowerPC/PPCInstrPrefix.td | ||
---|---|---|
46–47 | Hi Amy, The two names are the same because the formats are effectively the same. This is just a special case where the immediate and the register have been combined to form a memory address. If we add the MEM at the end we can indicate that this is a memory op and make that the difference from the other class. |
Note that I've changed this format to have SI34_FRS5. I was originally going to change just D34 to SI34 but then the instruction format name would be MLS_DForm_R_SI34_RTA5. This would not be possible, as there already exists an instruction format with this name (below the current instruction format).