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[PowerPC] Adding a match pattern to recognize the and mask with RLWINM8
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Authored by steven.zhang on Dec 17 2019, 12:15 AM.

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Reviewers
hfinkel
nemanjai
jsji
shchenz
Group Reviewers
Restricted Project
Summary

This is the motivate case:

define i32 @foo1(i32 %x) {
entry:
  %and = and i32 %x, -2
  ret i32 %and
}

PowerPC has several mechanism(tryBitPermutation() and custom select for AND/OR etc) to generate the bit operation better with the combination of AND/OR/XOR etc. This case isn't handled by these mechanism. So, I added a match pattern in the td to do the final selection, though, technical speaking, we could extend those mechanism to handle this case also.

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Event Timeline

steven.zhang created this revision.Dec 17 2019, 12:15 AM
Herald added a project: Restricted Project. · View Herald TranscriptDec 17 2019, 12:15 AM
This revision is now accepted and ready to land.Dec 17 2019, 11:07 AM
shchenz accepted this revision.Dec 17 2019, 5:28 PM

LGTM too.

Could you please check if there is similar opportunity for and. -> rlwinm.? Thanks.

Oops, I suddenly realize that, the rlwinm can only rotate the high 32bit. We need to check if the mask is UInt32 or not.

rlwinm RA,RS,SH,MB,ME
n <- SH
r <- ROTL32((RS)32:63, n)     #<--- RS 32:63 ...
m <- MASK(MB+32, ME+32)
RA <- r & m

Update the patch as one critical bug was found.

steven.zhang requested review of this revision.Dec 18 2019, 1:48 AM
steven.zhang planned changes to this revision.Dec 18 2019, 2:05 AM

Right, current patch should still be with bug.

llvm/lib/Target/PowerPC/PPCInstrInfo.td
385

we can only return true when mb is not bigger than me. and mask can be 0XF000000F, it becomes to 0XFFFFFFFFF000000F in rlwinm,then we get a 64bit value. This is wrong.

steven.zhang marked an inline comment as done.Dec 18 2019, 6:27 PM
steven.zhang added inline comments.
llvm/lib/Target/PowerPC/PPCInstrInfo.td
385

Good point. And yes, this is the problem.

lkail added a subscriber: lkail.Dec 18 2019, 9:24 PM
This comment was removed by lkail.
lkail added inline comments.Dec 18 2019, 9:31 PM
llvm/lib/Target/PowerPC/PPCInstrInfo.td
385

Do we have to check Mask & 0xffffffff00000000 == 0?

lkail added inline comments.Dec 18 2019, 10:29 PM
llvm/lib/Target/PowerPC/PPCInstr64Bit.td
1361

Does (and i32:$in, maskimm32:$imm) also work?

steven.zhang marked an inline comment as done.Dec 18 2019, 11:45 PM
steven.zhang added inline comments.
llvm/lib/Target/PowerPC/PPCInstrInfo.td
385

No, it has been checked by isUInt<32>(Mask). However, I am planing to abandon this patch to post a completely patch that fix all the "and mask" issue llvm powerpc have.

steven.zhang abandoned this revision.Dec 19 2019, 12:49 AM