[X86] Add initialization of FPCW in llvm-exegesis

[pengfei]

Summary

This is a following up to D70874. It adds the initialization of FPCW in llvm-exegesis.

[pengfei]

Thanks for the review!

llvm/test/tools/llvm-exegesis/X86/uops-ADD_F32m.s

+# RUN: llvm-exegesis -mode=uops -opcode-name=ADD_F32m -repetition-mode=duplicate | FileCheck %s
+# RUN: llvm-exegesis -mode=uops -opcode-name=ADD_F32m -repetition-mode=loop | FileCheck %s
+
+CHECK:      mode:            uops
+CHECK-NEXT: key:
+CHECK-NEXT:   instructions:
+CHECK-NEXT:     ADD_F32m
+CHECK:      register_initial_values:
+CHECK:      FPCW

llvm/tools/llvm-exegesis/lib/X86/Target.cpp

std::vector<MCInst> loadAndFinalize(unsigned Reg, unsigned RegBitWidth,
                                       unsigned Opcode);
 
   std::vector<MCInst> loadX87STAndFinalize(unsigned Reg);
 
   std::vector<MCInst> loadX87FPAndFinalize(unsigned Reg);
 
   std::vector<MCInst> popFlagAndFinalize();
 
-  std::vector<MCInst> loadMXCSRAndFinalize(bool HasAVX);
+  std::vector<MCInst> loadImplicitRegAndFinalize(unsigned Opcode,
+                                                 unsigned Value);
 
 private:
   ConstantInliner &add(const MCInst &Inst) {
     Instructions.push_back(Inst);
     return *this;
   }
 
   void initStack(unsigned Bytes);

 }
 
 std::vector<MCInst> ConstantInliner::popFlagAndFinalize() {
   initStack(8);
   add(MCInstBuilder(X86::POPF64));
   return std::move(Instructions);
 }
 
-std::vector<MCInst> ConstantInliner::loadMXCSRAndFinalize(bool HasAVX) {
+std::vector<MCInst>
+ConstantInliner::loadImplicitRegAndFinalize(unsigned Opcode, unsigned Value) {
   add(allocateStackSpace(4));
-  add(fillStackSpace(X86::MOV32mi, 0, 0x1f80)); // Mask all FP exceptions
-  add(MCInstBuilder(HasAVX ? X86::VLDMXCSR : X86::LDMXCSR)
+  add(fillStackSpace(X86::MOV32mi, 0, Value)); // Mask all FP exceptions
+  add(MCInstBuilder(Opcode)
           // Address = ESP
           .addReg(X86::RSP) // BaseReg
           .addImm(1)        // ScaleAmt
           .addReg(0)        // IndexReg
           .addImm(0)        // Disp
           .addReg(0));      // Segment
   return std::move(Instructions);
 }
std::vector<MCInst> ExegesisX86Target::setRegTo(const MCSubtargetInfo &STI,
   }
   if (X86::RFP32RegClass.contains(Reg) || X86::RFP64RegClass.contains(Reg) ||
       X86::RFP80RegClass.contains(Reg)) {
     return CI.loadX87FPAndFinalize(Reg);
   }
   if (Reg == X86::EFLAGS)
     return CI.popFlagAndFinalize();
   if (Reg == X86::MXCSR)
-    return CI.loadMXCSRAndFinalize(STI.getFeatureBits()[X86::FeatureAVX]);
+    return CI.loadImplicitRegAndFinalize(
+              STI.getFeatureBits()[X86::FeatureAVX] ? X86::VLDMXCSR
+                                                    : X86::LDMXCSR, 0x1f80);
+  if (Reg == X86::FPCW)
+    return CI.loadImplicitRegAndFinalize(X86::FLDCW16m, 0x37f);
   return {}; // Not yet implemented.
 }
 
 static ExegesisTarget *getTheExegesisX86Target() {
   static ExegesisX86Target Target;
   return &Target;
 }
 
 void InitializeX86ExegesisTarget() {
   ExegesisTarget::registerTarget(getTheExegesisX86Target());
 }
 
 } // namespace exegesis
 } // namespace llvm