[MIBundles] Move analyzePhysReg out of MIBundleOperands iterator (NFC).

[fhahn]

Summary

analyzePhysReg does not really fit into the iterator and moving it
makes it easier to change the base iterator.

[fhahn]

Clang format.

[fhahn]

This is similar to D70558.

[fhahn]

ping

[arsenm]

LGTM with nits

llvm/include/llvm/CodeGen/MachineInstrBundle.h

261

s/Analyze/analyze.

Also should use Register instead of unsigned

llvm/include/llvm/CodeGen/MachineInstrBundle.h

public:
 
   /// getOperandNo - Returns the number of the current operand relative to its
   /// instruction.
   ///
   unsigned getOperandNo() const {
     return OpI - InstrI->operands_begin();
   }
 
-  /// Information about how a physical register Reg is used by a set of
-  /// operands.
-  struct PhysRegInfo {
-    /// There is a regmask operand indicating Reg is clobbered.
-    /// \see MachineOperand::CreateRegMask().
-    bool Clobbered;
-
-    /// Reg or one of its aliases is defined. The definition may only cover
-    /// parts of the register.
-    bool Defined;
-    /// Reg or a super-register is defined. The definition covers the full
-    /// register.
-    bool FullyDefined;
-
-    /// Reg or one of its aliases is read. The register may only be read
-    /// partially.
-    bool Read;
-    /// Reg or a super-register is read. The full register is read.
-    bool FullyRead;
-
-    /// Either:
-    /// - Reg is FullyDefined and all defs of reg or an overlapping
-    ///   register are dead, or
-    /// - Reg is completely dead because "defined" by a clobber.
-    bool DeadDef;
-
-    /// Reg is Defined and all defs of reg or an overlapping register are
-    /// dead.
-    bool PartialDeadDef;
-
-    /// There is a use operand of reg or a super-register with kill flag set.
-    bool Killed;
-  };
-
-  /// analyzePhysReg - Analyze how the current instruction or bundle uses a
-  /// physical register.  This function should not be called after operator++(),
-  /// it expects a fresh iterator.
-  ///
-  /// @param Reg The physical register to analyze.
-  /// @returns A filled-in PhysRegInfo struct.
-  PhysRegInfo analyzePhysReg(unsigned Reg, const TargetRegisterInfo *TRI);
 };
 
 /// MIOperands - Iterate over operands of a single instruction.
 ///
 class MIOperands : public MachineOperandIteratorBase {
 public:
   MIOperands(MachineInstr &MI) : MachineOperandIteratorBase(MI, false) {}
   MachineOperand &operator* () const { return deref(); }

 /// @param Reg The virtual register to analyze.
 /// @param Ops When set, this vector will receive an (MI, OpNum) entry for
 ///            each operand referring to Reg.
 /// @returns A filled-in RegInfo struct.
 VirtRegInfo AnalyzeVirtRegInBundle(
     MachineInstr &MI, unsigned Reg,
     SmallVectorImpl<std::pair<MachineInstr *, unsigned>> *Ops = nullptr);
 
+/// Information about how a physical register Reg is used by a set of
+/// operands.
+struct PhysRegInfo {
+  /// There is a regmask operand indicating Reg is clobbered.
+  /// \see MachineOperand::CreateRegMask().
+  bool Clobbered;
+
+  /// Reg or one of its aliases is defined. The definition may only cover
+  /// parts of the register.
+  bool Defined;
+  /// Reg or a super-register is defined. The definition covers the full
+  /// register.
+  bool FullyDefined;
+
+  /// Reg or one of its aliases is read. The register may only be read
+  /// partially.
+  bool Read;
+  /// Reg or a super-register is read. The full register is read.
+  bool FullyRead;
+
+  /// Either:
+  /// - Reg is FullyDefined and all defs of reg or an overlapping
+  ///   register are dead, or
+  /// - Reg is completely dead because "defined" by a clobber.
+  bool DeadDef;
+
+  /// Reg is Defined and all defs of reg or an overlapping register are
+  /// dead.
+  bool PartialDeadDef;
+
+  /// There is a use operand of reg or a super-register with kill flag set.
+  bool Killed;
+};
+
+/// AnalyzePhysRegInBundle - Analyze how the current instruction or bundle uses a
+/// physical register.  This function should not be called after operator++(),
+/// it expects a fresh iterator.
+///
+/// @param Reg The physical register to analyze.
+/// @returns A filled-in PhysRegInfo struct.
+PhysRegInfo AnalyzePhysRegInBundle(const MachineInstr &MI, unsigned Reg, const TargetRegisterInfo *TRI);
+
 } // End llvm namespace
 
 #endif

llvm/lib/CodeGen/InlineSpiller.cpp

if (!MO->isReg())
       continue;
     Register Reg = MO->getReg();
     if (!Reg || Register::isVirtualRegister(Reg) || MRI.isReserved(Reg)) {
       continue;
     }
     // Skip non-Defs, including undef uses and internal reads.
     if (MO->isUse())
       continue;
-    MIBundleOperands::PhysRegInfo RI =
-        MIBundleOperands(*FoldMI).analyzePhysReg(Reg, &TRI);
+    PhysRegInfo RI =
+        AnalyzePhysRegInBundle(*FoldMI, Reg, &TRI);
     if (RI.FullyDefined)
       continue;
     // FoldMI does not define this physreg. Remove the LI segment.
     assert(MO->isDead() && "Cannot fold physreg def");
     SlotIndex Idx = LIS.getInstructionIndex(*MI).getRegSlot();
     LIS.removePhysRegDefAt(Reg, Idx);
   }
 

llvm/lib/CodeGen/MachineBasicBlock.cpp

MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI,
   // Try searching forwards from Before, looking for reads or defs.
   const_iterator I(Before);
   for (; I != end() && N > 0; ++I) {
     if (I->isDebugInstr())
       continue;
 
     --N;
 
-    MachineOperandIteratorBase::PhysRegInfo Info =
-        ConstMIOperands(*I).analyzePhysReg(Reg, TRI);
+    PhysRegInfo Info =
+        AnalyzePhysRegInBundle(*I, Reg, TRI);
 
     // Register is live when we read it here.
     if (Info.Read)
       return LQR_Live;
     // Register is dead if we can fully overwrite or clobber it here.
     if (Info.FullyDefined || Info.Clobbered)
       return LQR_Dead;
   }
if (I != begin()) {
     do {
       --I;
 
       if (I->isDebugInstr())
         continue;
 
       --N;
 
-      MachineOperandIteratorBase::PhysRegInfo Info =
-          ConstMIOperands(*I).analyzePhysReg(Reg, TRI);
+      PhysRegInfo Info =
+          AnalyzePhysRegInBundle(*I, Reg, TRI);
 
       // Defs happen after uses so they take precedence if both are present.
 
       // Register is dead after a dead def of the full register.
       if (Info.DeadDef)
         return LQR_Dead;
       // Register is (at least partially) live after a def.
       if (Info.Defined) {

llvm/lib/CodeGen/MachineInstrBundle.cpp

if (MO.isDef())
       RI.Writes = true;
     else if (!RI.Tied &&
              MO.getParent()->isRegTiedToDefOperand(O.getOperandNo()))
       RI.Tied = true;
   }
   return RI;
 }
 
-//===----------------------------------------------------------------------===//
-// MachineOperand iterator
-//===----------------------------------------------------------------------===//
-
-MachineOperandIteratorBase::PhysRegInfo
-MachineOperandIteratorBase::analyzePhysReg(unsigned Reg,
+PhysRegInfo
+llvm::AnalyzePhysRegInBundle(const MachineInstr &MI, unsigned Reg,
                                            const TargetRegisterInfo *TRI) {
   bool AllDefsDead = true;
   PhysRegInfo PRI = {false, false, false, false, false, false, false, false};
 
   assert(Register::isPhysicalRegister(Reg) &&
          "analyzePhysReg not given a physical register!");
-  for (; isValid(); ++*this) {
-    MachineOperand &MO = deref();
+  for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
+    const MachineOperand &MO = *O;
 
     if (MO.isRegMask() && MO.clobbersPhysReg(Reg)) {
       PRI.Clobbered = true;
       continue;
     }
 
     if (!MO.isReg())
       continue;

llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp

for (MachineBasicBlock::iterator B = MBB->begin(); I != B;) {
     case AArch64::FCMPSrr:
     case AArch64::FCMPDrr:
     case AArch64::FCMPESrr:
     case AArch64::FCMPEDrr:
       return &*I;
     }
 
     // Check for flag reads and clobbers.
-    MIOperands::PhysRegInfo PRI =
-        MIOperands(*I).analyzePhysReg(AArch64::NZCV, TRI);
+    PhysRegInfo PRI =
+        AnalyzePhysRegInBundle(*I, AArch64::NZCV, TRI);
 
     if (PRI.Read) {
       // The ccmp doesn't produce exactly the same flags as the original
       // compare, so reject the transform if there are uses of the flags
       // besides the terminators.
       LLVM_DEBUG(dbgs() << "Can't create ccmp with multiple uses: " << *I);
       ++NumMultNZCVUses;
       return nullptr;