[NFC] [PowerPC] Add volatile flag to a swap optimization test

[qiucf]

Summary

This patch is predecessor of D70223. Since the patch is to optimize vector load-update-store pattern, some of the tests might be affected. The two test cases modified in this patch is to check PPC's swap removal, not related to stores. So it's better to add volatile flag to them, for eliminating unintended test break.

[lkail]

My concern is store and store volatile are so different in semantics that it might break original test intention.

[steven.zhang]

Agree with Kai. You need some evidence to show that, this won't break the test point.

[qiucf]

In D70373#1750891, @lkail wrote:

My concern is store and store volatile are so different in semantics that it might break original test intention.

In D70373#1750900, @steven.zhang wrote:

Agree with Kai. You need some evidence to show that, this won't break the test point.

The two tests are testing functionality of swap removal which runs on machine functions. volatile won't affect generated MIR here.

[jsji]

I agree with @lkail and @steven.zhang , I don't think we should update these testcases just to avoid updating them in another patch.

I believe keeping them as it is will catch more regression than adding volatile to them .

[qiucf]

Will abandon this revision and add them back to D70223 for easier discussion.

llvm/test/CodeGen/PowerPC/swaps-le-5.ll

 ; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu -O3 < %s | FileCheck %s
 
 ; These tests verify that VSX swap optimization works for various
 ; manipulations of <2 x double> vectors.
 
 @x = global <2 x double> <double 9.970000e+01, double -1.032220e+02>, align 16
 @z = global <2 x double> <double 2.332000e+01, double 3.111111e+01>, align 16
 
 define void @bar0(double %y) {
 entry:
   %0 = load <2 x double>, <2 x double>* @x, align 16
   %vecins = insertelement <2 x double> %0, double %y, i32 0
-  store <2 x double> %vecins, <2 x double>* @z, align 16
+  store volatile <2 x double> %vecins, <2 x double>* @z, align 16
   ret void
 }
 
 ; CHECK-LABEL: @bar0
 ; CHECK-DAG: lxvd2x [[REG1:[0-9]+]]
 ; CHECK-DAG: xxspltd [[REG2:[0-9]+]]
 ; CHECK: xxpermdi [[REG3:[0-9]+]], [[REG2]], [[REG1]], 1
 ; CHECK: stxvd2x [[REG3]]
 ; CHECK-NOT: xxswapd
 
 define void @bar1(double %y) {
 entry:
   %0 = load <2 x double>, <2 x double>* @x, align 16
   %vecins = insertelement <2 x double> %0, double %y, i32 1
-  store <2 x double> %vecins, <2 x double>* @z, align 16
+  store volatile <2 x double> %vecins, <2 x double>* @z, align 16
   ret void
 }
 
 ; CHECK-LABEL: @bar1
 ; CHECK-DAG: lxvd2x [[REG1:[0-9]+]]
 ; CHECK-DAG: xxspltd [[REG2:[0-9]+]]
 ; CHECK: xxmrghd [[REG3:[0-9]+]], [[REG1]], [[REG2]]
 ; CHECK: stxvd2x [[REG3]]
 ; CHECK-NOT: xxswapd
 
 define void @baz0() {
 entry:
   %0 = load <2 x double>, <2 x double>* @z, align 16
   %1 = load <2 x double>, <2 x double>* @x, align 16
   %vecins = shufflevector <2 x double> %0, <2 x double> %1, <2 x i32> <i32 0, i32 2>
-  store <2 x double> %vecins, <2 x double>* @z, align 16
+  store volatile <2 x double> %vecins, <2 x double>* @z, align 16
   ret void
 }
 
 ; CHECK-LABEL: @baz0
 ; CHECK: lxvd2x
 ; CHECK: lxvd2x
 ; CHECK: xxmrghd
 ; CHECK: stxvd2x
 ; CHECK-NOT: xxswapd
 
 define void @baz1() {
 entry:
   %0 = load <2 x double>, <2 x double>* @z, align 16
   %1 = load <2 x double>, <2 x double>* @x, align 16
   %vecins = shufflevector <2 x double> %0, <2 x double> %1, <2 x i32> <i32 3, i32 1>
-  store <2 x double> %vecins, <2 x double>* @z, align 16
+  store volatile <2 x double> %vecins, <2 x double>* @z, align 16
   ret void
 }
 
 ; CHECK-LABEL: @baz1
 ; CHECK: lxvd2x
 ; CHECK: lxvd2x
 ; CHECK: xxmrgld
 ; CHECK: stxvd2x
 ; CHECK-NOT: xxswapd
 

llvm/test/CodeGen/PowerPC/swaps-le-6.ll

 ; CHECK-P9:     xxpermdi vs1, f1, f1, 2
 ; CHECK-P9:     xxpermdi vs0, vs0, vs1, 1
 ; CHECK-P9:     stxvx vs0, 0, r3
 ; CHECK-P9:     blr
 entry:
   %0 = load <2 x double>, <2 x double>* @x, align 16
   %1 = load double, double* @y, align 8
   %vecins = insertelement <2 x double> %0, double %1, i32 0
-  store <2 x double> %vecins, <2 x double>* @z, align 16
+  store volatile <2 x double> %vecins, <2 x double>* @z, align 16
   ret void
 }
 
 define void @bar1() {
 ; CHECK-LABEL: bar1:
 ; CHECK:   # %bb.0: # %entry
 ; CHECK:     addis r3, r2, .LC0@toc@ha
 ; CHECK:     addis r4, r2, .LC1@toc@ha

 ; CHECK-P9:     xxpermdi vs1, f1, f1, 2
 ; CHECK-P9:     xxmrgld vs0, vs1, vs0
 ; CHECK-P9:     stxvx vs0, 0, r3
 ; CHECK-P9:     blr
 entry:
   %0 = load <2 x double>, <2 x double>* @x, align 16
   %1 = load double, double* @y, align 8
   %vecins = insertelement <2 x double> %0, double %1, i32 1
-  store <2 x double> %vecins, <2 x double>* @z, align 16
+  store volatile <2 x double> %vecins, <2 x double>* @z, align 16
   ret void
 }