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wschmidt (Bill Schmidt)
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Dec 4 2012, 1:14 PM (354 w, 5 d)

Recent Activity

Nov 11 2016

wschmidt added a comment to D26564: Use PIC relocation mode by default for PowerPC64 ELF.

@wschmidt and other IBM folks, w.r.t. this and D26566, can you please comment on what GCC does here? Does GCC use -fPIC by default for PPC64 (literally or in effect)?

Nov 11 2016, 3:20 PM

Jun 29 2016

wschmidt added a comment to D21802: Ensure all uses of permute instruction feed vector stores.

The patch LGTM. One question: Did you check for the reverse situation? Can we have a swap that is fed by more than one instruction, where one is not a load, or is that already handled in the code? I realize this may not come up in practice if we don't have a machine sinking pass.

This is already handled in the code. If the register defined by a swapping load is used in something other than a swapping load/swapping store, then the web is rejected. Unless there is another case outside of this that I'm not seeing....

Jun 29 2016, 10:48 AM
wschmidt accepted D21802: Ensure all uses of permute instruction feed vector stores.

The patch LGTM. One question: Did you check for the reverse situation? Can we have a swap that is fed by more than one instruction, where one is not a load, or is that already handled in the code? I realize this may not come up in practice if we don't have a machine sinking pass.

Jun 29 2016, 4:50 AM

May 2 2016

wschmidt added a comment to D19825: Power9 - Add exploitation of vector load and store that do not require swaps.

This looks fine to me. A couple of inline comments. I'll let someone else give final approval.

May 2 2016, 1:18 PM

Apr 15 2016

wschmidt accepted D19133: Fix typing on generated LXV2DX/STXV2DX instructions.

Thanks. This LGTM!

Apr 15 2016, 7:49 AM
wschmidt added inline comments to D19133: Fix typing on generated LXV2DX/STXV2DX instructions.
Apr 15 2016, 7:15 AM
wschmidt added a comment to D19133: Fix typing on generated LXV2DX/STXV2DX instructions.

Just one inline comment (actually a question for my understanding) and pending a test case, this LGTM. Perhaps @wschmidt would like to take a look as well.

Apr 15 2016, 6:44 AM

Mar 30 2016

wschmidt accepted D18605: [PowerPC] Remove incorrect use of COPY_TO_REGCLASS in fast isel.

This patch LGTM. I was responsible for the original code here. Whatever problem I thought I was solving here appears to no longer be an issue, so let's go forward with this.

Mar 30 2016, 9:02 AM

Feb 3 2016

wschmidt accepted D16847: Enable the %s modifier in inline asm template string.

Yes, that's the correct behavior, as can be seen at https://gcc.gnu.org/ml/gcc-patches/2016-01/msg01937.html. Note that GCC produces a warning if the wrong operand type is used, but I don't see that as a necessity for something that's deprecated anyway. This patch LGTM.

Feb 3 2016, 6:00 AM

Dec 14 2015

wschmidt added a comment to rL255057: [PPC64, TSAN] LLVM basic enablement of thread sanitizer for PPC64 (BE and LE).

r255507

Dec 14 2015, 8:29 AM
wschmidt committed rL255507: [TSAN, PPC64] Fix obvious typo of supported virtual memory sizes.
[TSAN, PPC64] Fix obvious typo of supported virtual memory sizes
Dec 14 2015, 8:29 AM
wschmidt added inline comments to rL255057: [PPC64, TSAN] LLVM basic enablement of thread sanitizer for PPC64 (BE and LE).
Dec 14 2015, 8:26 AM

Dec 9 2015

wschmidt committed rL255116: Avoid extended mnemonic 'mfvrsave' in assembly code.
Avoid extended mnemonic 'mfvrsave' in assembly code
Dec 9 2015, 7:21 AM

Dec 8 2015

wschmidt closed D12840: [cfe-dev] Enabling ThreadSanitizer on PPC64(BE/LE) plarforms.

Committed as r255067.

Dec 8 2015, 2:51 PM
wschmidt committed rL255067: [PPC64, TSAN] Enable thread sanitizer for PPC64.
[PPC64, TSAN] Enable thread sanitizer for PPC64
Dec 8 2015, 2:51 PM
wschmidt closed D13729: [TSAN, PowerPC] Setjmp/longjmp handling for PowerPC.

Committed as r255059. Thanks!

Dec 8 2015, 2:18 PM
wschmidt committed rL255059: [PPC64, TSAN] Provide setjmp interceptor support for PPC64.
[PPC64, TSAN] Provide setjmp interceptor support for PPC64
Dec 8 2015, 2:17 PM
wschmidt closed D12841: [LLVMdev] Compiler-RT - Enabling ThreadSanitizer on PPC64(BE/LE) platforms.

Committed as r255057.

Dec 8 2015, 1:58 PM
wschmidt committed rL255057: [PPC64, TSAN] LLVM basic enablement of thread sanitizer for PPC64 (BE and LE).
[PPC64, TSAN] LLVM basic enablement of thread sanitizer for PPC64 (BE and LE)
Dec 8 2015, 1:57 PM
wschmidt added a comment to D12841: [LLVMdev] Compiler-RT - Enabling ThreadSanitizer on PPC64(BE/LE) platforms.

Addressed Dmitry's comment, patch ready to land.

Bill, will you take care of the commit?

Thanks!
Simone

Dec 8 2015, 5:39 AM

Nov 12 2015

wschmidt updated the diff for D13729: [TSAN, PowerPC] Setjmp/longjmp handling for PowerPC.

This version adds the correct OPD implementation per Uli's suggestions. The only change beyond that is to make .L._setjmp and .L.__sigsetjmp unconditional symbols, so they can be used in the .size calculation for their respective functions.

Nov 12 2015, 11:47 AM

Nov 11 2015

wschmidt added a comment to D13729: [TSAN, PowerPC] Setjmp/longjmp handling for PowerPC.

Oh, of course! Thanks, Uli. I totally forgot about having to declare the OPD. And it would be better if I were using _CALL_ELF rather than LITTLE_ENDIAN for the ABI distinction. I'll update the patch and try to solve my build problems to test it.

Nov 11 2015, 10:12 AM
wschmidt added a comment to D13729: [TSAN, PowerPC] Setjmp/longjmp handling for PowerPC.

Actually, I managed to dig up a BE Power8 machine and run the tests, and although I have failures due to the setjmp handling, most of the tests pass for me. What sort of BE machine are you using? Is it a Power7?

Nov 11 2015, 7:46 AM
wschmidt added a comment to D13729: [TSAN, PowerPC] Setjmp/longjmp handling for PowerPC.

Actually, I managed to dig up a BE Power8 machine and run the tests, and although I have failures due to the setjmp handling, most of the tests pass for me. What sort of BE machine are you using? Is it a Power7?

Nov 11 2015, 7:06 AM

Nov 10 2015

wschmidt committed rL252654: Add PPCMIPeephole.cpp to CMakeLists.txt.
Add PPCMIPeephole.cpp to CMakeLists.txt
Nov 10 2015, 1:46 PM
wschmidt closed D14080: [PowerPC] Add an MI SSA peephole pass..

r252651, thanks!

Nov 10 2015, 1:41 PM
wschmidt committed rL252651: [PowerPC] Add an MI SSA peephole pass..
[PowerPC] Add an MI SSA peephole pass.
Nov 10 2015, 1:41 PM
wschmidt added a comment to D13729: [TSAN, PowerPC] Setjmp/longjmp handling for PowerPC.

Simone, thanks for confirming. I've discussed this with one of our ABI experts. For BE, we are going to have to do something pretty ugly, I'm afraid. We'll likely need a trampoline to a separate function so that the linker will create an OPD from which we can load the TOC. But we'll still need to keep the link register clean along that path, which could be a little tricky.

Nov 10 2015, 8:13 AM

Nov 9 2015

wschmidt added a comment to D13729: [TSAN, PowerPC] Setjmp/longjmp handling for PowerPC.

OK, thank you. I am wondering if this is a glibc "feature" when initializing a thread for Power. For LE, I noticed that it was not setting up the TOC for a call to setjmp from init_thread, which is technically within its rights only if setjmp cannot be overridden. Hence I added code to materialize the TOC from the .TOC. symbol. For BE, the TOC must be initialized by placing it in the OPD. If the OPD TOC slot contains garbage, which would be true if init_thread didn't set it up, then we have no way to materialize the TOC on BE systems. If this turns out to be the case, we would either need to disable TSAN for BE (not ideal), or try to figure out when setjmp is being called in this heinous way.

Nov 9 2015, 5:20 AM

Nov 8 2015

wschmidt added a comment to D14080: [PowerPC] Add an MI SSA peephole pass..

Ping

Nov 8 2015, 7:22 PM

Nov 6 2015

wschmidt added a comment to D13729: [TSAN, PowerPC] Setjmp/longjmp handling for PowerPC.
Nov 6 2015, 5:53 AM

Nov 5 2015

wschmidt added a comment to D13729: [TSAN, PowerPC] Setjmp/longjmp handling for PowerPC.

I forgot to mention that I now have separate ways of materializing the TOC pointer for BE and LE. For BE, the TOC can be materialized from an offset of 8 from the beginning of the OPD, where the OPD is equivalent to the function address. For LE, all supported binutils define the .TOC. symbol, so that method can be used instead.

Nov 5 2015, 6:53 AM
wschmidt updated the diff for D13729: [TSAN, PowerPC] Setjmp/longjmp handling for PowerPC.

All comments should be addressed here. I have dropped the test case that still needs a little investigation. Again, this patch requires Simone's patches as a prerequisite. I had to do a little massaging of his compiler-rt patch to bring it up to current trunk.

Nov 5 2015, 6:48 AM

Nov 3 2015

wschmidt accepted D14297: [PPC] Fix indirect access for weak symbols..

Thanks, Kyle. This LGTM. That's a much better interface to use (and one that didn't exist when this code was first written). Thanks for taking care of this!

Nov 3 2015, 2:04 PM
wschmidt added a comment to D13729: [TSAN, PowerPC] Setjmp/longjmp handling for PowerPC.

Bill, you did not upload a new version. Waiting.

Nov 3 2015, 6:36 AM

Nov 2 2015

wschmidt committed rL251848: [PPC64LE] Properly initialize instr-info in PPCVSXSwapRemoval pass.
[PPC64LE] Properly initialize instr-info in PPCVSXSwapRemoval pass
Nov 2 2015, 2:46 PM
wschmidt updated the diff for D14080: [PowerPC] Add an MI SSA peephole pass..

Updated to address Hal's comments. Thanks, Hal!

Nov 2 2015, 2:28 PM
wschmidt added inline comments to D13729: [TSAN, PowerPC] Setjmp/longjmp handling for PowerPC.
Nov 2 2015, 12:45 PM
wschmidt added a comment to D14080: [PowerPC] Add an MI SSA peephole pass..

Sorry it took me a while to get back to this. I'll make all suggested fixes except for the ToErase one, as noted.

Nov 2 2015, 11:43 AM

Oct 30 2015

wschmidt added auditors to rL250324: [PowerPC] Fix invalid lxvdsx optimization (PR25157): Restricted Project, llvm-commits, tstellarAMD, hfinkel.

Fixes a wrong-code problem.

Oct 30 2015, 9:56 AM · Restricted Project
wschmidt added auditors to rL247083: Fix the PPC CTR Loop pass to look for calls to the intrinsics that: Restricted Project, llvm-commits, tstellarAMD, hfinkel.

Fixes an issue where a read of the CTR register is missed because it's hidden in an intrinsic.

Oct 30 2015, 9:56 AM · Restricted Project
wschmidt added auditors to rL246937: [PowerPC] Don't commute trivial rlwimi instructions: Restricted Project, llvm-commits, tstellarAMD, hfinkel.

Fixes a wrong-code issue.

Oct 30 2015, 9:54 AM · Restricted Project
wschmidt added auditors to rL246900: [PowerPC] Fix and(or(x, c1), c2) -> rlwimi generation: Restricted Project, llvm-commits, hfinkel, tstellarAMD.

Fixes a wrong-code issue.

Oct 30 2015, 9:53 AM · Restricted Project
wschmidt added auditors to rL246675: [PowerPC] Don't always consider P8Altivec-only masks in LowerVECTOR_SHUFFLE: Restricted Project, llvm-commits, tstellarAMD, hfinkel.

Addresses a serious problem on pre-P8 hardware.

Oct 30 2015, 9:50 AM · Restricted Project
wschmidt added auditors to rL246400: [PowerPC] Fixup SELECT_CC (and SETCC) patterns with i1 comparison operands: Restricted Project, llvm-commits, tstellarAMD, hfinkel.

Fixes two not uncommon problems with condition bits.

Oct 30 2015, 9:20 AM · Restricted Project
wschmidt added auditors to rL246372: [PowerPC] Don't assume ADDISdtprelHA's source is r3: Restricted Project, llvm-commits, tstellarAMD, hfinkel.

Important bug fix for thread-local storage on Power.

Oct 30 2015, 9:18 AM · Restricted Project

Oct 27 2015

wschmidt added inline comments to D13729: [TSAN, PowerPC] Setjmp/longjmp handling for PowerPC.
Oct 27 2015, 9:29 AM

Oct 26 2015

wschmidt retitled D14080: [PowerPC] Add an MI SSA peephole pass. from to [PowerPC] Add an MI SSA peephole pass..
Oct 26 2015, 9:32 AM

Oct 22 2015

wschmidt committed rL251027: [PPC] Fix PR24686 by failing assembly for an invalid relocation.
[PPC] Fix PR24686 by failing assembly for an invalid relocation
Oct 22 2015, 8:55 AM
wschmidt added inline comments to D13955: [PPC64] Find valid scratch register for prologue/epilogue during shrink wrapping.
Oct 22 2015, 6:32 AM

Oct 21 2015

wschmidt added a comment to D13729: [TSAN, PowerPC] Setjmp/longjmp handling for PowerPC.

Ping...

Oct 21 2015, 6:22 AM

Oct 16 2015

wschmidt added a comment to D12596: Fix for bootstrap bug introduced in r244921.

So the crux of the problem is that the load being replaced has a user of its chain (in this case, a store that nullifies the unique_ptr in the source). Because we introduced the LXVDSX, the use of the chain in the store was not updated and it still used the chain from the load (which goes away). The store was then free to move up (before the LXVDSX) and we end up with a load and splat of a null. I do not see a way to chain the store to this target specific node.

So, you're going to have to ensure that the DAG nodes for LXVDSX have chains on them. This is an oversight in the way things are implemented today. See what's done for LXVD2X:

def PPClxvd2x  : SDNode<"PPCISD::LXVD2X", SDT_PPClxvd2x,
                        [SDNPHasChain, SDNPMayLoad]>;

So you'll need to add LXVDSX to the PPCISD enumeration in PPCISelLowering.h, add an entry like the above in PPCInstrVSX.td, and make sure we expand to that node type in the DAGtoDAG code. Then you'll have a chain that you can manipulate.

You don't need to add special ISD nodes to do instruction selection in DAGToDAG (only in ISelLowering). LXVDSX is already tagged as mayLoad, and so is already assumed to carry a chain operand. In DAGToDAG we directly generate machine-instruction SDAG nodes. You just need to make sure that chain users are appropriately updated before returning.

Oct 16 2015, 7:23 AM
wschmidt added a comment to D12596: Fix for bootstrap bug introduced in r244921.

I should clarify that this is a bug that's independent of your work, so I think it should be treated separately.

Oct 16 2015, 6:15 AM
wschmidt added a comment to D12596: Fix for bootstrap bug introduced in r244921.

So the crux of the problem is that the load being replaced has a user of its chain (in this case, a store that nullifies the unique_ptr in the source). Because we introduced the LXVDSX, the use of the chain in the store was not updated and it still used the chain from the load (which goes away). The store was then free to move up (before the LXVDSX) and we end up with a load and splat of a null. I do not see a way to chain the store to this target specific node.

Oct 16 2015, 6:07 AM

Oct 14 2015

wschmidt committed rL250324: [PowerPC] Fix invalid lxvdsx optimization (PR25157).
[PowerPC] Fix invalid lxvdsx optimization (PR25157)
Oct 14 2015, 1:47 PM · Restricted Project
wschmidt retitled D13729: [TSAN, PowerPC] Setjmp/longjmp handling for PowerPC from to [TSAN, PowerPC] Setjmp/longjmp handling for PowerPC.
Oct 14 2015, 9:30 AM

Sep 29 2015

wschmidt accepted D12032: Vector element extraction without stack operations on Power 8.

Go to it!

Sep 29 2015, 11:06 AM

Sep 28 2015

wschmidt accepted D13191: Addition of interfaces the BE to conform to Table A-2 of ELF V2 ABI V1.1.

Sorry, forgot to accept.

Sep 28 2015, 1:52 PM
wschmidt accepted D13190: Addition of interfaces the FE to conform to Table A-2 of ELF V2 ABI V1.1.

Sorry, forgot to accept.

Sep 28 2015, 1:52 PM
wschmidt added a comment to D13191: Addition of interfaces the BE to conform to Table A-2 of ELF V2 ABI V1.1.

LGTM! Thanks for folding in the VSX compares to the existing infrastructure, and renaming appropriately.

Sep 28 2015, 7:48 AM
wschmidt added a comment to D13190: Addition of interfaces the FE to conform to Table A-2 of ELF V2 ABI V1.1.

Other than the FIXME removal, this LGTM! Very good and careful work. Thanks for taking care of this!

Sep 28 2015, 7:47 AM

Sep 21 2015

wschmidt added a comment to D12032: Vector element extraction without stack operations on Power 8.

Otherwise, this LGTM. Thanks for addressing all my concerns!

Sep 21 2015, 1:14 PM

Sep 15 2015

wschmidt added inline comments to D12841: [LLVMdev] Compiler-RT - Enabling ThreadSanitizer on PPC64(BE/LE) platforms.
Sep 15 2015, 2:18 PM

Sep 14 2015

wschmidt added inline comments to D12841: [LLVMdev] Compiler-RT - Enabling ThreadSanitizer on PPC64(BE/LE) platforms.
Sep 14 2015, 6:56 PM

Sep 4 2015

wschmidt accepted D12596: Fix for bootstrap bug introduced in r244921.

LGTM! Thanks.

Sep 4 2015, 10:53 AM

Sep 3 2015

wschmidt added a comment to D12596: Fix for bootstrap bug introduced in r244921.

First, congrats on sorting this out; bootstrap issues are always a pain. I have one minor inline comment. Also, can you add a test case for this situation?

Sep 3 2015, 6:39 AM

Aug 24 2015

wschmidt committed rL245862: [PPC64LE] Fix PR24546 - Swap optimization and debug values.
[PPC64LE] Fix PR24546 - Swap optimization and debug values
Aug 24 2015, 12:40 PM · Restricted Project

Aug 18 2015

wschmidt added inline comments to D12032: Vector element extraction without stack operations on Power 8.
Aug 18 2015, 6:54 PM
wschmidt added inline comments to D12032: Vector element extraction without stack operations on Power 8.
Aug 18 2015, 6:11 PM
wschmidt added inline comments to D12032: Vector element extraction without stack operations on Power 8.
Aug 18 2015, 6:08 PM
wschmidt added inline comments to D12032: Vector element extraction without stack operations on Power 8.
Aug 18 2015, 1:28 PM
wschmidt added inline comments to D12032: Vector element extraction without stack operations on Power 8.
Aug 18 2015, 12:05 PM

Jul 29 2015

wschmidt added inline comments to D11471: Scalar to vector conversions using direct moves.
Jul 29 2015, 1:10 PM
wschmidt added inline comments to D11471: Scalar to vector conversions using direct moves.
Jul 29 2015, 12:53 PM
wschmidt added a comment to D11471: Scalar to vector conversions using direct moves.

A few issues and questions...

Jul 29 2015, 11:39 AM
wschmidt committed rL243519: [PPC] Fix PR24216: Don't generate splat for misaligned shuffle mask.
[PPC] Fix PR24216: Don't generate splat for misaligned shuffle mask
Jul 29 2015, 7:32 AM

Jul 28 2015

wschmidt committed rL243470: Add commentary explaining PPC access to return address.
Add commentary explaining PPC access to return address
Jul 28 2015, 1:05 PM
wschmidt closed D11552: Fix fast stack-unwinding for Power.

Committed as r243467.

Jul 28 2015, 12:42 PM
wschmidt committed rL243467: PowerPC's ABIs differ from those of other architectures in that the.
PowerPC's ABIs differ from those of other architectures in that the
Jul 28 2015, 12:42 PM

Jul 27 2015

wschmidt added a comment to D9259: [PowerPC]Adapt fast stack unwinding to work for Power. .

Revised patch posted at http://reviews.llvm.org/D11552, which replaces this review.

Jul 27 2015, 8:50 PM
wschmidt retitled D11552: Fix fast stack-unwinding for Power from to Fix fast stack-unwinding for Power.
Jul 27 2015, 8:49 PM
wschmidt added a comment to D9259: [PowerPC]Adapt fast stack unwinding to work for Power. .

With these changes, the ASAN test suite passes on powerpc64le.

Jul 27 2015, 8:33 PM
wschmidt added a comment to D9259: [PowerPC]Adapt fast stack unwinding to work for Power. .

Result with those changes:

Jul 27 2015, 8:19 PM
wschmidt added a comment to D9259: [PowerPC]Adapt fast stack unwinding to work for Power. .

Thus I can fix this by making the following changes to Bill Seurer's patch:

  • Remove changes involving stack popping;
  • Remove the kFastUnwindAddPC change; and
  • Change calculation of pc1 as follows:
Jul 27 2015, 8:18 PM
wschmidt added a comment to D9259: [PowerPC]Adapt fast stack unwinding to work for Power. .

OK, I've been looking at a small example. I've taken the portion of Bill Seurer's patch that modifies the offset to the return address in the stack frame, but omitted the part that pops extra stack frames, so that I can get a look at why we get a bogus extra frame.

In the example, we produce this:

freed by thread T0 here:

#0 0x1010d988 in GetStackTraceWithPcBpAndContext /home/wschmidt/llvm/llvm-test2/projects/compiler-rt/lib/asan/asan_stack.h:50
#1 0x1010d988 in operator delete(void*) /home/wschmidt/llvm/llvm-test2/projects/compiler-rt/lib/asan/asan_new_delete.cc:94

^^
Why do we output two identical (0x1010d988) addresses here, if you refer to them as 0x1010d98c and 0x1010d910 later?
We do call StackTrace::GetPreviousInstructionPC() when we symbolize addresses, but why isn't second address turned into 0x1010d99c?

Jul 27 2015, 7:56 PM
wschmidt added a comment to D9259: [PowerPC]Adapt fast stack unwinding to work for Power. .

OK, I've been looking at a small example. I've taken the portion of Bill Seurer's patch that modifies the offset to the return address in the stack frame, but omitted the part that pops extra stack frames, so that I can get a look at why we get a bogus extra frame.

Jul 27 2015, 4:40 PM

Jul 24 2015

wschmidt added inline comments to D11421: New interface to enable shrink wrapping.
Jul 24 2015, 1:08 PM

Jul 21 2015

wschmidt committed rL242838: [PPC64LE] More vector swap optimization TLC.
[PPC64LE] More vector swap optimization TLC
Jul 21 2015, 2:40 PM

Jul 20 2015

wschmidt committed rL242680: Add missing test for r242296 (vec_sld).
Add missing test for r242296 (vec_sld)
Jul 20 2015, 8:43 AM

Jul 16 2015

wschmidt committed rL242442: [PowerPC] v4i32 is a VSRCRegClass.
[PowerPC] v4i32 is a VSRCRegClass
Jul 16 2015, 2:14 PM
wschmidt committed rL242408: Add some more PowerPC release notes.
Add some more PowerPC release notes
Jul 16 2015, 8:24 AM
wschmidt committed rL242407: Add PowerPC release notes for 3.7.
Add PowerPC release notes for 3.7
Jul 16 2015, 8:22 AM

Jul 15 2015

wschmidt committed rL242313: [PPC64] Update tests for vec_sld.
[PPC64] Update tests for vec_sld
Jul 15 2015, 11:55 AM
wschmidt committed rL242297: [PPC64LE] Fix vec_sld semantics for little endian.
[PPC64LE] Fix vec_sld semantics for little endian
Jul 15 2015, 8:46 AM
wschmidt committed rL242296: [PPC64LE] Fix vec_sld semantics for little endian.
[PPC64LE] Fix vec_sld semantics for little endian
Jul 15 2015, 8:45 AM

Jul 14 2015

wschmidt accepted D11184: Add missing builtins to altivec.h for ABI compliance (vol. 4).

Please double-check the divide code generation. So long as we aren't scalarizing the code, this LGTM.

Jul 14 2015, 8:02 AM
wschmidt accepted D11183: Add missing builtins to the PPC back end for ABI compliance (vol. 4).

LGTM.

Jul 14 2015, 6:44 AM

Jul 13 2015

wschmidt committed rL242081: [PPC64LE] More improvements to VSX swap optimization.
[PPC64LE] More improvements to VSX swap optimization
Jul 13 2015, 3:58 PM

Jul 9 2015

wschmidt added a comment to D10972: Add missing builtins to altivec.h for ABI compliance (vol. 3).

I would also like to see a test case or two for the confusing -mno-vsx -mpower8-vector stuff...

Jul 9 2015, 12:45 PM
wschmidt accepted D10972: Add missing builtins to altivec.h for ABI compliance (vol. 3).

LGTM with additional commentary to explain what's going on. :) Thanks.

Jul 9 2015, 12:42 PM