[GISel] Allow ConstantFoldBinOp to consider G_FCONSTANT binary representation for combines

[kariddi]

Summary

In GlobalISel there's no different type representing Floats or Ints , but just bag of bits types (s16,s32,s64...).

When IRTranslator generates code like this:

%v = bitcast float 1.0 to i32
%v2 = and i32 %x, %v

It will translate the code to

%0_(s32) = G_FCONSTANT float 1.0
%1_(s32) = G_AND %X(s32), %0(s32)

Because a G_BITCAST from s32 to s32 doesn't make sense in this case ...

So from this behavior its clear that IRTranslator considers the output of "G_FCONSTANT" just a bag of bits the origin of which was a float constant.

Currently though in the constant folder we don't consider constants coming from G_FCONSTANTs for folding purposes as the folder considers them "float data" .
In reality though we should consider them like the "untyped bit representation"of a float and it should participate in any constant folding involving "integer" data.

[arsenm]

llvm/lib/CodeGen/GlobalISel/Utils.cpp

343–345

Why do you need to whitelist these types?

[kariddi]

llvm/lib/CodeGen/GlobalISel/Utils.cpp

343–345

Are the types that fit a uint64 that we know of, but I guess that could be checked from "the only user" of this function instead

[kariddi]

llvm/lib/CodeGen/GlobalISel/Utils.cpp

343–345

Actually, that's not necessarily true ... ConstantFoldBinOp used to use a function that only handled Optional<int64_t> . Now I substituted that with a function that returns APInt (for simplicity), but I wanted to keep the functionality the same as getConstantVRegVal() I guess ...

I guess I can remove that limitation for the Floats, but maintain the limitation fo the integers and then check in ConstantFoldBinOp.

I'm just scared that allowing ConstantFoldBinOp to digest things it never saw before would cause some "unexpected consequence" :-P

[arsenm]

llvm/lib/CodeGen/GlobalISel/Utils.cpp

343–345

I'm worried about somebody adding bfloat16 or something and then never updating this list. I think it would be fine to just return anything bitcastToAPInt will handle

[kariddi]

llvm/lib/CodeGen/GlobalISel/Utils.cpp

343–345

I tried removing the limitation. It seems not not cause problems , so I'll update the patch

[kariddi]

Clang-formatted test and corrected "MRI" to "*MRI"

Removed limitation pointed out by arsenm

[arsenm]

llvm/lib/CodeGen/GlobalISel/Utils.cpp

341–344

I kind of don't like potentially repeating the search through copy/extensions twice. Can you maybe add some kind of parameter to getConstantVRegValWithLookThrough, so it handles both?

[kariddi]

So, I changed the getConstantVRegValWithLookThrough function with an extra operand. Honestly I couldn't see any reason why the new parameter should have been set as "false" by default, so I set it to true, because it seems what the design of GlobalISel seems to suggest considering the difference of float/int being "not-there".

This allowed me to remove the getAnyConstantVRegVal() function and use the normal getConstantVRegVal()

Instead. A test in AMDGPU started to have different output from what I understand because of the new folding and I updated it

[arsenm]

LGTM. I'm not sure we even really need G_FCONSTANT as an instruction

llvm/lib/CodeGen/GlobalISel/Utils.cpp

240–241

No else after return

llvm/include/llvm/CodeGen/GlobalISel/Utils.h

Optional<int64_t> getConstantVRegVal(unsigned VReg,
                                      const MachineRegisterInfo &MRI);
 /// Simple struct used to hold a constant integer value and a virtual
 /// register.
 struct ValueAndVReg {
   int64_t Value;
   unsigned VReg;
 };
 /// If \p VReg is defined by a statically evaluable chain of
-/// instructions rooted on a G_CONSTANT (\p LookThroughInstrs == true)
-/// and that constant fits in int64_t, returns its value as well as
-/// the virtual register defined by this G_CONSTANT.
-/// When \p LookThroughInstrs == false, this function behaves like
+/// instructions rooted on a G_F/CONSTANT (\p LookThroughInstrs == true)
+/// and that constant fits in int64_t, returns its value as well as the
+/// virtual register defined by this G_F/CONSTANT.
+/// When \p LookThroughInstrs == false this function behaves like
 /// getConstantVRegVal.
+/// When \p HandleFConstants == false the function bails on G_FCONSTANTs.
 Optional<ValueAndVReg>
 getConstantVRegValWithLookThrough(unsigned VReg, const MachineRegisterInfo &MRI,
-                                  bool LookThroughInstrs = true);
+                                  bool LookThroughInstrs = true,
+                                  bool HandleFConstants = true);
 const ConstantFP* getConstantFPVRegVal(unsigned VReg,
                                        const MachineRegisterInfo &MRI);
 
 /// See if Reg is defined by an single def instruction that is
 /// Opcode. Also try to do trivial folding if it's a COPY with
 /// same types. Returns null otherwise.
 MachineInstr *getOpcodeDef(unsigned Opcode, Register Reg,
                            const MachineRegisterInfo &MRI);

llvm/lib/CodeGen/GlobalISel/Utils.cpp

Optional<int64_t> llvm::getConstantVRegVal(unsigned VReg,
   assert((!ValAndVReg || ValAndVReg->VReg == VReg) &&
          "Value found while looking through instrs");
   if (!ValAndVReg)
     return None;
   return ValAndVReg->Value;
 }
 
 Optional<ValueAndVReg> llvm::getConstantVRegValWithLookThrough(
-    unsigned VReg, const MachineRegisterInfo &MRI, bool LookThroughInstrs) {
+    unsigned VReg, const MachineRegisterInfo &MRI, bool LookThroughInstrs,
+    bool HandleFConstant) {
   SmallVector<std::pair<unsigned, unsigned>, 4> SeenOpcodes;
   MachineInstr *MI;
-  while ((MI = MRI.getVRegDef(VReg)) &&
-         MI->getOpcode() != TargetOpcode::G_CONSTANT && LookThroughInstrs) {
+  auto IsConstantOpcode = [HandleFConstant](unsigned Opcode) {
+    return Opcode == TargetOpcode::G_CONSTANT ||
+           (HandleFConstant && Opcode == TargetOpcode::G_FCONSTANT);
+  };
+  auto GetImmediateValue = [HandleFConstant,
+                            &MRI](const MachineInstr &MI) -> Optional<APInt> {
+    const MachineOperand &CstVal = MI.getOperand(1);
+    if (!CstVal.isImm() && !CstVal.isCImm() &&
+        (!HandleFConstant || !CstVal.isFPImm()))
+      return None;
+    if (!CstVal.isFPImm()) {
+      unsigned BitWidth =
+          MRI.getType(MI.getOperand(0).getReg()).getSizeInBits();
+      APInt Val = CstVal.isImm() ? APInt(BitWidth, CstVal.getImm())
+                                 : CstVal.getCImm()->getValue();
+      assert(Val.getBitWidth() == BitWidth &&
+             "Value bitwidth doesn't match definition type");
+      return Val;
+    } else {
+      return CstVal.getFPImm()->getValueAPF().bitcastToAPInt();
+    }
+  };
+  while ((MI = MRI.getVRegDef(VReg)) && !IsConstantOpcode(MI->getOpcode()) &&
+         LookThroughInstrs) {
     switch (MI->getOpcode()) {
     case TargetOpcode::G_TRUNC:
     case TargetOpcode::G_SEXT:
     case TargetOpcode::G_ZEXT:
       SeenOpcodes.push_back(std::make_pair(
           MI->getOpcode(),
           MRI.getType(MI->getOperand(0).getReg()).getSizeInBits()));
       VReg = MI->getOperand(1).getReg();
       break;
     case TargetOpcode::COPY:
       VReg = MI->getOperand(1).getReg();
       if (Register::isPhysicalRegister(VReg))
         return None;
       break;
     case TargetOpcode::G_INTTOPTR:
       VReg = MI->getOperand(1).getReg();
       break;
     default:
       return None;
     }
   }
-  if (!MI || MI->getOpcode() != TargetOpcode::G_CONSTANT ||
-      (!MI->getOperand(1).isImm() && !MI->getOperand(1).isCImm()))
+  if (!MI || !IsConstantOpcode(MI->getOpcode()))
     return None;
 
-  const MachineOperand &CstVal = MI->getOperand(1);
-  unsigned BitWidth = MRI.getType(MI->getOperand(0).getReg()).getSizeInBits();
-  APInt Val = CstVal.isImm() ? APInt(BitWidth, CstVal.getImm())
-                             : CstVal.getCImm()->getValue();
-  assert(Val.getBitWidth() == BitWidth &&
-         "Value bitwidth doesn't match definition type");
+  Optional<APInt> MaybeVal = GetImmediateValue(*MI);
+  if (!MaybeVal)
+    return None;
+  APInt &Val = *MaybeVal;
   while (!SeenOpcodes.empty()) {
     std::pair<unsigned, unsigned> OpcodeAndSize = SeenOpcodes.pop_back_val();
     switch (OpcodeAndSize.first) {
     case TargetOpcode::G_TRUNC:
       Val = Val.trunc(OpcodeAndSize.second);
       break;
     case TargetOpcode::G_SEXT:
       Val = Val.sext(OpcodeAndSize.second);
APFloat llvm::getAPFloatFromSize(double Val, unsigned Size) {
   bool Ignored;
   APFloat APF(Val);
   APF.convert(APFloat::IEEEhalf(), APFloat::rmNearestTiesToEven, &Ignored);
   return APF;
 }
 
 Optional<APInt> llvm::ConstantFoldBinOp(unsigned Opcode, const unsigned Op1,
                                         const unsigned Op2,
                                         const MachineRegisterInfo &MRI) {
   auto MaybeOp1Cst = getConstantVRegVal(Op1, MRI);
   auto MaybeOp2Cst = getConstantVRegVal(Op2, MRI);
   if (MaybeOp1Cst && MaybeOp2Cst) {
     LLT Ty = MRI.getType(Op1);
     APInt C1(Ty.getSizeInBits(), *MaybeOp1Cst, true);
     APInt C2(Ty.getSizeInBits(), *MaybeOp2Cst, true);
     switch (Opcode) {
     default:
       break;
     case TargetOpcode::G_ADD:
       return C1 + C2;
     case TargetOpcode::G_AND:

llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-frint.mir

 ---
 name: test_frint_s64
 body: |
   bb.0:
     liveins: $vgpr0_vgpr1
 
     ; SI-LABEL: name: test_frint_s64
     ; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
-    ; SI: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000
-    ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
-    ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
-    ; SI: [[AND:%[0-9]+]]:_(s64) = G_AND [[C]], [[C2]]
-    ; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[C]], [[C1]]
-    ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND1]]
-    ; SI: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[COPY]], [[OR]]
-    ; SI: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[OR]]
+    ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4841369599423283200
+    ; SI: [[COPY1:%[0-9]+]]:_(s64) = COPY [[C]](s64)
+    ; SI: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[COPY]], [[COPY1]]
+    ; SI: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[COPY1]]
     ; SI: [[FADD1:%[0-9]+]]:_(s64) = G_FADD [[FADD]], [[FNEG]]
-    ; SI: [[C3:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x432FFFFFFFFFFFFF
+    ; SI: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x432FFFFFFFFFFFFF
     ; SI: [[FABS:%[0-9]+]]:_(s64) = G_FABS [[COPY]]
-    ; SI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS]](s64), [[C3]]
+    ; SI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS]](s64), [[C1]]
     ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[COPY]], [[FADD1]]
     ; SI: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[COPY]]
     ; SI: $vgpr0_vgpr1 = COPY [[FRINT]](s64)
     ; CI-LABEL: name: test_frint_s64
     ; CI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
     ; CI: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[COPY]]
     ; CI: $vgpr0_vgpr1 = COPY [[FRINT]](s64)
     %0:_(s64) = COPY $vgpr0_vgpr1

 name: test_frint_v2s64
 body: |
   bb.0:
     liveins: $vgpr0_vgpr1_vgpr2_vgpr3
 
     ; SI-LABEL: name: test_frint_v2s64
     ; SI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
     ; SI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
-    ; SI: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000
-    ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
-    ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
-    ; SI: [[AND:%[0-9]+]]:_(s64) = G_AND [[C]], [[C2]]
-    ; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[C]], [[C1]]
-    ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND1]]
-    ; SI: [[COPY1:%[0-9]+]]:_(s64) = COPY [[OR]](s64)
+    ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4841369599423283200
+    ; SI: [[COPY1:%[0-9]+]]:_(s64) = COPY [[C]](s64)
     ; SI: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[UV]], [[COPY1]]
     ; SI: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[COPY1]]
     ; SI: [[FADD1:%[0-9]+]]:_(s64) = G_FADD [[FADD]], [[FNEG]]
-    ; SI: [[C3:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x432FFFFFFFFFFFFF
+    ; SI: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x432FFFFFFFFFFFFF
     ; SI: [[FABS:%[0-9]+]]:_(s64) = G_FABS [[UV]]
-    ; SI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS]](s64), [[C3]]
+    ; SI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS]](s64), [[C1]]
     ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[UV]], [[FADD1]]
     ; SI: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[UV]]
-    ; SI: [[FADD2:%[0-9]+]]:_(s64) = G_FADD [[UV1]], [[OR]]
-    ; SI: [[FNEG1:%[0-9]+]]:_(s64) = G_FNEG [[OR]]
+    ; SI: [[COPY2:%[0-9]+]]:_(s64) = COPY [[C]](s64)
+    ; SI: [[FADD2:%[0-9]+]]:_(s64) = G_FADD [[UV1]], [[COPY2]]
+    ; SI: [[FNEG1:%[0-9]+]]:_(s64) = G_FNEG [[COPY2]]
     ; SI: [[FADD3:%[0-9]+]]:_(s64) = G_FADD [[FADD2]], [[FNEG1]]
     ; SI: [[FABS1:%[0-9]+]]:_(s64) = G_FABS [[UV1]]
-    ; SI: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS1]](s64), [[C3]]
+    ; SI: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS1]](s64), [[C1]]
     ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[FCMP1]](s1), [[UV1]], [[FADD3]]
     ; SI: [[FRINT1:%[0-9]+]]:_(s64) = G_FRINT [[UV1]]
     ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FRINT]](s64), [[FRINT1]](s64)
     ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
     ; CI-LABEL: name: test_frint_v2s64
     ; CI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
     ; CI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
     ; CI: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[UV]]
     ; CI: [[FRINT1:%[0-9]+]]:_(s64) = G_FRINT [[UV1]]
     ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FRINT]](s64), [[FRINT1]](s64)
     ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
     %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
     %1:_(<2 x s64>) = G_FRINT %0
     $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
 ...

llvm/unittests/CodeGen/GlobalISel/ConstantFoldingTest.cpp

auto MIBCSext2 =
       CFB1.buildInstr(TargetOpcode::G_SEXT_INREG, {s32},
                       {CFB1.buildConstant(s32, 0x80), uint64_t(8)});
   // This should be a constant now.
   match = mi_match(MIBCSext2->getOperand(0).getReg(), *MRI, m_ICst(Cst));
   EXPECT_TRUE(match);
   EXPECT_EQ(-0x80, Cst);
 }
 
+TEST_F(GISelMITest, FoldBinOp) {
+  setUp();
+  if (!TM)
+    return;
+
+  LLT s32{LLT::scalar(32)};
+  auto MIBCst1 = B.buildConstant(s32, 16);
+  auto MIBCst2 = B.buildConstant(s32, 9);
+  auto MIBFCst1 = B.buildFConstant(s32, 1.0000001);
+  auto MIBFCst2 = B.buildFConstant(s32, 2.0);
+
+  // Test G_ADD folding Integer + Mixed Int-Float cases
+  Optional<APInt> FoldGAddInt =
+      ConstantFoldBinOp(TargetOpcode::G_ADD, MIBCst1->getOperand(0).getReg(),
+                        MIBCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGAddInt.hasValue());
+  EXPECT_EQ(25ULL, FoldGAddInt.getValue().getLimitedValue());
+  Optional<APInt> FoldGAddMix =
+      ConstantFoldBinOp(TargetOpcode::G_ADD, MIBCst1->getOperand(0).getReg(),
+                        MIBFCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGAddMix.hasValue());
+  EXPECT_EQ(1073741840ULL, FoldGAddMix.getValue().getLimitedValue());
+
+  // Test G_AND folding Integer + Mixed Int-Float cases
+  Optional<APInt> FoldGAndInt =
+      ConstantFoldBinOp(TargetOpcode::G_AND, MIBCst1->getOperand(0).getReg(),
+                        MIBCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGAndInt.hasValue());
+  EXPECT_EQ(0ULL, FoldGAndInt.getValue().getLimitedValue());
+  Optional<APInt> FoldGAndMix =
+      ConstantFoldBinOp(TargetOpcode::G_AND, MIBCst2->getOperand(0).getReg(),
+                        MIBFCst1->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGAndMix.hasValue());
+  EXPECT_EQ(1ULL, FoldGAndMix.getValue().getLimitedValue());
+
+  // Test G_ASHR folding Integer + Mixed cases
+  Optional<APInt> FoldGAShrInt =
+      ConstantFoldBinOp(TargetOpcode::G_ASHR, MIBCst1->getOperand(0).getReg(),
+                        MIBCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGAShrInt.hasValue());
+  EXPECT_EQ(0ULL, FoldGAShrInt.getValue().getLimitedValue());
+  Optional<APInt> FoldGAShrMix =
+      ConstantFoldBinOp(TargetOpcode::G_ASHR, MIBFCst2->getOperand(0).getReg(),
+                        MIBCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGAShrMix.hasValue());
+  EXPECT_EQ(2097152ULL, FoldGAShrMix.getValue().getLimitedValue());
+
+  // Test G_LSHR folding Integer + Mixed Int-Float cases
+  Optional<APInt> FoldGLShrInt =
+      ConstantFoldBinOp(TargetOpcode::G_LSHR, MIBCst1->getOperand(0).getReg(),
+                        MIBCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGLShrInt.hasValue());
+  EXPECT_EQ(0ULL, FoldGLShrInt.getValue().getLimitedValue());
+  Optional<APInt> FoldGLShrMix =
+      ConstantFoldBinOp(TargetOpcode::G_LSHR, MIBFCst1->getOperand(0).getReg(),
+                        MIBCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGLShrMix.hasValue());
+  EXPECT_EQ(2080768ULL, FoldGLShrMix.getValue().getLimitedValue());
+
+  // Test G_MUL folding Integer + Mixed Int-Float cases
+  Optional<APInt> FoldGMulInt =
+      ConstantFoldBinOp(TargetOpcode::G_MUL, MIBCst1->getOperand(0).getReg(),
+                        MIBCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGMulInt.hasValue());
+  EXPECT_EQ(144ULL, FoldGMulInt.getValue().getLimitedValue());
+  Optional<APInt> FoldGMulMix =
+      ConstantFoldBinOp(TargetOpcode::G_MUL, MIBCst1->getOperand(0).getReg(),
+                        MIBFCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGMulMix.hasValue());
+  EXPECT_EQ(0ULL, FoldGMulMix.getValue().getLimitedValue());
+
+  // Test G_OR folding Integer + Mixed Int-Float cases
+  Optional<APInt> FoldGOrInt =
+      ConstantFoldBinOp(TargetOpcode::G_OR, MIBCst1->getOperand(0).getReg(),
+                        MIBCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGOrInt.hasValue());
+  EXPECT_EQ(25ULL, FoldGOrInt.getValue().getLimitedValue());
+  Optional<APInt> FoldGOrMix =
+      ConstantFoldBinOp(TargetOpcode::G_OR, MIBCst1->getOperand(0).getReg(),
+                        MIBFCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGOrMix.hasValue());
+  EXPECT_EQ(1073741840ULL, FoldGOrMix.getValue().getLimitedValue());
+
+  // Test G_SHL folding Integer + Mixed Int-Float cases
+  Optional<APInt> FoldGShlInt =
+      ConstantFoldBinOp(TargetOpcode::G_SHL, MIBCst1->getOperand(0).getReg(),
+                        MIBCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGShlInt.hasValue());
+  EXPECT_EQ(8192ULL, FoldGShlInt.getValue().getLimitedValue());
+  Optional<APInt> FoldGShlMix =
+      ConstantFoldBinOp(TargetOpcode::G_SHL, MIBCst1->getOperand(0).getReg(),
+                        MIBFCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGShlMix.hasValue());
+  EXPECT_EQ(0ULL, FoldGShlMix.getValue().getLimitedValue());
+
+  // Test G_SUB folding Integer + Mixed Int-Float cases
+  Optional<APInt> FoldGSubInt =
+      ConstantFoldBinOp(TargetOpcode::G_SUB, MIBCst1->getOperand(0).getReg(),
+                        MIBCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGSubInt.hasValue());
+  EXPECT_EQ(7ULL, FoldGSubInt.getValue().getLimitedValue());
+  Optional<APInt> FoldGSubMix =
+      ConstantFoldBinOp(TargetOpcode::G_SUB, MIBCst1->getOperand(0).getReg(),
+                        MIBFCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGSubMix.hasValue());
+  EXPECT_EQ(3221225488ULL, FoldGSubMix.getValue().getLimitedValue());
+
+  // Test G_XOR folding Integer + Mixed Int-Float cases
+  Optional<APInt> FoldGXorInt =
+      ConstantFoldBinOp(TargetOpcode::G_XOR, MIBCst1->getOperand(0).getReg(),
+                        MIBCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGXorInt.hasValue());
+  EXPECT_EQ(25ULL, FoldGXorInt.getValue().getLimitedValue());
+  Optional<APInt> FoldGXorMix =
+      ConstantFoldBinOp(TargetOpcode::G_XOR, MIBCst1->getOperand(0).getReg(),
+                        MIBFCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGXorMix.hasValue());
+  EXPECT_EQ(1073741840ULL, FoldGXorMix.getValue().getLimitedValue());
+
+  // Test G_UDIV folding Integer + Mixed Int-Float cases
+  Optional<APInt> FoldGUdivInt =
+      ConstantFoldBinOp(TargetOpcode::G_UDIV, MIBCst1->getOperand(0).getReg(),
+                        MIBCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGUdivInt.hasValue());
+  EXPECT_EQ(1ULL, FoldGUdivInt.getValue().getLimitedValue());
+  Optional<APInt> FoldGUdivMix =
+      ConstantFoldBinOp(TargetOpcode::G_UDIV, MIBCst1->getOperand(0).getReg(),
+                        MIBFCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGUdivMix.hasValue());
+  EXPECT_EQ(0ULL, FoldGUdivMix.getValue().getLimitedValue());
+
+  // Test G_SDIV folding Integer + Mixed Int-Float cases
+  Optional<APInt> FoldGSdivInt =
+      ConstantFoldBinOp(TargetOpcode::G_SDIV, MIBCst1->getOperand(0).getReg(),
+                        MIBCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGSdivInt.hasValue());
+  EXPECT_EQ(1ULL, FoldGSdivInt.getValue().getLimitedValue());
+  Optional<APInt> FoldGSdivMix =
+      ConstantFoldBinOp(TargetOpcode::G_SDIV, MIBCst1->getOperand(0).getReg(),
+                        MIBFCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGSdivMix.hasValue());
+  EXPECT_EQ(0ULL, FoldGSdivMix.getValue().getLimitedValue());
+
+  // Test G_UREM folding Integer + Mixed Int-Float cases
+  Optional<APInt> FoldGUremInt =
+      ConstantFoldBinOp(TargetOpcode::G_UDIV, MIBCst1->getOperand(0).getReg(),
+                        MIBCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGUremInt.hasValue());
+  EXPECT_EQ(1ULL, FoldGUremInt.getValue().getLimitedValue());
+  Optional<APInt> FoldGUremMix =
+      ConstantFoldBinOp(TargetOpcode::G_UDIV, MIBCst1->getOperand(0).getReg(),
+                        MIBFCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGUremMix.hasValue());
+  EXPECT_EQ(0ULL, FoldGUremMix.getValue().getLimitedValue());
+
+  // Test G_SREM folding Integer + Mixed Int-Float cases
+  Optional<APInt> FoldGSremInt =
+      ConstantFoldBinOp(TargetOpcode::G_SREM, MIBCst1->getOperand(0).getReg(),
+                        MIBCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGSremInt.hasValue());
+  EXPECT_EQ(7ULL, FoldGSremInt.getValue().getLimitedValue());
+  Optional<APInt> FoldGSremMix =
+      ConstantFoldBinOp(TargetOpcode::G_SREM, MIBCst1->getOperand(0).getReg(),
+                        MIBFCst2->getOperand(0).getReg(), *MRI);
+  EXPECT_TRUE(FoldGSremMix.hasValue());
+  EXPECT_EQ(16ULL, FoldGSremMix.getValue().getLimitedValue());
+}
+
 } // namespace
 No newline at end of file