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AMDGPU/GlobalISel: Split 64-bit vector extracts during RegBankSelect
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Authored by arsenm on Oct 2 2019, 10:15 PM.

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Summary

Register indexing 64-bit elements is possible on the SALU, but not the
VALU. Handle splitting this into two 32-bit indexes. Extend waterfall
loop handling to allow moving a range of instructions.

I realized after implementing this that it would probably be better to just directly select the indexing instructions here, but this is a first step

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