[ELF][ARM] Simplify some llvm-objdump tests with both ARM/Thumb states

[MaskRay]

Summary

llvm-objdump can switch between ARM/Thumb states after D60927.

In a few lld tests, we run both

• llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi %t
• llvm-objdump -d -triple=armv7a-none-linux-gnueabi %t

to test ARM/Thumb parts of the same file. In many cases we can just
run one command. There is a problem that prevents us from cleaning
more tests (e.g. test/ELF/arm-thumb-interwork-thunk.s):

In llvm-objdump, while we have ARM/Thumb (primary and secondary)
MCDisassembler and MCSubtargetInfo, we have just one MCInstrAnalysis
which is used to resolve the targets of calls in both ARM/Thumb parts.

// ThumbMCInstrAnalysis evaluating ARM parts or ARMMCInstrAnalysis evaluating Thumb parts
// will have incorrect offsets.
// An example of llvm-objdump -d -triple=thumbv7a on ARM part:
1304: 3d ff ff fa  blx     #-780                 # no <...>
1308: 06 00 00 ea  b       #24 <arm_caller+0x24> # wrong target due to wrong offset

[peter.smith]

LGTM, thanks for making the update.

[MaskRay]

How can we fix the MCInstrAnalysis problem? Shall we (a) have two MCInstrAnalysis (how), (b) pass an extra parameter to evaluateBranch, or (c) make it stateful?

edit: I think I favor (c) because it will allow pseudo branch instructions. For example, RISC-V can take two instructions auipc/jalr to jump to a target.

In tools/llvm-objdump/llvm-objdump.cpp

if (MIA && (MIA->isCall(Inst) || MIA->isUnconditionalBranch(Inst) ||
            MIA->isConditionalBranch(Inst))) {
  uint64_t Target;
  if (MIA->evaluateBranch(Inst, SectionAddr + Index, Size, Target)) {  // We know the current ARM/Thumb state but MIA is decided by -triple=

For MCSubtargetInfo and MCDisassembler, we can obtain the secondary one with:

if (isArmElf(Obj) && !STI->checkFeatures("+mclass")) {
  if (STI->checkFeatures("+thumb-mode"))
    Features.AddFeature("-thumb-mode");
  else
    Features.AddFeature("+thumb-mode");
  SecondarySTI.reset(TheTarget->createMCSubtargetInfo(TripleName, MCPU,
                                                      Features.getString()));
  SecondaryDisAsm.reset(TheTarget->createMCDisassembler(*SecondarySTI, Ctx));
}

std::unique_ptr<const MCInstrAnalysis> MIA(          /////////// fixed
    TheTarget->createMCInstrAnalysis(MII.get()));

[efriedma]

(a) have two MCInstrAnalysis (how), (b) pass an extra parameter to evaluateBranch, or (c) make it stateful?

We could also check whether the opcode is an ARM opcode or a Thumb opcode... they don't overlap at all for the relevant opcodes. But passing in the MCSubtargetInfo to evaluateBranch seems like a really easy change.

Not sure how making it "stateful" helps here.

lld/trunk/test/ELF/arm-bl-v6-inrange.s

 // REQUIRES: arm
 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv6-none-linux-gnueabi %s -o %t
 // RUN: echo "SECTIONS { \
 // RUN:          .callee1 0x100004 : { *(.callee_low) } \
 // RUN:          .caller  0x500000 : { *(.text) } \
 // RUN:          .callee2 0x900004 : { *(.callee_high) } } " > %t.script
 // RUN: ld.lld %t --script %t.script -o %t2
-// RUN: llvm-objdump -d -triple=thumbv6-none-linux-gnueabi %t2 | FileCheck -check-prefix=CHECK-THUMB %s
-// RUN: llvm-objdump -d -triple=armv6-none-linux-gnueabi %t2 | FileCheck -check-prefix=CHECK-ARM %s
+// RUN: llvm-objdump -d -triple=armv6-none-linux-gnueabi %t2 | FileCheck %s
 
 // On older Arm Architectures such as v5 and v6 the Thumb BL and BLX relocation
 // uses a slightly different encoding that has a lower range. These relocations
 // are at the extreme range of what is permitted.
  .thumb
  .text
  .syntax unified
  .cpu    arm1176jzf-s
  .globl _start
  .type   _start,%function
 _start:
   bl thumbfunc
   bl armfunc
   bx lr
 
   .section .callee_low, "ax", %progbits
   .globl thumbfunc
   .type thumbfunc, %function
 thumbfunc:
   bx lr
-// CHECK-THUMB: Disassembly of section .callee1:
-// CHECK-THUMB-EMPTY:
-// CHECK-THUMB-NEXT: thumbfunc:
-// CHECK-THUMB-NEXT:   100004:       70 47   bx      lr
-// CHECK-THUMB-EMPTY:
-// CHECK-THUMB-NEXT: Disassembly of section .caller:
-// CHECK-THUMB-EMPTY:
-// CHECK-THUMB-NEXT: _start:
-// CHECK-THUMB-NEXT:   500000:       00 f4 00 f8     bl      #-4194304
-// CHECK-THUMB-NEXT:   500004:       ff f3 fe ef     blx     #4194300
-// CHECK-THUMB-NEXT:   500008:       70 47   bx      lr
+// CHECK: Disassembly of section .callee1:
+// CHECK-EMPTY:
+// CHECK-NEXT: thumbfunc:
+// CHECK-NEXT:   100004:       70 47   bx      lr
+// CHECK-EMPTY:
+// CHECK-NEXT: Disassembly of section .caller:
+// CHECK-EMPTY:
+// CHECK-NEXT: _start:
+// CHECK-NEXT:   500000:       00 f4 00 f8     bl      #-4194304
+// CHECK-NEXT:   500004:       ff f3 fe ef     blx     #4194300
+// CHECK-NEXT:   500008:       70 47   bx      lr
 
   .arm
   .section .callee_high, "ax", %progbits
   .globl armfunc
   .type armfunc, %function
 armfunc:
   bx lr
-// CHECK-ARM: Disassembly of section .callee2:
-// CHECK-ARM-EMPTY:
-// CHECK-ARM-NEXT: armfunc:
-// CHECK-ARM-NEXT:   900004:       1e ff 2f e1     bx      lr
+// CHECK: Disassembly of section .callee2:
+// CHECK-EMPTY:
+// CHECK-NEXT: armfunc:
+// CHECK-NEXT:   900004:       1e ff 2f e1     bx      lr

lld/trunk/test/ELF/arm-blx.s

 // REQUIRES: arm
 // RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
 // RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %S/Inputs/far-arm-thumb-abs.s -o %tfar
 // RUN: echo "SECTIONS { \
 // RUN:          . = 0xb4; \
 // RUN:          .callee1 : { *(.callee_low) } \
 // RUN:          .callee2 : { *(.callee_arm_low) } \
 // RUN:          .caller : { *(.text) } \
 // RUN:          .callee3 : { *(.callee_high) } \
 // RUN:          .callee4 : { *(.callee_arm_high) } } " > %t.script
 // RUN: ld.lld --script %t.script %t %tfar -o %t2
-// RUN: llvm-objdump -d -triple=armv7a-none-linux-gnueabi %t2 | FileCheck -check-prefix=CHECK-ARM %s
-// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi %t2 | FileCheck -check-prefix=CHECK-THUMB %s
+// RUN: llvm-objdump -d -triple=armv7a-none-linux-gnueabi %t2 | FileCheck %s
 
 // Test BLX instruction is chosen for ARM BL/BLX instruction and Thumb callee
 // Using two callees to ensure at least one has 2-byte alignment.
  .syntax unified
  .thumb
  .section .callee_low, "ax",%progbits
  .align 2
  .type callee_low,%function

 
  .section .callee_arm_high, "ax",%progbits
  .arm
  .balign 0x100
  .type callee_arm_high,%function
 callee_arm_high:
   bx lr
 
-// CHECK-THUMB: Disassembly of section .callee1:
-// CHECK-THUMB-EMPTY:
-// CHECK-THUMB-NEXT: callee_low:
-// CHECK-THUMB-NEXT:    b4:       70 47   bx      lr
-// CHECK-THUMB: callee_low2:
-// CHECK-THUMB-NEXT:    b6:       70 47   bx      lr
-
-// CHECK-ARM: Disassembly of section .callee2:
-// CHECK-ARM-EMPTY:
-// CHECK-ARM-NEXT: callee_arm_low:
-// CHECK-ARM-NEXT:    100:        1e ff 2f e1     bx      lr
-
-// CHECK-ARM: Disassembly of section .caller:
-// CHECK-ARM-EMPTY:
-// CHECK-ARM-NEXT: _start:
-// CHECK-ARM-NEXT:   10000:       2b c0 ff fa     blx     #-65364 <callee_low>
-// CHECK-ARM-NEXT:   10004:       2a c0 ff fa     blx     #-65368 <callee_low>
-// CHECK-ARM-NEXT:   10008:       29 c0 ff fb     blx     #-65370 <callee_low2>
-// CHECK-ARM-NEXT:   1000c:       28 c0 ff fb     blx     #-65374 <callee_low2>
-// CHECK-ARM-NEXT:   10010:       3a 00 00 fa     blx     #232 <callee_high>
-// CHECK-ARM-NEXT:   10014:       39 00 00 fa     blx     #228 <callee_high>
-// CHECK-ARM-NEXT:   10018:       38 00 00 fb     blx     #226 <callee_high2>
-// CHECK-ARM-NEXT:   1001c:       37 00 00 fb     blx     #222 <callee_high2>
+// CHECK: Disassembly of section .callee1:
+// CHECK-EMPTY:
+// CHECK-NEXT: callee_low:
+// CHECK-NEXT:    b4:       70 47   bx      lr
+// CHECK: callee_low2:
+// CHECK-NEXT:    b6:       70 47   bx      lr
+
+// CHECK: Disassembly of section .callee2:
+// CHECK-EMPTY:
+// CHECK-NEXT: callee_arm_low:
+// CHECK-NEXT:    100:        1e ff 2f e1     bx      lr
+
+// CHECK: Disassembly of section .caller:
+// CHECK-EMPTY:
+// CHECK-NEXT: _start:
+// CHECK-NEXT:   10000:       2b c0 ff fa     blx     #-65364 <callee_low>
+// CHECK-NEXT:   10004:       2a c0 ff fa     blx     #-65368 <callee_low>
+// CHECK-NEXT:   10008:       29 c0 ff fb     blx     #-65370 <callee_low2>
+// CHECK-NEXT:   1000c:       28 c0 ff fb     blx     #-65374 <callee_low2>
+// CHECK-NEXT:   10010:       3a 00 00 fa     blx     #232 <callee_high>
+// CHECK-NEXT:   10014:       39 00 00 fa     blx     #228 <callee_high>
+// CHECK-NEXT:   10018:       38 00 00 fb     blx     #226 <callee_high2>
+// CHECK-NEXT:   1001c:       37 00 00 fb     blx     #222 <callee_high2>
 // 10020 + 1FFFFFC + 8 = 0x2010024 = blx_far
-// CHECK-ARM-NEXT:   10020:       ff ff 7f fa     blx     #33554428
+// CHECK-NEXT:   10020:       ff ff 7f fa     blx     #33554428
 // 10024 + 1FFFFFC + 8 = 0x2010028 = blx_far2
-// CHECK-ARM-NEXT:   10024:       ff ff 7f fa     blx     #33554428
-// CHECK-ARM-NEXT:   10028:       34 c0 ff eb     bl      #-65328 <callee_arm_low>
-// CHECK-ARM-NEXT:   1002c:       33 c0 ff eb     bl      #-65332 <callee_arm_low>
-// CHECK-ARM-NEXT:   10030:       72 00 00 eb     bl      #456 <callee_arm_high>
-// CHECK-ARM-NEXT:   10034:       71 00 00 eb     bl      #452 <callee_arm_high>
-// CHECK-ARM-NEXT:   10038:       1e ff 2f e1     bx      lr
-
-// CHECK-THUMB: Disassembly of section .callee3:
-// CHECK-THUMB-EMPTY:
-// CHECK-THUMB: callee_high:
-// CHECK-THUMB-NEXT:    10100:       70 47   bx      lr
-// CHECK-THUMB: callee_high2:
-// CHECK-THUMB-NEXT:    10102:       70 47   bx      lr
-
-// CHECK-ARM: Disassembly of section .callee4:
-// CHECK-ARM-EMPTY:
-// CHECK-NEXT-ARM: callee_arm_high:
-// CHECK-NEXT-ARM:   10200:     1e ff 2f e1     bx      lr
+// CHECK-NEXT:   10024:       ff ff 7f fa     blx     #33554428
+// CHECK-NEXT:   10028:       34 c0 ff eb     bl      #-65328 <callee_arm_low>
+// CHECK-NEXT:   1002c:       33 c0 ff eb     bl      #-65332 <callee_arm_low>
+// CHECK-NEXT:   10030:       72 00 00 eb     bl      #456 <callee_arm_high>
+// CHECK-NEXT:   10034:       71 00 00 eb     bl      #452 <callee_arm_high>
+// CHECK-NEXT:   10038:       1e ff 2f e1     bx      lr
+
+// CHECK: Disassembly of section .callee3:
+// CHECK-EMPTY:
+// CHECK: callee_high:
+// CHECK-NEXT:    10100:       70 47   bx      lr
+// CHECK: callee_high2:
+// CHECK-NEXT:    10102:       70 47   bx      lr
+
+// CHECK: Disassembly of section .callee4:
+// CHECK-EMPTY:
+// CHECK-NEXT: callee_arm_high:
+// CHECK-NEXT:   10200:     1e ff 2f e1     bx      lr

lld/trunk/test/ELF/arm-thumb-blx.s

 // REQUIRES: arm
 // RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
 // RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %S/Inputs/arm-thumb-blx-targets.s -o %ttarget
 // RUN: echo "SECTIONS { \
 // RUN:          .R_ARM_CALL24_callee1 : { *(.R_ARM_CALL24_callee_low) } \
 // RUN:          .R_ARM_CALL24_callee2 : { *(.R_ARM_CALL24_callee_thumb_low) } \
 // RUN:          .caller : { *(.text) } \
 // RUN:          .R_ARM_CALL24_callee3 : { *(.R_ARM_CALL24_callee_high) } \
 // RUN:          .R_ARM_CALL24_callee4 : { *(.R_ARM_CALL24_callee_thumb_high) } } " > %t.script
 // RUN: ld.lld --script %t.script %t %ttarget -o %t2
-// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi %t2 | FileCheck -check-prefix=CHECK-THUMB %s
-// RUN: llvm-objdump -d -triple=armv7a-none-linux-gnueabi %t2 | FileCheck -check-prefix=CHECK-ARM %s
+// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi %t2 | FileCheck %s
 // Test BLX instruction is chosen for Thumb BL/BLX instruction and ARM callee
 // 2 byte nops are used to test the pc-rounding behaviour. As a BLX from a
 // 2 byte aligned destination is defined as Align(PC,4) + immediate:00
 // FIXME: llvm-mc has problems assembling BLX unless the destination is
 // external. The targets of the BL and BLX instructions are in arm-thumb-blx-target.s
  .syntax unified
  .section .text, "ax",%progbits
  .thumb

  bl   blx_far
  nop
 // Expect BLX to thumb target to be written out as a BL
  blx   callee_thumb_low
  nop
  blx   callee_thumb_high
  bx lr
 
-// CHECK-ARM: Disassembly of section .R_ARM_CALL24_callee1:
-// CHECK-ARM-EMPTY:
+// CHECK: Disassembly of section .R_ARM_CALL24_callee1:
+// CHECK-EMPTY:
 // CHECK-NEXT-ARM: callee_low:
 // CHECK-NEXT-ARM:      b4:     1e ff 2f e1     bx      lr
 
-// CHECK-THUMB: Disassembly of section .R_ARM_CALL24_callee2:
-// CHECK-THUMB-EMPTY:
+// CHECK: Disassembly of section .R_ARM_CALL24_callee2:
+// CHECK-EMPTY:
 // CHECK-NEXT-THUMB: callee_thumb_low:
 // CHECK-NEXT-THUMB:     100: 70 47   bx  lr
 
-// CHECK-THUMB: Disassembly of section .caller:
-// CHECK-THUMB-EMPTY:
-// CHECK-THUMB: _start:
+// CHECK: Disassembly of section .caller:
+// CHECK-EMPTY:
+// CHECK: _start:
 // Align(0x10000,4) - 0xff50 (65360) + 4 = 0xb4 = callee_low
 // CHECK-NEXT-THUMB:   10000:       f0 f7 58 e8     blx     #-65360
 // CHECK-NEXT-THUMB:   10004:       00 bf   nop
 // Align(0x10006,4) - 0xff54 (65364) + 4 = 0xb4 = callee_low
 // CHECK-NEXT-THUMB:   10006:       f0 f7 56 e8     blx     #-65364
 // CHECK-NEXT-THUMB:   1000a:       00 bf   nop
 // Align(0x1000c,4) + 0xf0 (240) + 4 = 0x10100 = callee_high
 // CHECK-NEXT-THUMB:   1000c:   00 f0 78 e8     blx     #240

 // 10024 - 0xff28 (65320) + 4 = 0x100 = callee_thumb_low
 // CHECK-NEXT-THUMB:   10024:       f0 f7 6c f8     bl      #-65320
 // CHECK-NEXT-THUMB:   10028:       00 bf   nop
 // 1002a + 0x1d2 (466) + 4 = 0x10200 = callee_thumb_high
 // CHECK-NEXT-THUMB:   1002a:       00 f0 e9 f8     bl      #466
 // CHECK-NEXT-THUMB:   1002e:       70 47   bx      lr
 
 
-// CHECK-ARM: Disassembly of section .R_ARM_CALL24_callee3:
-// CHECK-ARM-EMPTY:
+// CHECK: Disassembly of section .R_ARM_CALL24_callee3:
+// CHECK-EMPTY:
 // CHECK-NEXT-ARM: callee_high:
 // CHECK-NEXT-ARM:   10100:     1e ff 2f e1     bx      lr
 
 // CHECK: Disassembly of section .R_ARM_CALL24_callee4:
 // CHECK-EMPTY:
 // CHECK-NEXT-THUMB:callee_thumb_high:
 // CHECK-NEXT-THUMB:   10200:   70 47   bx      lr

lld/trunk/test/ELF/arm-thumb-interwork-shared.s

 // REQUIRES: arm
 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
 // RUN: ld.lld %t --shared -o %t.so
 // RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi %t.so | FileCheck %s
-// RUN: llvm-objdump -d -triple=armv7a-none-linux-gnueabi %t.so | FileCheck %s -check-prefix=PLT
  .syntax unified
  .global sym1
  .global elsewhere
  .weak weakref
 sym1:
  b.w elsewhere
  b.w weakref
 

 // CHECK-NEXT:     1010:       fc 44   add     r12, pc
 // CHECK-NEXT:     1012:       60 47   bx      r12
 // CHECK: __ThumbV7PILongThunk_weakref:
 // CHECK-NEXT:     1014:       40 f2 30 0c     movw    r12, #48
 // CHECK-NEXT:     1018:       c0 f2 00 0c     movt    r12, #0
 // CHECK-NEXT:     101c:       fc 44   add     r12, pc
 // CHECK-NEXT:     101e:       60 47   bx      r12
 
-// PLT: Disassembly of section .plt:
-// PLT-EMPTY:
-// PLT-NEXT: $a:
-// PLT-NEXT:     1020:  04 e0 2d e5     str     lr, [sp, #-4]!
-// PLT-NEXT:     1024:  00 e6 8f e2     add     lr, pc, #0, #12
-// PLT-NEXT:     1028:  01 ea 8e e2     add     lr, lr, #4096
-// PLT-NEXT:     102c:  dc ff be e5     ldr     pc, [lr, #4060]!
-// PLT: $d:
-// PLT-NEXT:     1030:  d4 d4 d4 d4     .word   0xd4d4d4d4
-// PLT-NEXT:     1034:  d4 d4 d4 d4     .word   0xd4d4d4d4
-// PLT-NEXT:     1038:  d4 d4 d4 d4     .word   0xd4d4d4d4
-// PLT-NEXT:     103c:  d4 d4 d4 d4     .word   0xd4d4d4d4
-// PLT: $a:
-// PLT-NEXT:     1040:  00 c6 8f e2     add     r12, pc, #0, #12
-// PLT-NEXT:     1044:  01 ca 8c e2     add     r12, r12, #4096
-// PLT-NEXT:     1048:  c4 ff bc e5     ldr     pc, [r12, #4036]!
-// PLT: $d:
-// PLT-NEXT:     104c:  d4 d4 d4 d4     .word   0xd4d4d4d4
-// PLT: $a:
-// PLT-NEXT:     1050:  00 c6 8f e2     add     r12, pc, #0, #12
-// PLT-NEXT:     1054:  01 ca 8c e2     add     r12, r12, #4096
-// PLT-NEXT:     1058:  b8 ff bc e5     ldr     pc, [r12, #4024]!
-// PLT: $d:
-// PLT-NEXT:     105c:  d4 d4 d4 d4     .word   0xd4d4d4d4
-
+// CHECK: Disassembly of section .plt:
+// CHECK-EMPTY:
+// CHECK-NEXT: $a:
+// CHECK-NEXT:     1020:  04 e0 2d e5     str     lr, [sp, #-4]!
+// CHECK-NEXT:     1024:  00 e6 8f e2     add     lr, pc, #0, #12
+// CHECK-NEXT:     1028:  01 ea 8e e2     add     lr, lr, #4096
+// CHECK-NEXT:     102c:  dc ff be e5     ldr     pc, [lr, #4060]!
+// CHECK: $d:
+// CHECK-NEXT:     1030:  d4 d4 d4 d4     .word   0xd4d4d4d4
+// CHECK-NEXT:     1034:  d4 d4 d4 d4     .word   0xd4d4d4d4
+// CHECK-NEXT:     1038:  d4 d4 d4 d4     .word   0xd4d4d4d4
+// CHECK-NEXT:     103c:  d4 d4 d4 d4     .word   0xd4d4d4d4
+// CHECK: $a:
+// CHECK-NEXT:     1040:  00 c6 8f e2     add     r12, pc, #0, #12
+// CHECK-NEXT:     1044:  01 ca 8c e2     add     r12, r12, #4096
+// CHECK-NEXT:     1048:  c4 ff bc e5     ldr     pc, [r12, #4036]!
+// CHECK: $d:
+// CHECK-NEXT:     104c:  d4 d4 d4 d4     .word   0xd4d4d4d4
+// CHECK: $a:
+// CHECK-NEXT:     1050:  00 c6 8f e2     add     r12, pc, #0, #12
+// CHECK-NEXT:     1054:  01 ca 8c e2     add     r12, r12, #4096
+// CHECK-NEXT:     1058:  b8 ff bc e5     ldr     pc, [r12, #4024]!
+// CHECK: $d:
+// CHECK-NEXT:     105c:  d4 d4 d4 d4     .word   0xd4d4d4d4

lld/trunk/test/ELF/arm-thumb-interwork-thunk-v5.s

 // REQUIRES: arm
 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv5-none-linux-gnueabi %s -o %t
 // RUN: ld.lld %t -o %t2
-// RUN: llvm-objdump -d %t2 -triple=armv5-none-linux-gnueabi | FileCheck -check-prefix=CHECK-ARM %s
-// RUN: llvm-objdump -d %t2 -triple=thumbv5-none-linux-gnueabi | FileCheck -check-prefix=CHECK-THUMB %s
+// RUN: llvm-objdump -d %t2 -triple=armv5-none-linux-gnueabi | FileCheck %s
 // RUN: ld.lld %t -o %t3 --shared
-// RUN: llvm-objdump -d %t3 -triple=armv5-none-linux-gnueabi | FileCheck -check-prefix=CHECK-ARM-PI %s
-// RUN: llvm-objdump -d %t3 -triple=thumbv5-none-linux-gnueabi | FileCheck -check-prefix=CHECK-THUMB-PI %s
+// RUN: llvm-objdump -d %t3 -triple=armv5-none-linux-gnueabi | FileCheck --check-prefix=CHECK-PI %s
 
 // Test ARM Thumb Interworking on older Arm architectures using Thunks that do
 // not use MOVT/MOVW instructions.
 // For pure interworking (not considering range extension) there is only the
 // case of an Arm B to a Thumb Symbol to consider as in older Arm architectures
 // there is no Thumb B.w that we can intercept with a Thunk and we still assume
 // support for the blx instruction for Thumb BL and BLX to an Arm symbol.
         .arm
         .text
         .syntax unified
         .cpu    arm10tdmi
 
         .text
         .globl _start
         .type _start, %function
         .balign 0x1000
 _start:
         b thumb_func
         bl thumb_func
         blx thumb_func
         bx lr
 
-// CHECK-ARM: _start:
-// CHECK-ARM-NEXT: 11000: 03 00 00 ea     b       #12 <__ARMv5ABSLongThunk_thumb_func>
-// CHECK-ARM-NEXT: 11004: 01 00 00 fa     blx     #4 <thumb_func>
-// CHECK-ARM-NEXT: 11008: 00 00 00 fa     blx     #0 <thumb_func>
-// CHECK-ARM-NEXT: 1100c: 1e ff 2f e1     bx      lr
-
-// CHECK-THUMB: thumb_func:
-// CHECK-THUMB-NEXT: 11010: 70 47   bx      lr
-
-// CHECK-ARM: __ARMv5ABSLongThunk_thumb_func:
-// CHECK-ARM-NEXT: 11014: 04 f0 1f e5     ldr     pc, [pc, #-4]
-// CHECK-ARM: $d:
-// CHECK-ARM-NEXT: 11018: 11 10 01 00     .word   0x00011011
-
-// CHECK-ARM-PI: _start:
-// CHECK-ARM-PI-NEXT: 1000: 03 00 00 ea     b       #12 <__ARMV5PILongThunk_thumb_func>
-// CHECK-ARM-PI-NEXT: 1004: 01 00 00 fa     blx     #4 <thumb_func>
-// CHECK-ARM-PI-NEXT: 1008: 00 00 00 fa     blx     #0 <thumb_func>
-// CHECK-ARM-PI-NEXT: 100c: 1e ff 2f e1     bx      lr
-
-// CHECK-THUMB-PI: thumb_func:
-// CHECK-THUMB-PI-NEXT: 1010: 70 47   bx      lr
-
-// CHECK-ARM-PI: __ARMV5PILongThunk_thumb_func:
-// CHECK-ARM-PI-NEXT: 1014: 04 c0 9f e5     ldr     r12, [pc, #4]
-// CHECK-ARM-PI-NEXT: 1018: 0c c0 8f e0     add     r12, pc, r12
-// CHECK-ARM-PI-NEXT: 101c: 1c ff 2f e1     bx      r12
-// CHECK-ARM-PI: $d:
-// CHECK-ARM-PI-NEXT: 1020: f1 ff ff ff     .word   0xfffffff1
+// CHECK: _start:
+// CHECK-NEXT: 11000: 03 00 00 ea     b       #12 <__ARMv5ABSLongThunk_thumb_func>
+// CHECK-NEXT: 11004: 01 00 00 fa     blx     #4 <thumb_func>
+// CHECK-NEXT: 11008: 00 00 00 fa     blx     #0 <thumb_func>
+// CHECK-NEXT: 1100c: 1e ff 2f e1     bx      lr
+
+// CHECK: thumb_func:
+// CHECK-NEXT: 11010: 70 47   bx      lr
+
+// CHECK: __ARMv5ABSLongThunk_thumb_func:
+// CHECK-NEXT: 11014: 04 f0 1f e5     ldr     pc, [pc, #-4]
+// CHECK: $d:
+// CHECK-NEXT: 11018: 11 10 01 00     .word   0x00011011
+
+// CHECK-PI: _start:
+// CHECK-PI-NEXT: 1000: 03 00 00 ea     b       #12 <__ARMV5PILongThunk_thumb_func>
+// CHECK-PI-NEXT: 1004: 01 00 00 fa     blx     #4 <thumb_func>
+// CHECK-PI-NEXT: 1008: 00 00 00 fa     blx     #0 <thumb_func>
+// CHECK-PI-NEXT: 100c: 1e ff 2f e1     bx      lr
+
+// CHECK-PI: thumb_func:
+// CHECK-PI-NEXT: 1010: 70 47   bx      lr
+
+// CHECK-PI: __ARMV5PILongThunk_thumb_func:
+// CHECK-PI-NEXT: 1014: 04 c0 9f e5     ldr     r12, [pc, #4]
+// CHECK-PI-NEXT: 1018: 0c c0 8f e0     add     r12, pc, r12
+// CHECK-PI-NEXT: 101c: 1c ff 2f e1     bx      r12
+// CHECK-PI: $d:
+// CHECK-PI-NEXT: 1020: f1 ff ff ff     .word   0xfffffff1
 
         .section .text.1, "ax", %progbits
         .thumb
         .hidden thumb_func
         .type thumb_func, %function
 thumb_func:
         bx lr

lld/trunk/test/ELF/arm-thumb-plt-reloc.s

 // REQUIRES: arm
 // RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %p/Inputs/arm-plt-reloc.s -o %t1
 // RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t2
 // RUN: ld.lld %t1 %t2 -o %t
 // RUN: llvm-objdump -triple=thumbv7a-none-linux-gnueabi -d %t | FileCheck %s
 // RUN: ld.lld --hash-style=sysv -shared %t1 %t2 -o %t3
-// RUN: llvm-objdump -triple=thumbv7a-none-linux-gnueabi -d %t3 | FileCheck -check-prefix=DSOTHUMB %s
-// RUN: llvm-objdump -triple=armv7a-none-linux-gnueabi -d %t3 | FileCheck -check-prefix=DSOARM %s
+// RUN: llvm-objdump -triple=thumbv7a-none-linux-gnueabi -d %t3 | FileCheck -check-prefix=DSO %s
 // RUN: llvm-readobj -S -r %t3 | FileCheck -check-prefix=DSOREL %s
 //
 // Test PLT entry generation
  .syntax unified
  .text
  .align 2
  .globl _start
  .type  _start,%function

 // 1100c + 4 -14 = 0x11002 = func2
 // CHECK-NEXT:   1100c: ff f7 f9 ff     bl      #-14
 // 11010 + 4 -16 = 0x11004 = func3
 // CHECK-NEXT:   11010: ff f7 f8 ff     bl      #-16
 
 // Expect PLT entries as symbols can be preempted
 // .text is Thumb and .plt is ARM, llvm-objdump can currently only disassemble
 // as ARM or Thumb. Work around by disassembling twice.
-// DSOTHUMB: Disassembly of section .text:
-// DSOTHUMB-EMPTY:
-// DSOTHUMB-NEXT: func1:
-// DSOTHUMB-NEXT:     1000:     70 47   bx      lr
-// DSOTHUMB: func2:
-// DSOTHUMB-NEXT:     1002:     70 47   bx      lr
-// DSOTHUMB: func3:
-// DSOTHUMB-NEXT:     1004:     70 47   bx      lr
-// DSOTHUMB-NEXT:     1006:     d4 d4   bmi     #-88
-// DSOTHUMB: _start:
+// DSO: Disassembly of section .text:
+// DSO-EMPTY:
+// DSO-NEXT: func1:
+// DSO-NEXT:     1000:     70 47   bx      lr
+// DSO: func2:
+// DSO-NEXT:     1002:     70 47   bx      lr
+// DSO: func3:
+// DSO-NEXT:     1004:     70 47   bx      lr
+// DSO-NEXT:     1006:     d4 d4   bmi     #-88
+// DSO: _start:
 // 0x1008 + 0x34 + 4 = 0x1040 = PLT func1
-// DSOTHUMB-NEXT:     1008:     00 f0 1a e8     blx     #52
+// DSO-NEXT:     1008:     00 f0 1a e8     blx     #52
 // 0x100c + 0x40 + 4 = 0x1050 = PLT func2
-// DSOTHUMB-NEXT:     100c:     00 f0 20 e8     blx     #64
+// DSO-NEXT:     100c:     00 f0 20 e8     blx     #64
 // 0x1010 + 0x4C + 4 = 0x1060 = PLT func3
-// DSOTHUMB-NEXT:     1010:     00 f0 26 e8     blx     #76
-// DSOARM: Disassembly of section .plt:
-// DSOARM-EMPTY:
-// DSOARM-NEXT: $a:
-// DSOARM-NEXT:     1020:       04 e0 2d e5     str     lr, [sp, #-4]!
+// DSO-NEXT:     1010:     00 f0 26 e8     blx     #76
+// DSO: Disassembly of section .plt:
+// DSO-EMPTY:
+// DSO-NEXT: $a:
+// DSO-NEXT:     1020:       04 e0 2d e5     str     lr, [sp, #-4]!
 // (0x1024 + 8) + (0 RoR 12) + 4096 + (0xfdc) = 0x3008 = .got.plt[3]
-// DSOARM-NEXT:     1024:       00 e6 8f e2     add     lr, pc, #0, #12
-// DSOARM-NEXT:     1028:       01 ea 8e e2     add     lr, lr, #4096
-// DSOARM-NEXT:     102c:       dc ff be e5     ldr     pc, [lr, #4060]!
-// DSOARM: $d:
+// DSO-NEXT:     1024:       00 e6 8f e2     add     lr, pc, #0, #12
+// DSO-NEXT:     1028:       01 ea 8e e2     add     lr, lr, #4096
+// DSO-NEXT:     102c:       dc ff be e5     ldr     pc, [lr, #4060]!
+// DSO: $d:
 
-// DSOARM-NEXT:     1030:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// DSOARM-NEXT:     1034:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// DSOARM-NEXT:     1038:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// DSOARM-NEXT:     103c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// DSOARM: $a:
+// DSO-NEXT:     1030:       d4 d4 d4 d4     .word   0xd4d4d4d4
+// DSO-NEXT:     1034:       d4 d4 d4 d4     .word   0xd4d4d4d4
+// DSO-NEXT:     1038:       d4 d4 d4 d4     .word   0xd4d4d4d4
+// DSO-NEXT:     103c:       d4 d4 d4 d4     .word   0xd4d4d4d4
+// DSO: $a:
 // (0x1040 + 8) + (0 RoR 12) + 4096 + (0xfc4) = 0x300c
-// DSOARM-NEXT:     1040:       00 c6 8f e2     add     r12, pc, #0, #12
-// DSOARM-NEXT:     1044:       01 ca 8c e2     add     r12, r12, #4096
-// DSOARM-NEXT:     1048:       c4 ff bc e5     ldr     pc, [r12, #4036]!
-// DSOARM: $d:
-// DSOARM-NEXT:     104c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// DSOARM: $a:
+// DSO-NEXT:     1040:       00 c6 8f e2     add     r12, pc, #0, #12
+// DSO-NEXT:     1044:       01 ca 8c e2     add     r12, r12, #4096
+// DSO-NEXT:     1048:       c4 ff bc e5     ldr     pc, [r12, #4036]!
+// DSO: $d:
+// DSO-NEXT:     104c:       d4 d4 d4 d4     .word   0xd4d4d4d4
+// DSO: $a:
 // (0x1050 + 8) + (0 RoR 12) + 4096 + (0xfb8) = 0x3010
-// DSOARM-NEXT:     1050:       00 c6 8f e2     add     r12, pc, #0, #12
-// DSOARM-NEXT:     1054:       01 ca 8c e2     add     r12, r12, #4096
-// DSOARM-NEXT:     1058:       b8 ff bc e5     ldr     pc, [r12, #4024]!
-// DSOARM: $d:
-// DSOARM-NEXT:     105c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// DSOARM: $a:
+// DSO-NEXT:     1050:       00 c6 8f e2     add     r12, pc, #0, #12
+// DSO-NEXT:     1054:       01 ca 8c e2     add     r12, r12, #4096
+// DSO-NEXT:     1058:       b8 ff bc e5     ldr     pc, [r12, #4024]!
+// DSO: $d:
+// DSO-NEXT:     105c:       d4 d4 d4 d4     .word   0xd4d4d4d4
+// DSO: $a:
 // (0x1060 + 8) + (0 RoR 12) + 4096 + (0xfac) = 0x3014
-// DSOARM-NEXT:     1060:       00 c6 8f e2     add     r12, pc, #0, #12
-// DSOARM-NEXT:     1064:       01 ca 8c e2     add     r12, r12, #4096
-// DSOARM-NEXT:     1068:       ac ff bc e5     ldr     pc, [r12, #4012]!
-// DSOARM: $d:
-// DSOARM-NEXT:     106c:       d4 d4 d4 d4     .word   0xd4d4d4d4
+// DSO-NEXT:     1060:       00 c6 8f e2     add     r12, pc, #0, #12
+// DSO-NEXT:     1064:       01 ca 8c e2     add     r12, r12, #4096
+// DSO-NEXT:     1068:       ac ff bc e5     ldr     pc, [r12, #4012]!
+// DSO: $d:
+// DSO-NEXT:     106c:       d4 d4 d4 d4     .word   0xd4d4d4d4
 
 // DSOREL:    Name: .got.plt
 // DSOREL-NEXT:    Type: SHT_PROGBITS
 // DSOREL-NEXT:    Flags [
 // DSOREL-NEXT:      SHF_ALLOC
 // DSOREL-NEXT:      SHF_WRITE
 // DSOREL-NEXT:    ]
 // DSOREL-NEXT:    Address: 0x3000