Page MenuHomePhabricator

MemTag: unchecked load/store optimization.
ClosedPublic

Authored by eugenis on Aug 19 2019, 6:27 PM.

Details

Summary

MTE allows memory access to bypass tag check iff the address argument
is [SP, #imm]. This change takes advantage of this to demote uses of
tagged addresses to regular FrameIndex operands, reducing register
pressure in large functions.

MO_TAGGED target flag is used to signal that the FrameIndex operand
refers to memory that might be tagged, and needs to be handled with
care. Such operand must be lowered to [SP, #imm] directly, without a
scratch register.

The transformation pass attempts to predict when the offset will be
out of range and disable the optimization.
AArch64RegisterInfo::eliminateFrameIndex has an escape hatch in case
this prediction has been wrong, but it is quite inefficient and should
be avoided.

Diff Detail

Repository
rL LLVM

Event Timeline

eugenis created this revision.Aug 19 2019, 6:27 PM

LGTM

llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
491 ↗(On Diff #216036)
if (MFI.hasVarSizedObjects() ||
    isAArch64FrameOffsetLegal(MI, SPOffset, nullptr, nullptr, nullptr) !=
        (AArch64FrameOffsetCanUpdate | AArch64FrameOffsetIsLegal)) {
  // Can't update to SP + offset in place. Precalculate the tagged pointer
  // in a scratch register.
  Offset = TFI->resolveFrameIndexReference(
      MF, FrameIndex, FrameReg, /*PreferFP=*/false, /*ForSimm=*/true);
 ...
  return;
}
FrameReg = AArch64::SP;
Offset = {MFI.getObjectOffset(FrameIndex) + (int64_t)MFI.getStackSize(),
            MVT::i8};
eugenis updated this revision to Diff 217748.Wed, Aug 28, 5:49 PM

Addressed review comment. Renamed the -mllvm flag to match naming style of the other stack tagging flags.

eugenis marked an inline comment as done.Wed, Aug 28, 5:50 PM
vitalybuka accepted this revision.Thu, Aug 29, 12:33 AM
This revision is now accepted and ready to land.Thu, Aug 29, 12:33 AM
This revision was automatically updated to reflect the committed changes.