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Differential D65441

GlobalISel: Improve widenScalar for G_UNMERGE_VALUES
AbandonedPublic

Authored by arsenm on Jul 30 2019, 5:44 AM.

Details

Reviewers
aemerson
aditya_nandakumar
paquette
dsanders
Summary

Create sub-unmerges instead of immediately extending to the requested
size. This avoids very ugly expansions with wide types.

Diff Detail

Revision Contents

PathSize
lib/
CodeGen/
GlobalISel/
28 lines
test/
CodeGen/
AMDGPU/
GlobalISel/
183 lines

Diff 212321

lib/CodeGen/GlobalISel/LegalizerHelper.cpp

Show First 20 Lines • Show All 1,067 Lines • ▼ Show 20 Lines
} }
LegalizerHelper::LegalizeResult LegalizerHelper::LegalizeResult
LegalizerHelper::widenScalarUnmergeValues(MachineInstr &MI, unsigned TypeIdx, LegalizerHelper::widenScalarUnmergeValues(MachineInstr &MI, unsigned TypeIdx,
LLT WideTy) { LLT WideTy) {
const unsigned NumDst = MI.getNumOperands() - 1; const unsigned NumDst = MI.getNumOperands() - 1;
const Register SrcReg = MI.getOperand(NumDst).getReg(); const Register SrcReg = MI.getOperand(NumDst).getReg();
LLT SrcTy = MRI.getType(SrcReg); LLT SrcTy = MRI.getType(SrcReg);
if (!SrcTy.isScalar()) if (SrcTy.isVector())
return UnableToLegalize; return UnableToLegalize;
Register Dst0Reg = MI.getOperand(0).getReg(); Register Dst0Reg = MI.getOperand(0).getReg();
LLT DstTy = MRI.getType(Dst0Reg); LLT DstTy = MRI.getType(Dst0Reg);
if (!DstTy.isScalar()) if (!DstTy.isScalar())
return UnableToLegalize; return UnableToLegalize;
if (TypeIdx == 1) { if (TypeIdx == 1) {
Register Cast = MIRBuilder.buildAnyExt(WideTy, SrcReg).getReg(0); Register Cast = MIRBuilder.buildAnyExt(WideTy, SrcReg).getReg(0);
MIRBuilder.buildTrunc(MI.getOperand(0), Cast); MIRBuilder.buildTrunc(MI.getOperand(0), Cast);
const unsigned DstSize = DstTy.getSizeInBits(); const unsigned DstSize = DstTy.getSizeInBits();
unsigned Offset = DstSize; unsigned Offset = DstSize;
for (unsigned I = 1; I != NumDst; ++I, Offset += DstSize) { for (unsigned I = 1; I != NumDst; ++I, Offset += DstSize) {
auto ShiftAmt = MIRBuilder.buildConstant(WideTy, Offset); auto ShiftAmt = MIRBuilder.buildConstant(WideTy, Offset);
auto Shift = MIRBuilder.buildLShr(WideTy, Cast, ShiftAmt); auto Shift = MIRBuilder.buildLShr(WideTy, Cast, ShiftAmt);
MIRBuilder.buildTrunc(MI.getOperand(I), Shift); MIRBuilder.buildTrunc(MI.getOperand(I), Shift);
} }
MI.eraseFromParent(); MI.eraseFromParent();
return Legalized; return Legalized;
} }
const unsigned WideSize = WideTy.getSizeInBits(); const unsigned WideSize = WideTy.getSizeInBits();
if (SrcTy != WideTy) {
// Try to unmerge to an intermediate type to avoid creating a wide, illegal
// shift.
LLT GCDTy = getGCDType(SrcTy, WideTy);
if (GCDTy != DstTy && SrcTy != GCDTy &&
GCDTy.getSizeInBits() >= DstTy.getSizeInBits()) {
auto Unmerge = MIRBuilder.buildUnmerge(GCDTy, SrcReg);
const int NumUnmerge = Unmerge->getNumOperands() - 1;
const int PartsPerUnmerge = NumDst / NumUnmerge;
assert(NumUnmerge > 1 && PartsPerUnmerge > 1);
for (int I = 0; I != NumUnmerge; ++I) {
auto MIB = MIRBuilder.buildInstr(TargetOpcode::G_UNMERGE_VALUES);
for (int J = 0; J != PartsPerUnmerge; ++J)
MIB.addDef(MI.getOperand(I * PartsPerUnmerge + J).getReg());
MIB.addUse(Unmerge.getReg(I));
}
MI.eraseFromParent();
return Legalized;
}
}
unsigned NewSrcSize = NumDst * WideSize; unsigned NewSrcSize = NumDst * WideSize;
LLT NewSrcTy = LLT::scalar(NewSrcSize); LLT NewSrcTy = LLT::scalar(NewSrcSize);
unsigned SizeDiff = WideSize - DstTy.getSizeInBits(); unsigned SizeDiff = WideSize - DstTy.getSizeInBits();
auto WideSrc = MIRBuilder.buildZExt(NewSrcTy, SrcReg); auto WideSrc = MIRBuilder.buildZExt(NewSrcTy, SrcReg);
for (unsigned I = 1; I != NumDst; ++I) { for (unsigned I = 1; I != NumDst; ++I) {
auto ShiftAmt = MIRBuilder.buildConstant(NewSrcTy, SizeDiff * I); auto ShiftAmt = MIRBuilder.buildConstant(NewSrcTy, SizeDiff * I);
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test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir

Show First 20 Lines • Show All 169 Lines • ▼ Show 20 Lines
--- ---
name: test_unmerge_s8_s32 name: test_unmerge_s8_s32
body: | body: |
bb.0: bb.0:
liveins: $vgpr0 liveins: $vgpr0
; CHECK-LABEL: name: test_unmerge_s8_s32 ; CHECK-LABEL: name: test_unmerge_s8_s32
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s32) ; CHECK: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](s32)
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)
; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[TRUNC]](s32)
; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[ZEXT]], [[SHL]]
; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[C1]](s64)
; CHECK: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[OR]], [[TRUNC1]](s32)
; CHECK: [[OR1:%[0-9]+]]:_(s64) = G_OR [[OR]], [[SHL1]]
; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 24
; CHECK: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; CHECK: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[OR1]], [[TRUNC2]](s32)
; CHECK: [[OR2:%[0-9]+]]:_(s64) = G_OR [[OR1]], [[SHL2]]
; CHECK: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[OR2]](s64)
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s16) ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s16)
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[ANYEXT]], [[C]](s32)
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s16) ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s16)
; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s16) ; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[ANYEXT1]], [[C]](s32)
; CHECK: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[UV3]](s16) ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)
; CHECK: $vgpr0 = COPY [[ANYEXT]](s32) ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: $vgpr1 = COPY [[ANYEXT1]](s32) ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ANYEXT1]](s32)
; CHECK: $vgpr2 = COPY [[ANYEXT2]](s32) ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32)
; CHECK: $vgpr3 = COPY [[ANYEXT3]](s32) ; CHECK: $vgpr0 = COPY [[COPY1]](s32)
; CHECK: $vgpr1 = COPY [[COPY2]](s32)
; CHECK: $vgpr2 = COPY [[COPY3]](s32)
; CHECK: $vgpr3 = COPY [[COPY4]](s32)
%0:_(s32) = COPY $vgpr0 %0:_(s32) = COPY $vgpr0
%1:_(s8), %2:_(s8), %3:_(s8), %4:_(s8) = G_UNMERGE_VALUES %0 %1:_(s8), %2:_(s8), %3:_(s8), %4:_(s8) = G_UNMERGE_VALUES %0
%5:_(s32) = G_ANYEXT %1 %5:_(s32) = G_ANYEXT %1
%6:_(s32) = G_ANYEXT %2 %6:_(s32) = G_ANYEXT %2
%7:_(s32) = G_ANYEXT %3 %7:_(s32) = G_ANYEXT %3
%8:_(s32) = G_ANYEXT %4 %8:_(s32) = G_ANYEXT %4
$vgpr0 = COPY %5 $vgpr0 = COPY %5
$vgpr1 = COPY %6 $vgpr1 = COPY %6
$vgpr2 = COPY %7 $vgpr2 = COPY %7
$vgpr3 = COPY %8 $vgpr3 = COPY %8
... ...
--- ---
name: test_unmerge_s8_s48
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_unmerge_s8_s48
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; CHECK: [[TRUNC:%[0-9]+]]:_(s48) = G_TRUNC [[COPY]](s64)
; CHECK: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[TRUNC]](s48)
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s16)
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[ANYEXT]], [[C]](s32)
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s16)
; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[ANYEXT1]], [[C]](s32)
; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s16)
; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[ANYEXT2]], [[C]](s32)
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ANYEXT1]](s32)
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32)
; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ANYEXT2]](s32)
; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32)
; CHECK: $vgpr0 = COPY [[COPY1]](s32)
; CHECK: $vgpr1 = COPY [[COPY2]](s32)
; CHECK: $vgpr2 = COPY [[COPY3]](s32)
; CHECK: $vgpr3 = COPY [[COPY4]](s32)
; CHECK: $vgpr4 = COPY [[COPY5]](s32)
; CHECK: $vgpr5 = COPY [[COPY6]](s32)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s48) = G_TRUNC %0
%2:_(s8), %3:_(s8), %4:_(s8), %5:_(s8), %6:_(s8), %7:_(s8) = G_UNMERGE_VALUES %1
%8:_(s32) = G_ANYEXT %2
%9:_(s32) = G_ANYEXT %3
%10:_(s32) = G_ANYEXT %4
%11:_(s32) = G_ANYEXT %5
%12:_(s32) = G_ANYEXT %6
%13:_(s32) = G_ANYEXT %7
$vgpr0 = COPY %8
$vgpr1 = COPY %9
$vgpr2 = COPY %10
$vgpr3 = COPY %11
$vgpr4 = COPY %12
$vgpr5 = COPY %13
...
---
name: test_unmerge_s8_s64
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_unmerge_s8_s64
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; CHECK: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](s64)
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s16)
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[ANYEXT]], [[C]](s32)
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s16)
; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[ANYEXT1]], [[C]](s32)
; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s16)
; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[ANYEXT2]], [[C]](s32)
; CHECK: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[UV3]](s16)
; CHECK: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[ANYEXT3]], [[C]](s32)
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ANYEXT1]](s32)
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32)
; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ANYEXT2]](s32)
; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32)
; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY [[ANYEXT3]](s32)
; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32)
; CHECK: $vgpr0 = COPY [[COPY1]](s32)
; CHECK: $vgpr1 = COPY [[COPY2]](s32)
; CHECK: $vgpr2 = COPY [[COPY3]](s32)
; CHECK: $vgpr3 = COPY [[COPY4]](s32)
; CHECK: $vgpr4 = COPY [[COPY5]](s32)
; CHECK: $vgpr5 = COPY [[COPY6]](s32)
; CHECK: $vgpr6 = COPY [[COPY7]](s32)
; CHECK: $vgpr7 = COPY [[COPY8]](s32)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s8), %2:_(s8), %3:_(s8), %4:_(s8), %5:_(s8), %6:_(s8), %7:_(s8), %8:_(s8) = G_UNMERGE_VALUES %0
%10:_(s32) = G_ANYEXT %1
%11:_(s32) = G_ANYEXT %2
%12:_(s32) = G_ANYEXT %3
%13:_(s32) = G_ANYEXT %4
%14:_(s32) = G_ANYEXT %5
%15:_(s32) = G_ANYEXT %6
%16:_(s32) = G_ANYEXT %7
%17:_(s32) = G_ANYEXT %8
$vgpr0 = COPY %10
$vgpr1 = COPY %11
$vgpr2 = COPY %12
$vgpr3 = COPY %13
$vgpr4 = COPY %14
$vgpr5 = COPY %15
$vgpr6 = COPY %16
$vgpr7 = COPY %17
...
---
name: test_unmerge_s8_p1
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_unmerge_s8_p1
; CHECK: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CHECK: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](p1)
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s16)
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[ANYEXT]], [[C]](s32)
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s16)
; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[ANYEXT1]], [[C]](s32)
; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s16)
; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[ANYEXT2]], [[C]](s32)
; CHECK: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[UV3]](s16)
; CHECK: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[ANYEXT3]], [[C]](s32)
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ANYEXT1]](s32)
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32)
; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ANYEXT2]](s32)
; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32)
; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY [[ANYEXT3]](s32)
; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32)
; CHECK: $vgpr0 = COPY [[COPY1]](s32)
; CHECK: $vgpr1 = COPY [[COPY2]](s32)
; CHECK: $vgpr2 = COPY [[COPY3]](s32)
; CHECK: $vgpr3 = COPY [[COPY4]](s32)
; CHECK: $vgpr4 = COPY [[COPY5]](s32)
; CHECK: $vgpr5 = COPY [[COPY6]](s32)
; CHECK: $vgpr6 = COPY [[COPY7]](s32)
; CHECK: $vgpr7 = COPY [[COPY8]](s32)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(s8), %2:_(s8), %3:_(s8), %4:_(s8), %5:_(s8), %6:_(s8), %7:_(s8), %8:_(s8) = G_UNMERGE_VALUES %0
%10:_(s32) = G_ANYEXT %1
%11:_(s32) = G_ANYEXT %2
%12:_(s32) = G_ANYEXT %3
%13:_(s32) = G_ANYEXT %4
%14:_(s32) = G_ANYEXT %5
%15:_(s32) = G_ANYEXT %6
%16:_(s32) = G_ANYEXT %7
%17:_(s32) = G_ANYEXT %8
$vgpr0 = COPY %10
$vgpr1 = COPY %11
$vgpr2 = COPY %12
$vgpr3 = COPY %13
$vgpr4 = COPY %14
$vgpr5 = COPY %15
$vgpr6 = COPY %16
$vgpr7 = COPY %17
...
---
name: test_unmerge_s16_s32 name: test_unmerge_s16_s32
body: | body: |
bb.0: bb.0:
liveins: $vgpr0 liveins: $vgpr0
; CHECK-LABEL: name: test_unmerge_s16_s32 ; CHECK-LABEL: name: test_unmerge_s16_s32
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](s32) ; CHECK: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](s32)
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s16) ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s16)
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