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[PowerPC] Eliminate loads/swap feeding swap/store for vector type by using big-endian load/store
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Authored by wuzish on Jul 21 2019, 10:26 PM.

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Summary

In PowerPC, there is instruction to load vector in big endian element order when it's in little endian target.
So we can combine vector load + reverse into big endian load to eliminate the swap instruction. Also combine vector reverse + store into big endian store.

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rL LLVM

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wuzish created this revision.Jul 21 2019, 10:26 PM

Gentle pin..

jsji added a comment.Jul 29 2019, 12:52 PM

Mostly good to me.

llvm/lib/Target/PowerPC/PPCISelLowering.cpp
13109 ↗(On Diff #211019)

Can this be a range-based for loop?

13124 ↗(On Diff #211019)

Maybe we should check this before more expensive IsElementReverse check?

llvm/lib/Target/PowerPC/PPCISelLowering.h
462 ↗(On Diff #211019)

This will overlap with LXVD2X above, it would be great if we can have a follow up NFC to clean up.

llvm/test/CodeGen/PowerPC/load-shuffle-and-shuffle-store.ll
8 ↗(On Diff #211019)

Can we add one RUN line to run big endian test to make sure nothing get affected?

wuzish marked 4 inline comments as done.Jul 29 2019, 10:23 PM
wuzish added inline comments.
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
13109 ↗(On Diff #211019)

It's not easy because it's reverse begin and end.

llvm/lib/Target/PowerPC/PPCISelLowering.h
462 ↗(On Diff #211019)

Yes, it would be good to merge the implementation of LXVD2X/STXVD2X into LOAD_VEC_BE/STORE_VEC_BE. I would try to do this in another patch.

wuzish updated this revision to Diff 212276.Jul 29 2019, 11:16 PM

Commit testcase firstly and address comments.

jsji accepted this revision.Jul 30 2019, 8:03 AM

LGTM. Thanks for exploiting.

This revision is now accepted and ready to land.Jul 30 2019, 8:03 AM
wuzish retitled this revision from [PowerPC] Eliminate loads feeding swaps for vector type by using big-endian load. to [PowerPC] Eliminate loads/swap feeding swap/store for vector type by using big-endian load/store.Jul 30 2019, 7:53 PM
wuzish closed this revision.Jul 30 2019, 8:02 PM

Sorry to forget to add revision address in commit. Close it manually.

https://reviews.llvm.org/rL367382

wuzish updated this revision to Diff 212521.Jul 31 2019, 1:36 AM

update patch due to find issue.

wuzish reopened this revision.Jul 31 2019, 1:37 AM
This revision is now accepted and ready to land.Jul 31 2019, 1:37 AM
wuzish requested review of this revision.Jul 31 2019, 1:37 AM

Because we have PPCVSXSwapRemoval pass to hack the element order before P9 with vsx, the element order is not always standard normal order in register.
And the optimization of this patch will be conflict with PPCVSXSwapRemoval so that we can not get correct result during the process. The fix way is to not do this optmization before P9.

jsji accepted this revision.Jul 31 2019, 6:58 AM

LGTM.

This revision is now accepted and ready to land.Jul 31 2019, 6:58 AM
This revision was automatically updated to reflect the committed changes.