[WebAssembly] Rename except_ref type to exnref

[aheejin]

Summary

We agreed to rename except_ref to exnref for consistency with other
reference types in
https://github.com/WebAssembly/exception-handling/issues/79. This also
renames WebAssemblyInstrExceptRef.td to WebAssemblyInstrRef.td in order
to use the file for other reference types in future.

lld/trunk/wasm/WriterUtils.cpp

std::string lld::toString(ValType type) {
   case ValType::I64:
     return "i64";
   case ValType::F32:
     return "f32";
   case ValType::F64:
     return "f64";
   case ValType::V128:
     return "v128";
-  case ValType::EXCEPT_REF:
-    return "except_ref";
+  case ValType::EXNREF:
+    return "exnref";
   }
   llvm_unreachable("Invalid wasm::ValType");
 }
 
 std::string lld::toString(const WasmSignature &sig) {
   SmallString<128> s("(");
   for (ValType type : sig.Params) {
     if (s.size() != 1)

llvm/trunk/include/llvm/BinaryFormat/Wasm.h

 // Type immediate encodings used in various contexts.
 enum : unsigned {
   WASM_TYPE_I32 = 0x7F,
   WASM_TYPE_I64 = 0x7E,
   WASM_TYPE_F32 = 0x7D,
   WASM_TYPE_F64 = 0x7C,
   WASM_TYPE_V128 = 0x7B,
   WASM_TYPE_FUNCREF = 0x70,
-  WASM_TYPE_EXCEPT_REF = 0x68,
+  WASM_TYPE_EXNREF = 0x68,
   WASM_TYPE_FUNC = 0x60,
   WASM_TYPE_NORESULT = 0x40, // for blocks with no result values
 };
 
 // Kinds of externals (for imports and exports).
 enum : unsigned {
   WASM_EXTERNAL_FUNCTION = 0x0,
   WASM_EXTERNAL_TABLE = 0x1,

 
 // Subset of types that a value can have
 enum class ValType {
   I32 = WASM_TYPE_I32,
   I64 = WASM_TYPE_I64,
   F32 = WASM_TYPE_F32,
   F64 = WASM_TYPE_F64,
   V128 = WASM_TYPE_V128,
-  EXCEPT_REF = WASM_TYPE_EXCEPT_REF,
+  EXNREF = WASM_TYPE_EXNREF,
 };
 
 struct WasmSignature {
   SmallVector<ValType, 1> Returns;
   SmallVector<ValType, 4> Params;
   // Support empty and tombstone instances, needed by DenseMap.
   enum { Plain, Empty, Tombstone } State = Plain;
 

llvm/trunk/include/llvm/CodeGen/ValueTypes.td

 def nxv2f64  : ValueType<128, 122>; // n x  2 x f64 vector value
 def nxv4f64  : ValueType<256, 123>; // n x  4 x f64 vector value
 def nxv8f64  : ValueType<512, 124>; // n x  8 x f64 vector value
 
 def x86mmx : ValueType<64 , 125>;   // X86 MMX value
 def FlagVT : ValueType<0  , 126>;   // Pre-RA sched glue
 def isVoid : ValueType<0  , 127>;   // Produces no value
 def untyped: ValueType<8  , 128>;   // Produces an untyped value
-def ExceptRef: ValueType<0, 129>;   // WebAssembly's except_ref type
+def exnref: ValueType<0, 129>;      // WebAssembly's exnref type
 def token  : ValueType<0  , 248>;   // TokenTy
 def MetadataVT: ValueType<0, 249>;  // Metadata
 
 // Pseudo valuetype mapped to the current pointer size to any address space.
 // Should only be used in TableGen.
 def iPTRAny   : ValueType<0, 250>;
 
 // Pseudo valuetype to represent "vector of any size"

llvm/trunk/include/llvm/Support/MachineValueType.h

enum SimpleValueType : uint8_t {
       Glue           =  126,   // This glues nodes together during pre-RA sched
 
       isVoid         =  127,   // This has no value
 
       Untyped        =  128,   // This value takes a register, but has
                                // unspecified type.  The register class
                                // will be determined by the opcode.
 
-      ExceptRef      = 129,    // WebAssembly's except_ref type
+      exnref         =  129,   // WebAssembly's exnref type
 
       FIRST_VALUETYPE = 1,     // This is always the beginning of the list.
       LAST_VALUETYPE =  130,   // This always remains at the end of the list.
 
       // This is the current maximum for LAST_VALUETYPE.
       // MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors
       // This value must be a multiple of 32.
       MAX_ALLOWED_VALUETYPE = 160,
unsigned getSizeInBits() const {
       case v256i32:
       case v256f32:  return 8192;
       case v512i32:
       case v512f32:  return 16384;
       case v1024i32:
       case v1024f32:  return 32768;
       case v2048i32:
       case v2048f32:  return 65536;
-      case ExceptRef: return 0; // opaque type
+      case exnref: return 0; // opaque type
       }
     }
 
     unsigned getScalarSizeInBits() const {
       return getScalarType().getSizeInBits();
     }
 
     /// Return the number of bytes overwritten by a store of the specified value

llvm/trunk/lib/CodeGen/ValueTypes.cpp

std::string EVT::getEVTString() const {
   case MVT::v1024f32:return "v1024f32";
   case MVT::v2048f32:return "v2048f32";
   case MVT::v1f64:   return "v1f64";
   case MVT::v2f64:   return "v2f64";
   case MVT::v4f64:   return "v4f64";
   case MVT::v8f64:   return "v8f64";
   case MVT::Metadata:return "Metadata";
   case MVT::Untyped: return "Untyped";
-  case MVT::ExceptRef: return "ExceptRef";
+  case MVT::exnref : return "exnref";
   }
 }
 
 /// getTypeForEVT - This method returns an LLVM type corresponding to the
 /// specified EVT.  For integer types, this returns an unsigned type.  Note
 /// that this will abort for types that cannot be represented.
 Type *EVT::getTypeForEVT(LLVMContext &Context) const {
   switch (V.SimpleTy) {

llvm/trunk/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp

Optional<wasm::ValType> parseType(const StringRef &Type) {
     if (Type == "f32")
       return wasm::ValType::F32;
     if (Type == "f64")
       return wasm::ValType::F64;
     if (Type == "v128" || Type == "i8x16" || Type == "i16x8" ||
         Type == "i32x4" || Type == "i64x2" || Type == "f32x4" ||
         Type == "f64x2")
       return wasm::ValType::V128;
-    if (Type == "except_ref")
-      return wasm::ValType::EXCEPT_REF;
+    if (Type == "exnref")
+      return wasm::ValType::EXNREF;
     return Optional<wasm::ValType>();
   }
 
   WebAssembly::ExprType parseBlockType(StringRef ID) {
     return StringSwitch<WebAssembly::ExprType>(ID)
         .Case("i32", WebAssembly::ExprType::I32)
         .Case("i64", WebAssembly::ExprType::I64)
         .Case("f32", WebAssembly::ExprType::F32)
         .Case("f64", WebAssembly::ExprType::F64)
         .Case("v128", WebAssembly::ExprType::V128)
-        .Case("except_ref", WebAssembly::ExprType::ExceptRef)
+        .Case("exnref", WebAssembly::ExprType::Exnref)
         .Case("void", WebAssembly::ExprType::Void)
         .Default(WebAssembly::ExprType::Invalid);
   }
 
   bool parseRegTypeList(SmallVectorImpl<wasm::ValType> &Types) {
     while (Lexer.is(AsmToken::Identifier)) {
       auto Type = parseType(Lexer.getTok().getString());
       if (!Type)

llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp

const char *llvm::WebAssembly::anyTypeToString(unsigned Ty) {
   case wasm::WASM_TYPE_F64:
     return "f64";
   case wasm::WASM_TYPE_V128:
     return "v128";
   case wasm::WASM_TYPE_FUNCREF:
     return "funcref";
   case wasm::WASM_TYPE_FUNC:
     return "func";
-  case wasm::WASM_TYPE_EXCEPT_REF:
-    return "except_ref";
+  case wasm::WASM_TYPE_EXNREF:
+    return "exnref";
   case wasm::WASM_TYPE_NORESULT:
     return "void";
   default:
     return "invalid_type";
   }
 }
 
 const char *llvm::WebAssembly::typeToString(wasm::ValType Ty) {
   return anyTypeToString(static_cast<unsigned>(Ty));
 }

llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h

 /// This is used to indicate block signatures.
 enum class ExprType : unsigned {
   Void = 0x40,
   I32 = 0x7F,
   I64 = 0x7E,
   F32 = 0x7D,
   F64 = 0x7C,
   V128 = 0x7B,
-  ExceptRef = 0x68,
+  Exnref = 0x68,
   Invalid = 0x00
 };
 
 /// Instruction opcodes emitted via means other than CodeGen.
 static const unsigned Nop = 0x01;
 static const unsigned End = 0x0b;
 
 wasm::ValType toValType(const MVT &Ty);
inline bool isCopy(unsigned Opc) {
   case WebAssembly::COPY_I64:
   case WebAssembly::COPY_I64_S:
   case WebAssembly::COPY_F32:
   case WebAssembly::COPY_F32_S:
   case WebAssembly::COPY_F64:
   case WebAssembly::COPY_F64_S:
   case WebAssembly::COPY_V128:
   case WebAssembly::COPY_V128_S:
-  case WebAssembly::COPY_EXCEPT_REF:
-  case WebAssembly::COPY_EXCEPT_REF_S:
+  case WebAssembly::COPY_EXNREF:
+  case WebAssembly::COPY_EXNREF_S:
     return true;
   default:
     return false;
   }
 }
 
 inline bool isTee(unsigned Opc) {
   switch (Opc) {
inline bool isCallDirect(unsigned Opc) {
   case WebAssembly::CALL_v4i32:
   case WebAssembly::CALL_v4i32_S:
   case WebAssembly::CALL_v2i64:
   case WebAssembly::CALL_v2i64_S:
   case WebAssembly::CALL_v4f32:
   case WebAssembly::CALL_v4f32_S:
   case WebAssembly::CALL_v2f64:
   case WebAssembly::CALL_v2f64_S:
-  case WebAssembly::CALL_ExceptRef:
-  case WebAssembly::CALL_ExceptRef_S:
+  case WebAssembly::CALL_exnref:
+  case WebAssembly::CALL_exnref_S:
   case WebAssembly::RET_CALL:
   case WebAssembly::RET_CALL_S:
     return true;
   default:
     return false;
   }
 }
 
inline bool isCallIndirect(unsigned Opc) {
   case WebAssembly::CALL_INDIRECT_v4i32:
   case WebAssembly::CALL_INDIRECT_v4i32_S:
   case WebAssembly::CALL_INDIRECT_v2i64:
   case WebAssembly::CALL_INDIRECT_v2i64_S:
   case WebAssembly::CALL_INDIRECT_v4f32:
   case WebAssembly::CALL_INDIRECT_v4f32_S:
   case WebAssembly::CALL_INDIRECT_v2f64:
   case WebAssembly::CALL_INDIRECT_v2f64_S:
-  case WebAssembly::CALL_INDIRECT_ExceptRef:
-  case WebAssembly::CALL_INDIRECT_ExceptRef_S:
+  case WebAssembly::CALL_INDIRECT_exnref:
+  case WebAssembly::CALL_INDIRECT_exnref_S:
   case WebAssembly::RET_CALL_INDIRECT:
   case WebAssembly::RET_CALL_INDIRECT_S:
     return true;
   default:
     return false;
   }
 }
 
inline unsigned getCalleeOpNo(unsigned Opc) {
   case WebAssembly::CALL_v4i32:
   case WebAssembly::CALL_v4i32_S:
   case WebAssembly::CALL_v2i64:
   case WebAssembly::CALL_v2i64_S:
   case WebAssembly::CALL_v4f32:
   case WebAssembly::CALL_v4f32_S:
   case WebAssembly::CALL_v2f64:
   case WebAssembly::CALL_v2f64_S:
-  case WebAssembly::CALL_ExceptRef:
-  case WebAssembly::CALL_ExceptRef_S:
+  case WebAssembly::CALL_exnref:
+  case WebAssembly::CALL_exnref_S:
   case WebAssembly::CALL_INDIRECT_i32:
   case WebAssembly::CALL_INDIRECT_i32_S:
   case WebAssembly::CALL_INDIRECT_i64:
   case WebAssembly::CALL_INDIRECT_i64_S:
   case WebAssembly::CALL_INDIRECT_f32:
   case WebAssembly::CALL_INDIRECT_f32_S:
   case WebAssembly::CALL_INDIRECT_f64:
   case WebAssembly::CALL_INDIRECT_f64_S:
   case WebAssembly::CALL_INDIRECT_v16i8:
   case WebAssembly::CALL_INDIRECT_v16i8_S:
   case WebAssembly::CALL_INDIRECT_v8i16:
   case WebAssembly::CALL_INDIRECT_v8i16_S:
   case WebAssembly::CALL_INDIRECT_v4i32:
   case WebAssembly::CALL_INDIRECT_v4i32_S:
   case WebAssembly::CALL_INDIRECT_v2i64:
   case WebAssembly::CALL_INDIRECT_v2i64_S:
   case WebAssembly::CALL_INDIRECT_v4f32:
   case WebAssembly::CALL_INDIRECT_v4f32_S:
   case WebAssembly::CALL_INDIRECT_v2f64:
   case WebAssembly::CALL_INDIRECT_v2f64_S:
-  case WebAssembly::CALL_INDIRECT_ExceptRef:
-  case WebAssembly::CALL_INDIRECT_ExceptRef_S:
+  case WebAssembly::CALL_INDIRECT_exnref:
+  case WebAssembly::CALL_INDIRECT_exnref_S:
     return 1;
   default:
     llvm_unreachable("Not a call instruction");
   }
 }
 
 inline bool isMarker(unsigned Opc) {
   switch (Opc) {

llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp

case MVT::f64:
     return wasm::ValType::F64;
   case MVT::v16i8:
   case MVT::v8i16:
   case MVT::v4i32:
   case MVT::v2i64:
   case MVT::v4f32:
   case MVT::v2f64:
     return wasm::ValType::V128;
-  case MVT::ExceptRef:
-    return wasm::ValType::EXCEPT_REF;
+  case MVT::exnref:
+    return wasm::ValType::EXNREF;
   default:
     llvm_unreachable("unexpected type");
   }
 }

llvm/trunk/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp

for (auto I = Header->getFirstTerminator(), E = Header->begin(); I != E;
     if (WebAssembly::isChild(*std::prev(I), MFI))
       AfterSet.insert(&*std::prev(I));
     else
       break;
   }
 
   // Add the BLOCK.
 
-  // 'br_on_exn' extracts except_ref object and pushes variable number of values
+  // 'br_on_exn' extracts exnref object and pushes variable number of values
   // depending on its tag. For C++ exception, its a single i32 value, and the
   // generated code will be in the form of:
   // block i32
   //   br_on_exn 0, $__cpp_exception
   //   rethrow
   // end_block
   WebAssembly::ExprType ReturnType = WebAssembly::ExprType::Void;
   if (IsBrOnExn) {
bool WebAssemblyCFGStackify::fixUnwindMismatches(MachineFunction &MF) {
   //   catch                       <- ehpad (bb3)
   //   end_try                     (hoisted: a)
   //   handler body
   // end_block                     (new: placeBlockMarker)
   //
   // Note that the new wrapping block/end_block will be generated later in
   // placeBlockMarker.
   //
-  // TODO Currently local.set and local.gets are generated to move except_ref
-  // value created by catches. That's because we don't support yielding values
-  // from a block in LLVM machine IR yet, even though it is supported by wasm.
-  // Delete unnecessary local.get/local.sets once yielding values from a block
-  // is supported. The full EH spec requires multi-value support to do this, but
+  // TODO Currently local.set and local.gets are generated to move exnref value
+  // created by catches. That's because we don't support yielding values from a
+  // block in LLVM machine IR yet, even though it is supported by wasm. Delete
+  // unnecessary local.get/local.sets once yielding values from a block is
+  // supported. The full EH spec requires multi-value support to do this, but
   // for C++ we don't yet need it because we only throw a single i32.
   //
   // ---
   // 2. The same as 1, but in this case an instruction unwinds to a caller
   //    function and not another EH pad.
   //
   // Example: we have the following CFG:
   // bb0:
bool WebAssemblyCFGStackify::fixUnwindMismatches(MachineFunction &MF) {
 
   SmallVector<const MachineBasicBlock *, 8> EHPadStack;
   // Range of intructions to be wrapped in a new nested try/catch
   using TryRange = std::pair<MachineInstr *, MachineInstr *>;
   // In original CFG, <unwind destionation BB, a vector of try ranges>
   DenseMap<MachineBasicBlock *, SmallVector<TryRange, 4>> UnwindDestToTryRanges;
   // In new CFG, <destination to branch to, a vector of try ranges>
   DenseMap<MachineBasicBlock *, SmallVector<TryRange, 4>> BrDestToTryRanges;
-  // In new CFG, <destination to branch to, register containing except_ref>
+  // In new CFG, <destination to branch to, register containing exnref>
   DenseMap<MachineBasicBlock *, unsigned> BrDestToExnReg;
 
   // Gather possibly throwing calls (i.e., previously invokes) whose current
   // unwind destination is not the same as the original CFG.
   for (auto &MBB : reverse(MF)) {
     bool SeenThrowableInstInBB = false;
     for (auto &MI : reverse(MBB)) {
       if (MI.getOpcode() == WebAssembly::TRY)
bool WebAssemblyCFGStackify::fixUnwindMismatches(MachineFunction &MF) {
   if (UnwindDestToTryRanges.empty())
     return false;
 
   // If we found instructions that should unwind to the caller but currently
   // have incorrect unwind destination, we create an appendix block at the end
   // of the function with a local.get and a rethrow instruction.
   if (NeedAppendixBlock) {
     auto *AppendixBB = getAppendixBlock(MF);
-    unsigned ExnReg =
-        MRI.createVirtualRegister(&WebAssembly::EXCEPT_REFRegClass);
+    unsigned ExnReg = MRI.createVirtualRegister(&WebAssembly::EXNREFRegClass);
     BuildMI(AppendixBB, DebugLoc(), TII.get(WebAssembly::RETHROW))
         .addReg(ExnReg);
     // These instruction ranges should branch to this appendix BB.
     for (auto Range : UnwindDestToTryRanges[nullptr])
       BrDestToTryRanges[AppendixBB].push_back(Range);
     BrDestToExnReg[AppendixBB] = ExnReg;
   }
 
void WebAssemblyCFGStackify::fixEndsAtEndOfFunction(MachineFunction &MF) {
   case MVT::v16i8:
   case MVT::v8i16:
   case MVT::v4i32:
   case MVT::v2i64:
   case MVT::v4f32:
   case MVT::v2f64:
     RetType = WebAssembly::ExprType::V128;
     break;
-  case MVT::ExceptRef:
-    RetType = WebAssembly::ExprType::ExceptRef;
+  case MVT::exnref:
+    RetType = WebAssembly::ExprType::Exnref;
     break;
   default:
     llvm_unreachable("unexpected return type");
   }
 
   for (MachineBasicBlock &MBB : reverse(MF)) {
     for (MachineInstr &MI : reverse(MBB)) {
       if (MI.isPosition() || MI.isDebugInstr())

llvm/trunk/lib/Target/WebAssembly/WebAssemblyCallIndirectFixup.cpp

static unsigned getNonPseudoCallIndirectOpcode(const MachineInstr &MI) {
   case PCALL_INDIRECT_v4i32:
     return CALL_INDIRECT_v4i32;
   case PCALL_INDIRECT_v2i64:
     return CALL_INDIRECT_v2i64;
   case PCALL_INDIRECT_v4f32:
     return CALL_INDIRECT_v4f32;
   case PCALL_INDIRECT_v2f64:
     return CALL_INDIRECT_v2f64;
-  case PCALL_INDIRECT_ExceptRef:
-    return CALL_INDIRECT_ExceptRef;
+  case PCALL_INDIRECT_exnref:
+    return CALL_INDIRECT_exnref;
   case PRET_CALL_INDIRECT:
     return RET_CALL_INDIRECT;
   default:
     return INSTRUCTION_LIST_END;
   }
 }
 
 static bool isPseudoCallIndirect(const MachineInstr &MI) {

llvm/trunk/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp

static unsigned getDropOpcode(const TargetRegisterClass *RC) {
   if (RC == &WebAssembly::I64RegClass)
     return WebAssembly::DROP_I64;
   if (RC == &WebAssembly::F32RegClass)
     return WebAssembly::DROP_F32;
   if (RC == &WebAssembly::F64RegClass)
     return WebAssembly::DROP_F64;
   if (RC == &WebAssembly::V128RegClass)
     return WebAssembly::DROP_V128;
-  if (RC == &WebAssembly::EXCEPT_REFRegClass)
-    return WebAssembly::DROP_EXCEPT_REF;
+  if (RC == &WebAssembly::EXNREFRegClass)
+    return WebAssembly::DROP_EXNREF;
   llvm_unreachable("Unexpected register class");
 }
 
 /// Get the appropriate local.get opcode for the given register class.
 static unsigned getLocalGetOpcode(const TargetRegisterClass *RC) {
   if (RC == &WebAssembly::I32RegClass)
     return WebAssembly::LOCAL_GET_I32;
   if (RC == &WebAssembly::I64RegClass)
     return WebAssembly::LOCAL_GET_I64;
   if (RC == &WebAssembly::F32RegClass)
     return WebAssembly::LOCAL_GET_F32;
   if (RC == &WebAssembly::F64RegClass)
     return WebAssembly::LOCAL_GET_F64;
   if (RC == &WebAssembly::V128RegClass)
     return WebAssembly::LOCAL_GET_V128;
-  if (RC == &WebAssembly::EXCEPT_REFRegClass)
-    return WebAssembly::LOCAL_GET_EXCEPT_REF;
+  if (RC == &WebAssembly::EXNREFRegClass)
+    return WebAssembly::LOCAL_GET_EXNREF;
   llvm_unreachable("Unexpected register class");
 }
 
 /// Get the appropriate local.set opcode for the given register class.
 static unsigned getLocalSetOpcode(const TargetRegisterClass *RC) {
   if (RC == &WebAssembly::I32RegClass)
     return WebAssembly::LOCAL_SET_I32;
   if (RC == &WebAssembly::I64RegClass)
     return WebAssembly::LOCAL_SET_I64;
   if (RC == &WebAssembly::F32RegClass)
     return WebAssembly::LOCAL_SET_F32;
   if (RC == &WebAssembly::F64RegClass)
     return WebAssembly::LOCAL_SET_F64;
   if (RC == &WebAssembly::V128RegClass)
     return WebAssembly::LOCAL_SET_V128;
-  if (RC == &WebAssembly::EXCEPT_REFRegClass)
-    return WebAssembly::LOCAL_SET_EXCEPT_REF;
+  if (RC == &WebAssembly::EXNREFRegClass)
+    return WebAssembly::LOCAL_SET_EXNREF;
   llvm_unreachable("Unexpected register class");
 }
 
 /// Get the appropriate local.tee opcode for the given register class.
 static unsigned getLocalTeeOpcode(const TargetRegisterClass *RC) {
   if (RC == &WebAssembly::I32RegClass)
     return WebAssembly::LOCAL_TEE_I32;
   if (RC == &WebAssembly::I64RegClass)
     return WebAssembly::LOCAL_TEE_I64;
   if (RC == &WebAssembly::F32RegClass)
     return WebAssembly::LOCAL_TEE_F32;
   if (RC == &WebAssembly::F64RegClass)
     return WebAssembly::LOCAL_TEE_F64;
   if (RC == &WebAssembly::V128RegClass)
     return WebAssembly::LOCAL_TEE_V128;
-  if (RC == &WebAssembly::EXCEPT_REFRegClass)
-    return WebAssembly::LOCAL_TEE_EXCEPT_REF;
+  if (RC == &WebAssembly::EXNREFRegClass)
+    return WebAssembly::LOCAL_TEE_EXNREF;
   llvm_unreachable("Unexpected register class");
 }
 
 /// Get the type associated with the given register class.
 static MVT typeForRegClass(const TargetRegisterClass *RC) {
   if (RC == &WebAssembly::I32RegClass)
     return MVT::i32;
   if (RC == &WebAssembly::I64RegClass)
     return MVT::i64;
   if (RC == &WebAssembly::F32RegClass)
     return MVT::f32;
   if (RC == &WebAssembly::F64RegClass)
     return MVT::f64;
   if (RC == &WebAssembly::V128RegClass)
     return MVT::v16i8;
-  if (RC == &WebAssembly::EXCEPT_REFRegClass)
-    return MVT::ExceptRef;
+  if (RC == &WebAssembly::EXNREFRegClass)
+    return MVT::exnref;
   llvm_unreachable("unrecognized register class");
 }
 
 /// Given a MachineOperand of a stackified vreg, return the instruction at the
 /// start of the expression tree.
 static MachineInstr *findStartOfTree(MachineOperand &MO,
                                      MachineRegisterInfo &MRI,
                                      WebAssemblyFunctionInfo &MFI) {

llvm/trunk/lib/Target/WebAssembly/WebAssemblyFastISel.cpp

MVT::SimpleValueType getLegalType(MVT::SimpleValueType VT) {
     case MVT::i1:
     case MVT::i8:
     case MVT::i16:
       return MVT::i32;
     case MVT::i32:
     case MVT::i64:
     case MVT::f32:
     case MVT::f64:
-    case MVT::ExceptRef:
+    case MVT::exnref:
       return VT;
     case MVT::f16:
       return MVT::f32;
     case MVT::v16i8:
     case MVT::v8i16:
     case MVT::v4i32:
     case MVT::v4f32:
       if (Subtarget->hasSIMD128())
for (auto const &Arg : F->args()) {
     case MVT::v4f32:
       Opc = WebAssembly::ARGUMENT_v4f32;
       RC = &WebAssembly::V128RegClass;
       break;
     case MVT::v2f64:
       Opc = WebAssembly::ARGUMENT_v2f64;
       RC = &WebAssembly::V128RegClass;
       break;
-    case MVT::ExceptRef:
-      Opc = WebAssembly::ARGUMENT_ExceptRef;
-      RC = &WebAssembly::EXCEPT_REFRegClass;
+    case MVT::exnref:
+      Opc = WebAssembly::ARGUMENT_exnref;
+      RC = &WebAssembly::EXNREFRegClass;
       break;
     default:
       return false;
     }
     unsigned ResultReg = createResultReg(RC);
     BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg)
         .addImm(I);
     updateValueMap(&Arg, ResultReg);
case MVT::v4f32:
                      : WebAssembly::PCALL_INDIRECT_v4f32;
       ResultReg = createResultReg(&WebAssembly::V128RegClass);
       break;
     case MVT::v2f64:
       Opc = IsDirect ? WebAssembly::CALL_v2f64
                      : WebAssembly::PCALL_INDIRECT_v2f64;
       ResultReg = createResultReg(&WebAssembly::V128RegClass);
       break;
-    case MVT::ExceptRef:
-      Opc = IsDirect ? WebAssembly::CALL_ExceptRef
-                     : WebAssembly::PCALL_INDIRECT_ExceptRef;
-      ResultReg = createResultReg(&WebAssembly::EXCEPT_REFRegClass);
+    case MVT::exnref:
+      Opc = IsDirect ? WebAssembly::CALL_exnref
+                     : WebAssembly::PCALL_INDIRECT_exnref;
+      ResultReg = createResultReg(&WebAssembly::EXNREFRegClass);
       break;
     default:
       return false;
     }
   }
 
   SmallVector<unsigned, 8> Args;
   for (unsigned I = 0, E = Call->getNumArgOperands(); I < E; ++I) {
bool WebAssemblyFastISel::selectSelect(const Instruction *I) {
   case MVT::f32:
     Opc = WebAssembly::SELECT_F32;
     RC = &WebAssembly::F32RegClass;
     break;
   case MVT::f64:
     Opc = WebAssembly::SELECT_F64;
     RC = &WebAssembly::F64RegClass;
     break;
-  case MVT::ExceptRef:
-    Opc = WebAssembly::SELECT_EXCEPT_REF;
-    RC = &WebAssembly::EXCEPT_REFRegClass;
+  case MVT::exnref:
+    Opc = WebAssembly::SELECT_EXNREF;
+    RC = &WebAssembly::EXNREFRegClass;
     break;
   default:
     return false;
   }
 
   unsigned ResultReg = createResultReg(RC);
   BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg)
       .addReg(TrueReg)
case MVT::v2i64:
     Opc = WebAssembly::RETURN_v2i64;
     break;
   case MVT::v4f32:
     Opc = WebAssembly::RETURN_v4f32;
     break;
   case MVT::v2f64:
     Opc = WebAssembly::RETURN_v2f64;
     break;
-  case MVT::ExceptRef:
-    Opc = WebAssembly::RETURN_EXCEPT_REF;
+  case MVT::exnref:
+    Opc = WebAssembly::RETURN_EXNREF;
     break;
   default:
     return false;
   }
 
   unsigned Reg;
   if (FuncInfo.Fn->getAttributes().hasAttribute(0, Attribute::SExt))
     Reg = getRegForSignedValue(RV);

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrCall.td

defm CALL_INDIRECT_#vt :
     Requires<preds>;
 }
 
 let Uses = [SP32, SP64], isCall = 1 in {
 defm "" : CALL<i32, I32, "i32.">;
 defm "" : CALL<i64, I64, "i64.">;
 defm "" : CALL<f32, F32, "f32.">;
 defm "" : CALL<f64, F64, "f64.">;
-defm "" : CALL<ExceptRef, EXCEPT_REF, "except_ref.", [HasExceptionHandling]>;
+defm "" : CALL<exnref, EXNREF, "exnref.", [HasExceptionHandling]>;
 defm "" : CALL<v16i8, V128, "v128.", [HasSIMD128]>;
 defm "" : CALL<v8i16, V128, "v128.", [HasSIMD128]>;
 defm "" : CALL<v4i32, V128, "v128.", [HasSIMD128]>;
 defm "" : CALL<v2i64, V128, "v128.", [HasSIMD128]>;
 defm "" : CALL<v4f32, V128, "v128.", [HasSIMD128]>;
 defm "" : CALL<v2f64, V128, "v128.", [HasSIMD128]>;
 
 let IsCanonical = 1 in {

 def : Pat<(v4i32 (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee))),
           (CALL_v4i32 tglobaladdr:$callee)>, Requires<[HasSIMD128]>;
 def : Pat<(v2i64 (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee))),
           (CALL_v2i64 tglobaladdr:$callee)>, Requires<[HasSIMD128]>;
 def : Pat<(v4f32 (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee))),
           (CALL_v4f32 tglobaladdr:$callee)>, Requires<[HasSIMD128]>;
 def : Pat<(v2f64 (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee))),
           (CALL_v2f64 tglobaladdr:$callee)>, Requires<[HasSIMD128]>;
-def : Pat<(ExceptRef
-           (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee))),
-          (CALL_ExceptRef tglobaladdr:$callee)>,
+def : Pat<(exnref (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee))),
+          (CALL_exnref tglobaladdr:$callee)>,
       Requires<[HasExceptionHandling]>;
 def : Pat<(WebAssemblycall0 (WebAssemblywrapper tglobaladdr:$callee)),
           (CALL_VOID tglobaladdr:$callee)>;
 def : Pat<(WebAssemblyretcall (WebAssemblywrapper tglobaladdr:$callee)),
           (RET_CALL tglobaladdr:$callee)>, Requires<[HasTailCall]>;
 
 // Patterns for matching a direct call to an external symbol.
 def : Pat<(i32 (WebAssemblycall1 (WebAssemblywrapper texternalsym:$callee))),

 def : Pat<(v4i32 (WebAssemblycall1 (WebAssemblywrapper texternalsym:$callee))),
           (CALL_v4i32 texternalsym:$callee)>, Requires<[HasSIMD128]>;
 def : Pat<(v2i64 (WebAssemblycall1 (WebAssemblywrapper texternalsym:$callee))),
           (CALL_v2i64 texternalsym:$callee)>, Requires<[HasSIMD128]>;
 def : Pat<(v4f32 (WebAssemblycall1 (WebAssemblywrapper texternalsym:$callee))),
           (CALL_v4f32 texternalsym:$callee)>, Requires<[HasSIMD128]>;
 def : Pat<(v2f64 (WebAssemblycall1 (WebAssemblywrapper texternalsym:$callee))),
           (CALL_v2f64 texternalsym:$callee)>, Requires<[HasSIMD128]>;
-def : Pat<(ExceptRef
-           (WebAssemblycall1 (WebAssemblywrapper texternalsym:$callee))),
-          (CALL_ExceptRef texternalsym:$callee)>,
+def : Pat<(exnref (WebAssemblycall1 (WebAssemblywrapper texternalsym:$callee))),
+          (CALL_exnref texternalsym:$callee)>,
       Requires<[HasExceptionHandling]>;
 def : Pat<(WebAssemblycall0 (WebAssemblywrapper texternalsym:$callee)),
           (CALL_VOID texternalsym:$callee)>;
 def : Pat<(WebAssemblyretcall (WebAssemblywrapper texternalsym:$callee)),
           (RET_CALL texternalsym:$callee)>, Requires<[HasTailCall]>;

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrControl.td

 
 let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
 
 let isReturn = 1 in {
   defm "": RETURN<I32>;
   defm "": RETURN<I64>;
   defm "": RETURN<F32>;
   defm "": RETURN<F64>;
-  defm "": RETURN<EXCEPT_REF>;
+  defm "": RETURN<EXNREF>;
   defm "": SIMD_RETURN<v16i8>;
   defm "": SIMD_RETURN<v8i16>;
   defm "": SIMD_RETURN<v4i32>;
   defm "": SIMD_RETURN<v2i64>;
   defm "": SIMD_RETURN<v4f32>;
   defm "": SIMD_RETURN<v2f64>;
 
   defm RETURN_VOID : NRI<(outs), (ins), [(WebAssemblyreturn)], "return", 0x0f>;

 let Predicates = [HasExceptionHandling] in {
 
 // Throwing an exception: throw / rethrow
 let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
 defm THROW : I<(outs), (ins event_op:$tag, variable_ops),
                (outs), (ins event_op:$tag),
                [(WebAssemblythrow (WebAssemblywrapper texternalsym:$tag))],
                "throw   \t$tag", "throw   \t$tag", 0x08>;
-defm RETHROW : I<(outs), (ins EXCEPT_REF:$exn), (outs), (ins),
-                 [], "rethrow \t$exn", "rethrow", 0x09>;
+defm RETHROW : I<(outs), (ins EXNREF:$exn), (outs), (ins), [],
+                 "rethrow \t$exn", "rethrow", 0x09>;
 // Pseudo instruction to be the lowering target of int_wasm_rethrow_in_catch
 // intrinsic. Will be converted to the real rethrow instruction later.
 let isPseudo = 1 in
 defm RETHROW_IN_CATCH : NRI<(outs), (ins), [(int_wasm_rethrow_in_catch)],
                             "rethrow_in_catch", 0>;
 } // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1
 
 // Region within which an exception is caught: try / end_try
 let Uses = [VALUE_STACK], Defs = [VALUE_STACK] in {
 defm TRY     : NRI<(outs), (ins Signature:$sig), [], "try     \t$sig", 0x06>;
 defm END_TRY : NRI<(outs), (ins), [], "end_try", 0x0b>;
 } // Uses = [VALUE_STACK], Defs = [VALUE_STACK]
 
 // Catching an exception: catch / extract_exception
 let hasCtrlDep = 1, hasSideEffects = 1 in
-defm CATCH : I<(outs EXCEPT_REF:$dst), (ins), (outs), (ins), [],
+defm CATCH : I<(outs EXNREF:$dst), (ins), (outs), (ins), [],
                "catch   \t$dst", "catch", 0x07>;
 
 // Querying / extracing exception: br_on_exn
-// br_on_exn queries an except_ref to see if it matches the corresponding
-// exception tag index. If true it branches to the given label and pushes the
+// br_on_exn queries an exnref to see if it matches the corresponding exception
+// tag index. If true it branches to the given label and pushes the
 // corresponding argument values of the exception onto the stack.
 let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in
-defm BR_ON_EXN : I<(outs), (ins bb_op:$dst, event_op:$tag, EXCEPT_REF:$exn),
+defm BR_ON_EXN : I<(outs), (ins bb_op:$dst, event_op:$tag, EXNREF:$exn),
                    (outs), (ins bb_op:$dst, event_op:$tag), [],
                    "br_on_exn \t$dst, $tag, $exn", "br_on_exn \t$dst, $tag",
                    0x0a>;
 // This is a pseudo instruction that simulates popping a value from stack, which
 // has been pushed by br_on_exn
 let isCodeGenOnly = 1, hasSideEffects = 1 in
 defm EXTRACT_EXCEPTION_I32 : NRI<(outs I32:$dst), (ins),
                                  [(set I32:$dst, (int_wasm_extract_exception))],

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrExceptRef.td

-// WebAssemblyInstrExceptRef.td-WebAssembly except_ref codegen --*- tablegen -*-
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-///
-/// \file
-/// WebAssembly except_ref operand code-gen constructs.
-///
-//===----------------------------------------------------------------------===//
-
-defm SELECT_EXCEPT_REF : I<(outs EXCEPT_REF:$dst),
-                           (ins EXCEPT_REF:$lhs, EXCEPT_REF:$rhs, I32:$cond),
-                           (outs), (ins),
-                           [(set EXCEPT_REF:$dst,
-                            (select I32:$cond, EXCEPT_REF:$lhs,
-                             EXCEPT_REF:$rhs))],
-                           "except_ref.select\t$dst, $lhs, $rhs, $cond",
-                           "except_ref.select", 0x1b>;
-
-def : Pat<(select (i32 (setne I32:$cond, 0)), EXCEPT_REF:$lhs, EXCEPT_REF:$rhs),
-          (SELECT_EXCEPT_REF EXCEPT_REF:$lhs, EXCEPT_REF:$rhs, I32:$cond)>;
-def : Pat<(select (i32 (seteq I32:$cond, 0)), EXCEPT_REF:$lhs, EXCEPT_REF:$rhs),
-          (SELECT_EXCEPT_REF EXCEPT_REF:$rhs, EXCEPT_REF:$lhs, I32:$cond)>;

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp

if (Cond.empty()) {
     return 1;
   }
 
   assert(Cond.size() == 2 && "Expected a flag and a successor block");
 
   MachineFunction &MF = *MBB.getParent();
   auto &MRI = MF.getRegInfo();
   bool IsBrOnExn = Cond[1].isReg() && MRI.getRegClass(Cond[1].getReg()) ==
-                                          &WebAssembly::EXCEPT_REFRegClass;
+                                          &WebAssembly::EXNREFRegClass;
 
   if (Cond[0].getImm()) {
     if (IsBrOnExn) {
       const char *CPPExnSymbol = MF.createExternalSymbolName("__cpp_exception");
       BuildMI(&MBB, DL, get(WebAssembly::BR_ON_EXN))
           .addMBB(TBB)
           .addExternalSymbol(CPPExnSymbol)
           .add(Cond[1]);

 bool WebAssemblyInstrInfo::reverseBranchCondition(
     SmallVectorImpl<MachineOperand> &Cond) const {
   assert(Cond.size() == 2 && "Expected a flag and a condition expression");
 
   // br_on_exn's condition cannot be reversed
   MachineFunction &MF = *Cond[1].getParent()->getParent()->getParent();
   auto &MRI = MF.getRegInfo();
   if (Cond[1].isReg() &&
-      MRI.getRegClass(Cond[1].getReg()) == &WebAssembly::EXCEPT_REFRegClass)
+      MRI.getRegClass(Cond[1].getReg()) == &WebAssembly::EXNREFRegClass)
     return true;
 
   Cond.front() = MachineOperand::CreateImm(!Cond.front().getImm());
   return false;
 }

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.td

multiclass ARGUMENT<WebAssemblyRegClass reg, ValueType vt> {
   defm ARGUMENT_#vt :
     I<(outs reg:$res), (ins i32imm:$argno), (outs), (ins i32imm:$argno),
       [(set (vt reg:$res), (WebAssemblyargument timm:$argno))]>;
 }
 defm "": ARGUMENT<I32, i32>;
 defm "": ARGUMENT<I64, i64>;
 defm "": ARGUMENT<F32, f32>;
 defm "": ARGUMENT<F64, f64>;
-defm "": ARGUMENT<EXCEPT_REF, ExceptRef>;
+defm "": ARGUMENT<EXNREF, exnref>;
 
 // local.get and local.set are not generated by instruction selection; they
 // are implied by virtual register uses and defs.
 multiclass LOCAL<WebAssemblyRegClass vt> {
   let hasSideEffects = 0 in {
   // COPY is not an actual instruction in wasm, but since we allow local.get and
   // local.set to be implicit during most of codegen, we can have a COPY which
   // is actually a no-op because all the work is done in the implied local.get

 
 } // hasSideEffects = 0
 }
 defm "" : LOCAL<I32>;
 defm "" : LOCAL<I64>;
 defm "" : LOCAL<F32>;
 defm "" : LOCAL<F64>;
 defm "" : LOCAL<V128>, Requires<[HasSIMD128]>;
-defm "" : LOCAL<EXCEPT_REF>, Requires<[HasExceptionHandling]>;
+defm "" : LOCAL<EXNREF>, Requires<[HasExceptionHandling]>;
 
 let isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1 in {
 defm CONST_I32 : I<(outs I32:$res), (ins i32imm_op:$imm),
                    (outs), (ins i32imm_op:$imm),
                    [(set I32:$res, imm:$imm)],
                    "i32.const\t$res, $imm", "i32.const\t$imm", 0x41>;
 defm CONST_I64 : I<(outs I64:$res), (ins i64imm_op:$imm),
                    (outs), (ins i64imm_op:$imm),

 include "WebAssemblyInstrMemory.td"
 include "WebAssemblyInstrCall.td"
 include "WebAssemblyInstrControl.td"
 include "WebAssemblyInstrInteger.td"
 include "WebAssemblyInstrConv.td"
 include "WebAssemblyInstrFloat.td"
 include "WebAssemblyInstrAtomics.td"
 include "WebAssemblyInstrSIMD.td"
-include "WebAssemblyInstrExceptRef.td"
+include "WebAssemblyInstrRef.td"
 include "WebAssemblyInstrBulkMemory.td"

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrRef.td

+// WebAssemblyInstrRef.td - WebAssembly reference type codegen --*- tablegen -*-
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+///
+/// \file
+/// WebAssembly refence type operand codegen constructs.
+///
+//===----------------------------------------------------------------------===//
+
+defm SELECT_EXNREF : I<(outs EXNREF:$dst),
+                       (ins EXNREF:$lhs, EXNREF:$rhs, I32:$cond),
+                       (outs), (ins),
+                       [(set EXNREF:$dst,
+                         (select I32:$cond, EXNREF:$lhs, EXNREF:$rhs))],
+                       "exnref.select\t$dst, $lhs, $rhs, $cond",
+                       "exnref.select", 0x1b>;
+
+def : Pat<(select (i32 (setne I32:$cond, 0)), EXNREF:$lhs, EXNREF:$rhs),
+          (SELECT_EXNREF EXNREF:$lhs, EXNREF:$rhs, I32:$cond)>;
+def : Pat<(select (i32 (seteq I32:$cond, 0)), EXNREF:$lhs, EXNREF:$rhs),
+          (SELECT_EXNREF EXNREF:$rhs, EXNREF:$lhs, I32:$cond)>;

llvm/trunk/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp

bool WebAssemblyLateEHPrepare::addCatches(MachineFunction &MF) {
   const auto &TII = *MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
   MachineRegisterInfo &MRI = MF.getRegInfo();
   for (auto &MBB : MF) {
     if (MBB.isEHPad()) {
       Changed = true;
       auto InsertPos = MBB.begin();
       if (InsertPos->isEHLabel()) // EH pad starts with an EH label
         ++InsertPos;
-      unsigned DstReg =
-          MRI.createVirtualRegister(&WebAssembly::EXCEPT_REFRegClass);
+      unsigned DstReg = MRI.createVirtualRegister(&WebAssembly::EXNREFRegClass);
       BuildMI(MBB, InsertPos, MBB.begin()->getDebugLoc(),
               TII.get(WebAssembly::CATCH), DstReg);
     }
   }
   return Changed;
 }
 
 bool WebAssemblyLateEHPrepare::replaceFuncletReturns(MachineFunction &MF) {
for (auto &MI : MBB) {
       eraseDeadBBsAndChildren(Succs);
     }
   }
 
   return Changed;
 }
 
 // Wasm uses 'br_on_exn' instruction to check the tag of an exception. It takes
-// except_ref type object returned by 'catch', and branches to the destination
-// if it matches a given tag. We currently use __cpp_exception symbol to
-// represent the tag for all C++ exceptions.
+// exnref type object returned by 'catch', and branches to the destination if it
+// matches a given tag. We currently use __cpp_exception symbol to represent the
+// tag for all C++ exceptions.
 //
 // block $l (result i32)
 //   ...
-//   ;; except_ref $e is on the stack at this point
+//   ;; exnref $e is on the stack at this point
 //   br_on_exn $l $e ;; branch to $l with $e's arguments
 //   ...
 // end
 // ;; Here we expect the extracted values are on top of the wasm value stack
 // ... Handle exception using values ...
 //
-// br_on_exn takes an except_ref object and branches if it matches the given
-// tag. There can be multiple br_on_exn instructions if we want to match for
-// another tag, but for now we only test for __cpp_exception tag, and if it does
-// not match, i.e., it is a foreign exception, we rethrow it.
+// br_on_exn takes an exnref object and branches if it matches the given tag.
+// There can be multiple br_on_exn instructions if we want to match for another
+// tag, but for now we only test for __cpp_exception tag, and if it does not
+// match, i.e., it is a foreign exception, we rethrow it.
 //
 // In the destination BB that's the target of br_on_exn, extracted exception
 // values (in C++'s case a single i32, which represents an exception pointer)
 // are placed on top of the wasm stack. Because we can't model wasm stack in
 // LLVM instruction, we use 'extract_exception' pseudo instruction to retrieve
 // it. The pseudo instruction will be deleted later.
 bool WebAssemblyLateEHPrepare::addExceptionExtraction(MachineFunction &MF) {
   const auto &TII = *MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
if (CatchPos->isEHLabel()) // EH pad starts with an EH label
       ++CatchPos;
     MachineInstr *Catch = &*CatchPos;
 
     if (Catch->getNextNode() != Extract)
       EHPad->insert(Catch->getNextNode(), Extract->removeFromParent());
 
     // - Before:
     // ehpad:
-    //   %exnref:except_ref = catch
+    //   %exnref:exnref = catch
     //   %exn:i32 = extract_exception
     //   ... use exn ...
     //
     // - After:
     // ehpad:
-    //   %exnref:except_ref = catch
+    //   %exnref:exnref = catch
     //   br_on_exn %thenbb, $__cpp_exception, %exnref
     //   br %elsebb
     // elsebb:
     //   rethrow
     // thenbb:
     //   %exn:i32 = extract_exception
     //   ... use exn ...
     unsigned ExnReg = Catch->getOperand(0).getReg();
for (auto *Extract : ExtractInstrs) {
     BuildMI(EHPad, DL, TII.get(WebAssembly::BR)).addMBB(ElseMBB);
 
     // When this is a terminate pad with __clang_call_terminate() call, we don't
     // rethrow it anymore and call __clang_call_terminate() with a nullptr
     // argument, which will call std::terminate().
     //
     // - Before:
     // ehpad:
-    //   %exnref:except_ref = catch
+    //   %exnref:exnref = catch
     //   %exn:i32 = extract_exception
     //   call @__clang_call_terminate(%exn)
     //   unreachable
     //
     // - After:
     // ehpad:
-    //   %exnref:except_ref = catch
+    //   %exnref:exnref = catch
     //   br_on_exn %thenbb, $__cpp_exception, %exnref
     //   br %elsebb
     // elsebb:
     //   call @__clang_call_terminate(0)
     //   unreachable
     // thenbb:
     //   %exn:i32 = extract_exception
     //   call @__clang_call_terminate(%exn)

llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp

for (auto MII = MBB.rbegin(); MII != MBB.rend(); ++MII) {
         if (WebAssembly::isArgument(Def->getOpcode()))
           continue;
 
         // Currently catch's return value register cannot be stackified, because
         // the wasm LLVM backend currently does not support live-in values
         // entering blocks, which is a part of multi-value proposal.
         //
         // Once we support live-in values of wasm blocks, this can be:
-        // catch                           ; push except_ref value onto stack
-        // block except_ref -> i32
-        // br_on_exn $__cpp_exception      ; pop the except_ref value
+        // catch                           ; push exnref value onto stack
+        // block exnref -> i32
+        // br_on_exn $__cpp_exception      ; pop the exnref value
         // end_block
         //
         // But because we don't support it yet, the catch instruction's dst
         // register should be assigned to a local to be propagated across
         // 'block' boundary now.
         //
         // TODO Fix this once we support the multi-value proposal.
         if (Def->getOpcode() == WebAssembly::CATCH)

llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.td

 // These are also used a "types" in the generated assembly matcher.
 def I32_0 : WebAssemblyReg<"%i32.0">;
 def I64_0 : WebAssemblyReg<"%i64.0">;
 def F32_0 : WebAssemblyReg<"%f32.0">;
 def F64_0 : WebAssemblyReg<"%f64.0">;
 
 def V128_0: WebAssemblyReg<"%v128">;
 
-def EXCEPT_REF_0 : WebAssemblyReg<"%except_ref.0">;
+def EXNREF_0 : WebAssemblyReg<"%exnref.0">;
 
 // The value stack "register". This is an opaque entity which serves to order
 // uses and defs that must remain in LIFO order.
 def VALUE_STACK : WebAssemblyReg<"STACK">;
 
 // The incoming arguments "register". This is an opaque entity which serves to
 // order the ARGUMENT instructions that are emulating live-in registers and
 // must not be scheduled below other instructions.
 def ARGUMENTS : WebAssemblyReg<"ARGUMENTS">;
 
 //===----------------------------------------------------------------------===//
 //  Register classes
 //===----------------------------------------------------------------------===//
 
 def I32 : WebAssemblyRegClass<[i32], 32, (add FP32, SP32, I32_0)>;
 def I64 : WebAssemblyRegClass<[i64], 64, (add FP64, SP64, I64_0)>;
 def F32 : WebAssemblyRegClass<[f32], 32, (add F32_0)>;
 def F64 : WebAssemblyRegClass<[f64], 64, (add F64_0)>;
 def V128 : WebAssemblyRegClass<[v4f32, v2f64, v2i64, v4i32, v16i8, v8i16], 128,
                                (add V128_0)>;
-def EXCEPT_REF : WebAssemblyRegClass<[ExceptRef], 0, (add EXCEPT_REF_0)>;
+def EXNREF : WebAssemblyRegClass<[exnref], 0, (add EXNREF_0)>;

llvm/trunk/test/CodeGen/WebAssembly/exception.ll

 ;   } catch (int) {
 ;   }
 ; }
 
 ; CHECK-LABEL: test_catch:
 ; CHECK:     global.get  ${{.+}}=, __stack_pointer
 ; CHECK:     try
 ; CHECK:       call      foo
-; CHECK:     catch     $[[EXCEPT_REF:[0-9]+]]=
+; CHECK:     catch     $[[EXNREF:[0-9]+]]=
 ; CHECK:       global.set  __stack_pointer
 ; CHECK:       block i32
-; CHECK:         br_on_exn 0, __cpp_exception, $[[EXCEPT_REF]]
-; CHECK:         rethrow   $[[EXCEPT_REF]]
+; CHECK:         br_on_exn 0, __cpp_exception, $[[EXNREF]]
+; CHECK:         rethrow   $[[EXNREF]]
 ; CHECK:       end_block
 ; CHECK:       extract_exception $[[EXN:[0-9]+]]=
 ; CHECK-DAG:   i32.store  __wasm_lpad_context
 ; CHECK-DAG:   i32.store  __wasm_lpad_context+4
 ; CHECK:       i32.call  $drop=, _Unwind_CallPersonality, $[[EXN]]
 ; CHECK:       block
 ; CHECK:         br_if     0
 ; CHECK:         i32.call  $drop=, __cxa_begin_catch
 ; CHECK:         call      __cxa_end_catch
 ; CHECK:         br        1
 ; CHECK:       end_block
-; CHECK:       rethrow   $[[EXCEPT_REF]]
+; CHECK:       rethrow   $[[EXNREF]]
 ; CHECK:     end_try
 define void @test_catch() personality i8* bitcast (i32 (...)* @__gxx_wasm_personality_v0 to i8*) {
 entry:
   invoke void @foo()
           to label %try.cont unwind label %catch.dispatch
 
 catch.dispatch:                                   ; preds = %entry
   %0 = catchswitch within none [label %catch.start] unwind to caller

 ; void test_cleanup() {
 ;   Temp t;
 ;   foo();
 ; }
 
 ; CHECK-LABEL: test_cleanup:
 ; CHECK: try
 ; CHECK:   call      foo
-; CHECK: catch     $[[EXCEPT_REF:[0-9]+]]=
+; CHECK: catch     $[[EXNREF:[0-9]+]]=
 ; CHECK:   global.set  __stack_pointer
 ; CHECK:   i32.call  $drop=, _ZN4TempD2Ev
-; CHECK:   rethrow   $[[EXCEPT_REF]]
+; CHECK:   rethrow   $[[EXNREF]]
 ; CHECK: end_try
 define void @test_cleanup() personality i8* bitcast (i32 (...)* @__gxx_wasm_personality_v0 to i8*) {
 entry:
   %t = alloca %struct.Temp, align 1
   invoke void @foo()
           to label %invoke.cont unwind label %ehcleanup
 
 invoke.cont:                                      ; preds = %entry

llvm/trunk/test/MC/Disassembler/WebAssembly/wasm.txt

 0x02 0x7C
 
 # CHECK: call_indirect
 # $0=, 128, 0
 # FIXME: WebAssemblyInstPrinter does not print immediates.
 0x11 0x80 0x01 0x00
 
 # CHECK: call 0
-# CHECK-NOT: except_ref.call 0
+# CHECK-NOT: exnref.call 0
 0x10 0x00
 
 # CHECK: local.get 128
 0x20 0x80 0x01
 
 # Prefix byte example:
 # CHECK: i64.trunc_sat_f64_u
 0xFC 0x07

llvm/trunk/test/MC/WebAssembly/basic-assembly.s

.LBB0_2:
     end_if
     else
     end_if
     f32x4.add
     # Test correct parsing of instructions with / and : in them:
     # TODO: enable once instruction has been added.
     #i32x4.trunc_sat_f32x4_s
     i32.trunc_f32_s
-    try         except_ref
+    try         exnref
     i32.atomic.load 0
     atomic.notify 0
 .LBB0_3:
     catch
     local.set   0
     block       i32
     local.get   0
     br_on_exn   0, __cpp_exception

 # CHECK-NEXT:      end_block           # label2:
 # CHECK-NEXT:      if
 # CHECK-NEXT:      if          i32
 # CHECK-NEXT:      end_if
 # CHECK-NEXT:      else
 # CHECK-NEXT:      end_if
 # CHECK-NEXT:      f32x4.add
 # CHECK-NEXT:      i32.trunc_f32_s
-# CHECK-NEXT:      try         except_ref
+# CHECK-NEXT:      try         exnref
 # CHECK-NEXT:      i32.atomic.load 0
 # CHECK-NEXT:      atomic.notify 0
 # CHECK-NEXT:  .LBB0_3:
 # CHECK-NEXT:      catch
 # CHECK-NEXT:      local.set   0
 # CHECK-NEXT:      block       i32
 # CHECK-NEXT:      local.get   0
 # CHECK-NEXT:      br_on_exn   0, __cpp_exception

llvm/trunk/test/MC/WebAssembly/objdump.s

 # RUN: llvm-mc -triple=wasm32-unknown-unknown -filetype=obj -o %t.o -mattr=+simd128,+nontrapping-fptoint,+exception-handling < %s
 # RUN: llvm-objdump -triple=wasm32-unknown-unknown -disassemble %t.o | FileCheck %s
 
 test0:
     .functype   test0 (i32, i64) -> (i32)
     .local      f32, f64, v128, v128
     local.get   2
     end_function
 
 test1:
     .functype   test1 (i32, i64) -> (i32)
-    .local      i32, i64, except_ref
+    .local      i32, i64, exnref
     local.get   3
     end_function
 
 
 # CHECK-LABEL: CODE:
 # CHECK:             # 2 functions in section.
 # CHECK-LABEL: test0:
 # CHECK-NEXT:        .local  f32, f64, v128, v128
 # CHECK-NEXT:       9:       20 02  local.get 2
 # CHECK-NEXT:       b:       0b     end
 # CHECK-LABEL: test1:
-# CHECK-NEXT:        .local  i32, i64, except_ref
+# CHECK-NEXT:        .local  i32, i64, exnref
 # CHECK-NEXT:      14:       20 03  local.get 3
 # CHECK-NEXT:      16:       0b     end

llvm/trunk/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp

; predecessors: %bb.0
     successors: %bb.7
     liveins: $value_stack
     BR %bb.7, implicit-def $arguments
 
   bb.2 (landing-pad):
   ; predecessors: %bb.0
     successors: %bb.3, %bb.9
     liveins: $value_stack
-    %0:except_ref = CATCH implicit-def $arguments
+    %0:exnref = CATCH implicit-def $arguments
     CLEANUPRET implicit-def dead $arguments
 
   bb.3 (landing-pad):
   ; predecessors: %bb.2
     successors: %bb.4, %bb.6
     liveins: $value_stack
-    %1:except_ref = CATCH implicit-def $arguments
+    %1:exnref = CATCH implicit-def $arguments
     BR_IF %bb.4, %58:i32, implicit-def $arguments, implicit-def $value_stack, implicit $value_stack
     BR %bb.6, implicit-def $arguments
 
   bb.4:
   ; predecessors: %bb.3
     successors: %bb.5, %bb.8
     liveins: $value_stack
     BR %bb.5, implicit-def dead $arguments
body: |
   ; predecessors: %bb.5, %bb.1
     liveins: $value_stack
     RETURN_VOID implicit-def $arguments
 
   bb.8 (landing-pad):
   ; predecessors: %bb.4
     successors: %bb.9
     liveins: $value_stack
-    %2:except_ref = CATCH implicit-def $arguments
+    %2:exnref = CATCH implicit-def $arguments
     CLEANUPRET implicit-def dead $arguments
 
   bb.9 (landing-pad):
   ; predecessors: %bb.2, %bb.6, %bb.8
     liveins: $value_stack
-    %3:except_ref = CATCH implicit-def $arguments
+    %3:exnref = CATCH implicit-def $arguments
     CLEANUPRET implicit-def dead $arguments
 
   bb.10:
   ; predecessors: %bb.6
     liveins: $value_stack
     UNREACHABLE implicit-def $arguments
 )MIR";
 
bb.0:
     successors: %bb.9, %bb.1
     liveins: $arguments, $value_stack
     BR %bb.9, implicit-def dead $arguments
 
   bb.1 (landing-pad):
   ; predecessors: %bb.0
     successors: %bb.2, %bb.8
     liveins: $value_stack
-    %0:except_ref = CATCH implicit-def $arguments
+    %0:exnref = CATCH implicit-def $arguments
     BR_IF %bb.2, %32:i32, implicit-def $arguments, implicit-def $value_stack, implicit $value_stack
     BR %bb.8, implicit-def $arguments
 
   bb.2:
   ; predecessors: %bb.1
     successors: %bb.7, %bb.3, %bb.11
     liveins: $value_stack
     BR %bb.7, implicit-def dead $arguments
 
   bb.3 (landing-pad):
   ; predecessors: %bb.2
     successors: %bb.4, %bb.6
     liveins: $value_stack
-    %1:except_ref = CATCH implicit-def $arguments
+    %1:exnref = CATCH implicit-def $arguments
     BR_IF %bb.4, %43:i32, implicit-def $arguments, implicit-def $value_stack, implicit $value_stack
     BR %bb.6, implicit-def $arguments
 
   bb.4:
   ; predecessors: %bb.3
     successors: %bb.5, %bb.10
     liveins: $value_stack
     BR %bb.5, implicit-def dead $arguments
body: |
   ; predecessors: %bb.0, %bb.7
     liveins: $value_stack
     RETURN_VOID implicit-def $arguments
 
   bb.10 (landing-pad):
   ; predecessors: %bb.4
     successors: %bb.11
     liveins: $value_stack
-    %2:except_ref = CATCH implicit-def $arguments
+    %2:exnref = CATCH implicit-def $arguments
     CLEANUPRET implicit-def dead $arguments
 
   bb.11 (landing-pad):
   ; predecessors: %bb.2, %bb.6, %bb.10
     liveins: $value_stack
-    %3:except_ref = CATCH implicit-def $arguments
+    %3:exnref = CATCH implicit-def $arguments
     CLEANUPRET implicit-def dead $arguments
 
   bb.12:
   ; predecessors: %bb.6
     liveins: $value_stack
     UNREACHABLE implicit-def $arguments
 )MIR";
 

llvm/trunk/utils/TableGen/CodeGenTarget.cpp

StringRef llvm::getEnumName(MVT::SimpleValueType T) {
   case MVT::nxv2f64:  return "MVT::nxv2f64";
   case MVT::nxv4f64:  return "MVT::nxv4f64";
   case MVT::nxv8f64:  return "MVT::nxv8f64";
   case MVT::token:    return "MVT::token";
   case MVT::Metadata: return "MVT::Metadata";
   case MVT::iPTR:     return "MVT::iPTR";
   case MVT::iPTRAny:  return "MVT::iPTRAny";
   case MVT::Untyped:  return "MVT::Untyped";
-  case MVT::ExceptRef: return "MVT::ExceptRef";
+  case MVT::exnref:   return "MVT::exnref";
   default: llvm_unreachable("ILLEGAL VALUE TYPE!");
   }
 }
 
 /// getQualifiedName - Return the name of the specified record, with a
 /// namespace qualifier if the record contains one.
 ///
 std::string llvm::getQualifiedName(const Record *R) {