MC: AArch64: Add support for prel_g* relocation specifiers.

[pcc]

Summary

Depends on D64466

[peter.smith]

LGTM

llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

for (unsigned i = 0; i != AllowedModifiers.size(); ++i) {
       if (ELFRefKind == AllowedModifiers[i])
         return true;
     }
 
     return false;
   }
 
   bool isMovWSymbolG3() const {
-    return isMovWSymbol(AArch64MCExpr::VK_ABS_G3);
+    return isMovWSymbol({AArch64MCExpr::VK_ABS_G3, AArch64MCExpr::VK_PREL_G3});
   }
 
   bool isMovWSymbolG2() const {
     return isMovWSymbol(
         {AArch64MCExpr::VK_ABS_G2, AArch64MCExpr::VK_ABS_G2_S,
-         AArch64MCExpr::VK_ABS_G2_NC, AArch64MCExpr::VK_TPREL_G2,
+         AArch64MCExpr::VK_ABS_G2_NC, AArch64MCExpr::VK_PREL_G2,
+         AArch64MCExpr::VK_PREL_G2_NC, AArch64MCExpr::VK_TPREL_G2,
          AArch64MCExpr::VK_DTPREL_G2});
   }
 
   bool isMovWSymbolG1() const {
     return isMovWSymbol(
         {AArch64MCExpr::VK_ABS_G1, AArch64MCExpr::VK_ABS_G1_S,
-         AArch64MCExpr::VK_ABS_G1_NC, AArch64MCExpr::VK_GOTTPREL_G1,
+         AArch64MCExpr::VK_ABS_G1_NC, AArch64MCExpr::VK_PREL_G1,
+         AArch64MCExpr::VK_PREL_G1_NC, AArch64MCExpr::VK_GOTTPREL_G1,
          AArch64MCExpr::VK_TPREL_G1, AArch64MCExpr::VK_TPREL_G1_NC,
          AArch64MCExpr::VK_DTPREL_G1, AArch64MCExpr::VK_DTPREL_G1_NC});
   }
 
   bool isMovWSymbolG0() const {
     return isMovWSymbol(
         {AArch64MCExpr::VK_ABS_G0, AArch64MCExpr::VK_ABS_G0_S,
-         AArch64MCExpr::VK_ABS_G0_NC, AArch64MCExpr::VK_GOTTPREL_G0_NC,
+         AArch64MCExpr::VK_ABS_G0_NC, AArch64MCExpr::VK_PREL_G0,
+         AArch64MCExpr::VK_PREL_G0_NC, AArch64MCExpr::VK_GOTTPREL_G0_NC,
          AArch64MCExpr::VK_TPREL_G0, AArch64MCExpr::VK_TPREL_G0_NC,
          AArch64MCExpr::VK_DTPREL_G0, AArch64MCExpr::VK_DTPREL_G0_NC});
   }
 
   template<int RegWidth, int Shift>
   bool isMOVZMovAlias() const {
     if (!isImm()) return false;
 
RefKind = StringSwitch<AArch64MCExpr::VariantKind>(LowerCase)
                   .Case("abs_g2_s", AArch64MCExpr::VK_ABS_G2_S)
                   .Case("abs_g2_nc", AArch64MCExpr::VK_ABS_G2_NC)
                   .Case("abs_g1", AArch64MCExpr::VK_ABS_G1)
                   .Case("abs_g1_s", AArch64MCExpr::VK_ABS_G1_S)
                   .Case("abs_g1_nc", AArch64MCExpr::VK_ABS_G1_NC)
                   .Case("abs_g0", AArch64MCExpr::VK_ABS_G0)
                   .Case("abs_g0_s", AArch64MCExpr::VK_ABS_G0_S)
                   .Case("abs_g0_nc", AArch64MCExpr::VK_ABS_G0_NC)
+                  .Case("prel_g3", AArch64MCExpr::VK_PREL_G3)
+                  .Case("prel_g2", AArch64MCExpr::VK_PREL_G2)
+                  .Case("prel_g2_nc", AArch64MCExpr::VK_PREL_G2_NC)
+                  .Case("prel_g1", AArch64MCExpr::VK_PREL_G1)
+                  .Case("prel_g1_nc", AArch64MCExpr::VK_PREL_G1_NC)
+                  .Case("prel_g0", AArch64MCExpr::VK_PREL_G0)
+                  .Case("prel_g0_nc", AArch64MCExpr::VK_PREL_G0_NC)
                   .Case("dtprel_g2", AArch64MCExpr::VK_DTPREL_G2)
                   .Case("dtprel_g1", AArch64MCExpr::VK_DTPREL_G1)
                   .Case("dtprel_g1_nc", AArch64MCExpr::VK_DTPREL_G1_NC)
                   .Case("dtprel_g0", AArch64MCExpr::VK_DTPREL_G0)
                   .Case("dtprel_g0_nc", AArch64MCExpr::VK_DTPREL_G0_NC)
                   .Case("dtprel_hi12", AArch64MCExpr::VK_DTPREL_HI12)
                   .Case("dtprel_lo12", AArch64MCExpr::VK_DTPREL_LO12)
                   .Case("dtprel_lo12_nc", AArch64MCExpr::VK_DTPREL_LO12_NC)

llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp

case AArch64::fixup_aarch64_movw:
       if (RefKind == AArch64MCExpr::VK_ABS_G1_NC)
         return ELF::R_AARCH64_MOVW_UABS_G1_NC;
       if (RefKind == AArch64MCExpr::VK_ABS_G0)
         return R_CLS(MOVW_UABS_G0);
       if (RefKind == AArch64MCExpr::VK_ABS_G0_S)
         return R_CLS(MOVW_SABS_G0);
       if (RefKind == AArch64MCExpr::VK_ABS_G0_NC)
         return R_CLS(MOVW_UABS_G0_NC);
+      if (RefKind == AArch64MCExpr::VK_PREL_G3)
+        return ELF::R_AARCH64_MOVW_PREL_G3;
+      if (RefKind == AArch64MCExpr::VK_PREL_G2)
+        return ELF::R_AARCH64_MOVW_PREL_G2;
+      if (RefKind == AArch64MCExpr::VK_PREL_G2_NC)
+        return ELF::R_AARCH64_MOVW_PREL_G2_NC;
+      if (RefKind == AArch64MCExpr::VK_PREL_G1)
+        return R_CLS(MOVW_PREL_G1);
+      if (RefKind == AArch64MCExpr::VK_PREL_G1_NC)
+        return ELF::R_AARCH64_MOVW_PREL_G1_NC;
+      if (RefKind == AArch64MCExpr::VK_PREL_G0)
+        return R_CLS(MOVW_PREL_G0);
+      if (RefKind == AArch64MCExpr::VK_PREL_G0_NC)
+        return R_CLS(MOVW_PREL_G0_NC);
       if (RefKind == AArch64MCExpr::VK_DTPREL_G2)
         return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G2;
       if (RefKind == AArch64MCExpr::VK_DTPREL_G1)
         return R_CLS(TLSLD_MOVW_DTPREL_G1);
       if (RefKind == AArch64MCExpr::VK_DTPREL_G1_NC)
         return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC;
       if (RefKind == AArch64MCExpr::VK_DTPREL_G0)
         return R_CLS(TLSLD_MOVW_DTPREL_G0);

llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h

 class AArch64MCExpr : public MCTargetExpr {
 public:
   enum VariantKind {
     // Symbol locations specifying (roughly speaking) what calculation should be
     // performed to construct the final address for the relocated
     // symbol. E.g. direct, via the GOT, ...
     VK_ABS      = 0x001,
     VK_SABS     = 0x002,
-    VK_GOT      = 0x003,
-    VK_DTPREL   = 0x004,
-    VK_GOTTPREL = 0x005,
-    VK_TPREL    = 0x006,
-    VK_TLSDESC  = 0x007,
-    VK_SECREL   = 0x008,
+    VK_PREL     = 0x003,
+    VK_GOT      = 0x004,
+    VK_DTPREL   = 0x005,
+    VK_GOTTPREL = 0x006,
+    VK_TPREL    = 0x007,
+    VK_TLSDESC  = 0x008,
+    VK_SECREL   = 0x009,
     VK_SymLocBits = 0x00f,
 
     // Variants specifying which part of the final address calculation is
     // used. E.g. the low 12 bits for an ADD/LDR, the middle 16 bits for a
     // MOVZ/MOVK.
     VK_PAGE     = 0x010,
     VK_PAGEOFF  = 0x020,
     VK_HI12     = 0x030,
enum VariantKind {
     VK_ABS_G2_NC         = VK_ABS      | VK_G2      | VK_NC,
     VK_ABS_G1            = VK_ABS      | VK_G1,
     VK_ABS_G1_S          = VK_SABS     | VK_G1,
     VK_ABS_G1_NC         = VK_ABS      | VK_G1      | VK_NC,
     VK_ABS_G0            = VK_ABS      | VK_G0,
     VK_ABS_G0_S          = VK_SABS     | VK_G0,
     VK_ABS_G0_NC         = VK_ABS      | VK_G0      | VK_NC,
     VK_LO12              = VK_ABS      | VK_PAGEOFF | VK_NC,
+    VK_PREL_G3           = VK_PREL     | VK_G3,
+    VK_PREL_G2           = VK_PREL     | VK_G2,
+    VK_PREL_G2_NC        = VK_PREL     | VK_G2      | VK_NC,
+    VK_PREL_G1           = VK_PREL     | VK_G1,
+    VK_PREL_G1_NC        = VK_PREL     | VK_G1      | VK_NC,
+    VK_PREL_G0           = VK_PREL     | VK_G0,
+    VK_PREL_G0_NC        = VK_PREL     | VK_G0      | VK_NC,
     VK_GOT_LO12          = VK_GOT      | VK_PAGEOFF | VK_NC,
     VK_GOT_PAGE          = VK_GOT      | VK_PAGE,
     VK_DTPREL_G2         = VK_DTPREL   | VK_G2,
     VK_DTPREL_G1         = VK_DTPREL   | VK_G1,
     VK_DTPREL_G1_NC      = VK_DTPREL   | VK_G1      | VK_NC,
     VK_DTPREL_G0         = VK_DTPREL   | VK_G0,
     VK_DTPREL_G0_NC      = VK_DTPREL   | VK_G0      | VK_NC,
     VK_DTPREL_HI12       = VK_DTPREL   | VK_HI12,

llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp

StringRef AArch64MCExpr::getVariantKindName() const {
   case VK_ABS_G2_S:            return ":abs_g2_s:";
   case VK_ABS_G2_NC:           return ":abs_g2_nc:";
   case VK_ABS_G1:              return ":abs_g1:";
   case VK_ABS_G1_S:            return ":abs_g1_s:";
   case VK_ABS_G1_NC:           return ":abs_g1_nc:";
   case VK_ABS_G0:              return ":abs_g0:";
   case VK_ABS_G0_S:            return ":abs_g0_s:";
   case VK_ABS_G0_NC:           return ":abs_g0_nc:";
+  case VK_PREL_G3:             return ":prel_g3:";
+  case VK_PREL_G2:             return ":prel_g2:";
+  case VK_PREL_G2_NC:          return ":prel_g2_nc:";
+  case VK_PREL_G1:             return ":prel_g1:";
+  case VK_PREL_G1_NC:          return ":prel_g1_nc:";
+  case VK_PREL_G0:             return ":prel_g0:";
+  case VK_PREL_G0_NC:          return ":prel_g0_nc:";
   case VK_DTPREL_G2:           return ":dtprel_g2:";
   case VK_DTPREL_G1:           return ":dtprel_g1:";
   case VK_DTPREL_G1_NC:        return ":dtprel_g1_nc:";
   case VK_DTPREL_G0:           return ":dtprel_g0:";
   case VK_DTPREL_G0_NC:        return ":dtprel_g0_nc:";
   case VK_DTPREL_HI12:         return ":dtprel_hi12:";
   case VK_DTPREL_LO12:         return ":dtprel_lo12:";
   case VK_DTPREL_LO12_NC:      return ":dtprel_lo12_nc:";

llvm/test/MC/AArch64/arm64-large-relocs.s

 // RUN: llvm-mc -triple=arm64-linux-gnu -show-encoding -o - %s | FileCheck %s
 // RUN: llvm-mc -triple=arm64-linux-gnu -show-encoding -filetype=obj -o - %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-OBJ %s
 
         movz x2, #:abs_g0:sym
         movk w3, #:abs_g0_nc:sym
+        movz x2, #:prel_g0:sym
+        movk w3, #:prel_g0_nc:sym
 // CHECK: movz    x2, #:abs_g0:sym        // encoding: [0bAAA00010,A,0b100AAAAA,0xd2]
 // CHECK-NEXT:                            //   fixup A - offset: 0, value: :abs_g0:sym, kind: fixup_aarch64_movw
 // CHECK: movk     w3, #:abs_g0_nc:sym    // encoding: [0bAAA00011,A,0b100AAAAA,0x72]
 // CHECK-NEXT:                            //   fixup A - offset: 0, value: :abs_g0_nc:sym, kind: fixup_aarch64_movw
+// CHECK: movz    x2, #:prel_g0:sym       // encoding: [0bAAA00010,A,0b100AAAAA,0xd2]
+// CHECK-NEXT:                            //   fixup A - offset: 0, value: :prel_g0:sym, kind: fixup_aarch64_movw
+// CHECK: movk     w3, #:prel_g0_nc:sym   // encoding: [0bAAA00011,A,0b100AAAAA,0x72]
+// CHECK-NEXT:                            //   fixup A - offset: 0, value: :prel_g0_nc:sym, kind: fixup_aarch64_movw
 
 // CHECK-OBJ: 0 R_AARCH64_MOVW_UABS_G0 sym
 // CHECK-OBJ: 4 R_AARCH64_MOVW_UABS_G0_NC sym
+// CHECK-OBJ: 8 R_AARCH64_MOVW_PREL_G0 sym
+// CHECK-OBJ: c R_AARCH64_MOVW_PREL_G0_NC sym
 
         movz x4, #:abs_g1:sym
         movk w5, #:abs_g1_nc:sym
+        movz x4, #:prel_g1:sym
+        movk w5, #:prel_g1_nc:sym
 // CHECK: movz     x4, #:abs_g1:sym       // encoding: [0bAAA00100,A,0b101AAAAA,0xd2]
 // CHECK-NEXT:                            //   fixup A - offset: 0, value: :abs_g1:sym, kind: fixup_aarch64_movw
 // CHECK: movk     w5, #:abs_g1_nc:sym    // encoding: [0bAAA00101,A,0b101AAAAA,0x72]
 // CHECK-NEXT:                            //   fixup A - offset: 0, value: :abs_g1_nc:sym, kind: fixup_aarch64_movw
-
-// CHECK-OBJ: 8 R_AARCH64_MOVW_UABS_G1 sym
-// CHECK-OBJ: c R_AARCH64_MOVW_UABS_G1_NC sym
+// CHECK: movz     x4, #:prel_g1:sym      // encoding: [0bAAA00100,A,0b101AAAAA,0xd2]
+// CHECK-NEXT:                            //   fixup A - offset: 0, value: :prel_g1:sym, kind: fixup_aarch64_movw
+// CHECK: movk     w5, #:prel_g1_nc:sym   // encoding: [0bAAA00101,A,0b101AAAAA,0x72]
+// CHECK-NEXT:                            //   fixup A - offset: 0, value: :prel_g1_nc:sym, kind: fixup_aarch64_movw
+
+// CHECK-OBJ: 10 R_AARCH64_MOVW_UABS_G1 sym
+// CHECK-OBJ: 14 R_AARCH64_MOVW_UABS_G1_NC sym
+// CHECK-OBJ: 18 R_AARCH64_MOVW_PREL_G1 sym
+// CHECK-OBJ: 1c R_AARCH64_MOVW_PREL_G1_NC sym
 
         movz x6, #:abs_g2:sym
         movk x7, #:abs_g2_nc:sym
+        movz x6, #:prel_g2:sym
+        movk x7, #:prel_g2_nc:sym
 // CHECK: movz     x6, #:abs_g2:sym       // encoding: [0bAAA00110,A,0b110AAAAA,0xd2]
 // CHECK-NEXT:                            //   fixup A - offset: 0, value: :abs_g2:sym, kind: fixup_aarch64_movw
 // CHECK: movk     x7, #:abs_g2_nc:sym    // encoding: [0bAAA00111,A,0b110AAAAA,0xf2]
 // CHECK-NEXT:                            //   fixup A - offset: 0, value: :abs_g2_nc:sym, kind: fixup_aarch64_movw
-
-// CHECK-OBJ: 10 R_AARCH64_MOVW_UABS_G2 sym
-// CHECK-OBJ: 14 R_AARCH64_MOVW_UABS_G2_NC sym
+// CHECK: movz     x6, #:prel_g2:sym      // encoding: [0bAAA00110,A,0b110AAAAA,0xd2]
+// CHECK-NEXT:                            //   fixup A - offset: 0, value: :prel_g2:sym, kind: fixup_aarch64_movw
+// CHECK: movk     x7, #:prel_g2_nc:sym   // encoding: [0bAAA00111,A,0b110AAAAA,0xf2]
+// CHECK-NEXT:                            //   fixup A - offset: 0, value: :prel_g2_nc:sym, kind: fixup_aarch64_movw
+
+// CHECK-OBJ: 20 R_AARCH64_MOVW_UABS_G2 sym
+// CHECK-OBJ: 24 R_AARCH64_MOVW_UABS_G2_NC sym
+// CHECK-OBJ: 28 R_AARCH64_MOVW_PREL_G2 sym
+// CHECK-OBJ: 2c R_AARCH64_MOVW_PREL_G2_NC sym
 
         movz x8, #:abs_g3:sym
+        movz x8, #:prel_g3:sym
 // CHECK: movz     x8, #:abs_g3:sym       // encoding: [0bAAA01000,A,0b111AAAAA,0xd2]
 // CHECK-NEXT:                            //   fixup A - offset: 0, value: :abs_g3:sym, kind: fixup_aarch64_movw
+// CHECK: movz     x8, #:prel_g3:sym      // encoding: [0bAAA01000,A,0b111AAAAA,0xd2]
+// CHECK-NEXT:                            //   fixup A - offset: 0, value: :prel_g3:sym, kind: fixup_aarch64_movw
 
-// CHECK-OBJ: 18 R_AARCH64_MOVW_UABS_G3 sym
+// CHECK-OBJ: 30 R_AARCH64_MOVW_UABS_G3 sym
+// CHECK-OBJ: 34 R_AARCH64_MOVW_PREL_G3 sym