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[MIR] Skip hoisting to throwable or return machine basic blocks
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Authored by anton-afanasyev on Jun 11 2019, 10:05 AM.

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Details

Reviewers

john.brawn
RKSimon
MatzeB

Commits

rG339b39b77337: [MIR] Skip hoisting to basic block which may throw exception or return
rL363164: [MIR] Skip hoisting to basic block which may throw exception or return

Summary

Fix hoisting to basic block which are not legal for hoisting cause
it can be terminated by exception or it is return block.

Diff Detail

Repository

rG LLVM Github Monorepo

Build Status

Buildable 33225
Build 33224: arc lint + arc unit

Event Timeline

anton-afanasyev created this revision.Jun 11 2019, 10:05 AM

Herald added a project: Restricted Project. · View Herald TranscriptJun 11 2019, 10:05 AM

Herald added subscribers: llvm-commits, hiraditya. · View Herald Transcript

Harbormaster completed remote builds in B33215: Diff 204094.Jun 11 2019, 10:05 AM

Missing a test

In D63148#1538399, @lebedev.ri wrote:

Missing a test

Thanks, updating.

Add test

Herald added a subscriber: javed.absar. · View Herald TranscriptJun 11 2019, 10:47 AM

Harbormaster completed remote builds in B33223: Diff 204109.Jun 11 2019, 10:47 AM

Update description

Harbormaster completed remote builds in B33225: Diff 204123.Jun 11 2019, 11:43 AM

LGTM.

This revision is now accepted and ready to land.Jun 12 2019, 4:46 AM

Closed by commit rL363164: [MIR] Skip hoisting to basic block which may throw exception or return (authored by anton-afanasyev). · Explain WhyJun 12 2019, 6:48 AM

This revision was automatically updated to reflect the committed changes.

Revision Contents

Path

Size

llvm/

lib/

CodeGen/

MachineCSE.cpp

2 lines

test/

CodeGen/

AArch64/

machine_cse_illegal_hoist.ll

52 lines

Diff 204123

llvm/lib/CodeGen/MachineCSE.cpp

Show First 20 Lines • Show All 793 Lines • ▼ Show 20 Lines	if (!PREMap.count(MI)) {
continue;		continue;
}		}

auto MBB1 = PREMap[MI];		auto MBB1 = PREMap[MI];
assert(		assert(
!DT->properlyDominates(MBB, MBB1) &&		!DT->properlyDominates(MBB, MBB1) &&
"MBB cannot properly dominate MBB1 while DFS through dominators tree!");		"MBB cannot properly dominate MBB1 while DFS through dominators tree!");
auto CMBB = DT->findNearestCommonDominator(MBB, MBB1);		auto CMBB = DT->findNearestCommonDominator(MBB, MBB1);
		if (!CMBB->isLegalToHoistInto())
		continue;

// Two instrs are partial redundant if their basic blocks are reachable		// Two instrs are partial redundant if their basic blocks are reachable
// from one to another but one doesn't dominate another.		// from one to another but one doesn't dominate another.
if (CMBB != MBB1) {		if (CMBB != MBB1) {
auto BB = MBB->getBasicBlock(), BB1 = MBB1->getBasicBlock();		auto BB = MBB->getBasicBlock(), BB1 = MBB1->getBasicBlock();
if (BB != nullptr && BB1 != nullptr &&		if (BB != nullptr && BB1 != nullptr &&
(isPotentiallyReachable(BB1, BB) \|\|		(isPotentiallyReachable(BB1, BB) \|\|
isPotentiallyReachable(BB, BB1))) {		isPotentiallyReachable(BB, BB1))) {
▲ Show 20 Lines • Show All 60 Lines • Show Last 20 Lines

llvm/test/CodeGen/AArch64/machine_cse_illegal_hoist.ll

This file was added.

				; RUN: llc -O3 < %s \| FileCheck %s
				;
				; Check ADRP instr is not hoisted to entry basic block
				; which may throw exception.
				;
				; CHECK: adrp
				; CHECK: adrp
				; CHECK: adrp

				target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
				target triple = "aarch64-arm-none-eabi"

				@var = hidden local_unnamed_addr global i32 0, align 4
				@_ZTIi = external dso_local constant i8*
				declare dso_local void @_Z2fnv() local_unnamed_addr #1
				declare dso_local i32 @__gxx_personality_v0(...)
				declare i32 @llvm.eh.typeid.for(i8*) #2
				declare dso_local i8* @__cxa_begin_catch(i8*) local_unnamed_addr
				declare dso_local void @__cxa_end_catch() local_unnamed_addr

				define hidden i32 @_Z7examplev() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
				entry:
				invoke void @_Z2fnv() to label %try.cont unwind label %lpad

				lpad: ; preds = %entry
				%0 = landingpad { i8*, i32 }
				catch i8* bitcast (i8** @_ZTIi to i8*)
				catch i8* null
				%1 = extractvalue { i8*, i32 } %0, 0
				%2 = extractvalue { i8*, i32 } %0, 1
				%3 = tail call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIi to i8*))
				%matches = icmp eq i32 %2, %3
				%4 = tail call i8* @__cxa_begin_catch(i8* %1)
				%5 = load i32, i32* @var, align 4
				br i1 %matches, label %catch1, label %catch

				catch1: ; preds = %lpad
				%or3 = or i32 %5, 4
				store i32 %or3, i32* @var, align 4
				tail call void @__cxa_end_catch()
				br label %try.cont

				try.cont: ; preds = %entry, %catch1, %catch
				%6 = load i32, i32* @var, align 4
				ret i32 %6

				catch: ; preds = %lpad
				%or = or i32 %5, 8
				store i32 %or, i32* @var, align 4
				tail call void @__cxa_end_catch()
				br label %try.cont
				}