llvm updated the function from llvm::codeview::getRegisterNames() to llvm::codeview::getRegisterNames(CPUType)
according to the function implementation, there are only two different register number list: ARM64 for ARM64, X64 for all others
the backends for arm64 and aarch64 are merged so from lldb side, aarch64 will have llvm::codeview::CPUType::ARM64
and others will set CPUType to llvm::codeview::CPUType::X64 for now
Details
Details
Diff Detail
Diff Detail
- Repository
- rLLDB LLDB
Event Timeline
lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp | ||
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32 | break here |
lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp | ||
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32 | omg thx |
Comment Actions
As I said on the other patch, I don't believe this belongs in LLDB. Otherwise, you require every user of codeview to maintain and update an accurate mapping of targets currently supported by llvm::codeview. Instead, this should be part of codeview API.
Space after the switch.