[NFC] Check the endianness after the CodeGenPrepare

[steven.zhang]

Summary

This test case was added by https://reviews.llvm.org/D44396 to check the endianness to make sure that, splitMergedValStore works as expected. And it checks the endianness basing on the assembly instructions.

The patch in https://reviews.llvm.org/D61843 is trying to combine some stores into one with some conditions. And for this case, the splitMergedValStore will split the stores, and the split stores matches the pattern of D61843, which result in the check failed.

Therefore, I commit this NFC patch to do the endianness check after CodeGenPrepare to avoid the interfere from later transformation.

[RKSimon]

@jonpa Any comments?

[steven.zhang]

Hi @jonpa
As https://reviews.llvm.org/D61843 is approved but blocking by this patch, would you please help me review the change ? Thank you !

[RKSimon]

@uweigand Any comments? @jonpa seems to be away at the moment I think?

[uweigand]

I agree this still checks the same thing, so the patch LGTM.

[RKSimon]

@steven.zhang I think you've gotten the parent-child the wrong way around for this and D61843 - my request was that this gets committed first and then D61843 is rebased so it shows the diff in codegenprepare-splitstore.ll

[steven.zhang]

I have never used the children-parent before. I just add it as parent revision now, no more action. This is what I want to do:

1. commit this patch.
2. rebase the parent revision patch and commit it. (I need to update the patch for that revision in theory)

Do you mean that, phabricator has some method that, I don't need to update the patch for the parent revision ?

[RKSimon]

This was committed at rL362471

llvm/test/CodeGen/SystemZ/codegenprepare-splitstore.ll

 ; Test that CodeGenPrepare respects endianness when splitting a store.
 ;
-; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -force-split-store < %s  | FileCheck %s
+; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -stop-after codegenprepare -force-split-store < %s  | FileCheck %s
 
 define void @fun(i16* %Src, i16* %Dst) {
-; CHECK-LABEL: # %bb.0:
-; CHECK:       lh   %r0, 0(%r2)
-; CHECK-NEXT:  stc  %r0, 1(%r3)
-; CHECK-NEXT:  srl  %r0, 8
-; CHECK-NEXT:  stc  %r0, 0(%r3)
-; CHECK-NEXT:  br   %r14
+; CHECK-LABEL: @fun(
+; CHECK:      %1 = load i16, i16* %Src
+; CHECK-NEXT: %2 = trunc i16 %1 to i8
+; CHECK-NEXT: %3 = lshr i16 %1, 8
+; CHECK-NEXT: %4 = trunc i16 %3 to i8
+; CHECK-NEXT: %5 = zext i8 %2 to i16
+; CHECK-NEXT: %6 = zext i8 %4 to i16
+; CHECK-NEXT: %7 = shl nuw i16 %6, 8
+; CHECK-NEXT: %8 = or i16 %7, %5
+; CHECK-NEXT: %9 = bitcast i16* %Dst to i8*
+; CHECK-NEXT: %10 = getelementptr i8, i8* %9, i32 1
+; CHECK-NEXT: store i8 %2, i8* %10
+; CHECK-NEXT: %11 = bitcast i16* %Dst to i8*
+; CHECK-NEXT: store i8 %4, i8* %11
   %1 = load i16, i16* %Src
   %2 = trunc i16 %1 to i8
   %3 = lshr i16 %1, 8
   %4 = trunc i16 %3 to i8
   %5 = zext i8 %2 to i16
   %6 = zext i8 %4 to i16
   %7 = shl nuw i16 %6, 8
   %8 = or i16 %7, %5
   store i16 %8, i16* %Dst
   ret void
 }