[ARM] Select fp16 fsqrt

[dmgreen]

Summary

Adds a pattern for the intrinsic, the same as float and double.

[SjoerdMeijer]

LGTM

llvm/trunk/lib/Target/ARM/ARMInstrVFP.td

 
 def VSQRTS : ASuI<0b11101, 0b11, 0b0001, 0b11, 0,
                   (outs SPR:$Sd), (ins SPR:$Sm),
                   IIC_fpSQRT32, "vsqrt", ".f32\t$Sd, $Sm",
                   [(set SPR:$Sd, (fsqrt SPR:$Sm))]>,
              Sched<[WriteFPSQRT32]>;
 
 def VSQRTH : AHuI<0b11101, 0b11, 0b0001, 0b11, 0,
-                  (outs SPR:$Sd), (ins SPR:$Sm),
+                  (outs HPR:$Sd), (ins HPR:$Sm),
                   IIC_fpSQRT16, "vsqrt", ".f16\t$Sd, $Sm",
-                  []>;
+                  [(set HPR:$Sd, (fsqrt (f16 HPR:$Sm)))]>;
 
 let hasSideEffects = 0 in {
 let isMoveReg = 1 in {
 def VMOVD  : ADuI<0b11101, 0b11, 0b0000, 0b01, 0,
                   (outs DPR:$Dd), (ins DPR:$Dm),
                   IIC_fpUNA64, "vmov", ".f64\t$Dd, $Dm", []>;
 
 def VMOVS  : ASuI<0b11101, 0b11, 0b0000, 0b01, 0,

llvm/trunk/test/CodeGen/ARM/fp16-fullfp16.ll

 ; CHECK-LABEL: test_bitcast_i16tohalf:
 ; CHECK:         strh r0, [r1]
 ; CHECK-NEXT:    bx lr
   %r = bitcast i16 %a to half
   store half %r, half* %p
   ret void
 }
 
-; FIXME
-;define void @test_sqrt(half* %p) {
-;  %a = load half, half* %p, align 2
-;  %r = call half @llvm.sqrt.f16(half %a)
-;  store half %r, half* %p
-;  ret void
-;}
+define void @test_sqrt(half* %p) {
+; CHECK-LABEL: test_sqrt:
+; CHECK:         vldr.16 s0, [r0]
+; CHECK-NEXT:    vsqrt.f16 s0, s0
+; CHECK-NEXT:    vstr.16 s0, [r0]
+; CHECK-NEXT:    bx lr
+  %a = load half, half* %p, align 2
+  %r = call half @llvm.sqrt.f16(half %a)
+  store half %r, half* %p
+  ret void
+}
 
 ; FIXME
 ;define void @test_fpowi(half* %p, i32 %b) {
 ;  %a = load half, half* %p, align 2
 ;  %r = call half @llvm.powi.f16(half %a, i32 %b)
 ;  store half %r, half* %p
 ;  ret void
 ;}