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[PowerPC] Emit XXSEL for vec_sel and code that has the same pattern
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Authored by nemanjai on May 7 2019, 2:56 PM.

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rL LLVM

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nemanjai created this revision.May 7 2019, 2:56 PM
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nemanjai updated this revision to Diff 198539.May 7 2019, 3:00 PM

Add tests for some other types as well.

shawnl added a subscriber: shawnl.May 9 2019, 7:46 PM

I like that this also optimizes the case where C is a not

vec_sel(a, b, ~c) => vec_sel(b, a, c)

jsji added a comment.May 9 2019, 8:59 PM

Have we thought about adding support in DAGCombine or even InstCombine to combine into ISD::VSELECT too?

lib/Target/PowerPC/PPCInstrVSX.td
964 ↗(On Diff #198539)

Why we need this pattern? and should be a commutable op?

test/CodeGen/PowerPC/vec-select.ll
24 ↗(On Diff #198539)

I think it would be better if we swap %neg.i, %a to test commutable patterns.

26 ↗(On Diff #198539)

I think it would be better if we swap %and.i, %and1.i to test commutable patterns.

41 ↗(On Diff #198539)

How about adding a test of <2 x i64> for vector double too?
And maybe <4 x i1> as a negative test?

nemanjai marked 8 inline comments as done.Jun 6 2019, 8:00 PM
nemanjai added inline comments.
lib/Target/PowerPC/PPCInstrVSX.td
964 ↗(On Diff #198539)

No good reason. I put it in to be safe in case ISEL somehow doesn't match a commuted pattern. That doesn't appear to happen so I'll remove it.

test/CodeGen/PowerPC/vec-select.ll
24 ↗(On Diff #198539)

OK.

26 ↗(On Diff #198539)

OK. I swapped the operands of the and on one and the operands of the or on another.

41 ↗(On Diff #198539)

Will do.

nemanjai updated this revision to Diff 203480.Jun 6 2019, 8:03 PM
nemanjai marked 4 inline comments as done.

Removed redundant pattern.
Added commuted tests, a v2i64 test and a negative (v4i1) test.

jsji added a comment.Jun 7 2019, 7:10 AM

LGTM. Thanks for fixing!

jsji accepted this revision.Jun 7 2019, 7:10 AM
This revision is now accepted and ready to land.Jun 7 2019, 7:10 AM
This revision was automatically updated to reflect the committed changes.