[RISCV] Replace map with set in getReqFeatures

[sabuasal]

Summary

Use a set in getReqFeatures() in RISCVCompressInstEmitter instead of a map
because the index we save is not needed.

This also fixes bug 41666.

[asb]

LGTM!

[nickdesaulniers]

#include <set>

[asb]

Hi @sabuasal - are you happy to commit this? (Nick's suggestion to add #include <set> is of course a good one too).

[sabuasal]

Hi @asb

Apologies for the late response

Thanks fr the review, I'll add the include and commit.

llvm/trunk/utils/TableGen/RISCVCompressInstEmitter.cpp

 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
 #include "llvm/TableGen/TableGenBackend.h"
+#include <set>
 #include <vector>
 using namespace llvm;
 
 #define DEBUG_TYPE "compress-inst-emitter"
 
 namespace {
 class RISCVCompressInstEmitter {
   struct OpData {
void RISCVCompressInstEmitter::evaluateCompressPat(Record *Rec) {
   copy_if(RF, std::back_inserter(PatReqFeatures), [](Record *R) {
     return R->getValueAsBit("AssemblerMatcherPredicate");
   });
 
   CompressPatterns.push_back(CompressPat(SourceInst, DestInst, PatReqFeatures,
                                          SourceOperandMap, DestOperandMap));
 }
 
-static void getReqFeatures(std::map<StringRef, int> &FeaturesMap,
+static void getReqFeatures(std::set<StringRef> &FeaturesSet,
                            const std::vector<Record *> &ReqFeatures) {
   for (auto &R : ReqFeatures) {
     StringRef AsmCondString = R->getValueAsString("AssemblerCondString");
 
     // AsmCondString has syntax [!]F(,[!]F)*
     SmallVector<StringRef, 4> Ops;
     SplitString(AsmCondString, Ops, ",");
     assert(!Ops.empty() && "AssemblerCondString cannot be empty");
-
     for (auto &Op : Ops) {
       assert(!Op.empty() && "Empty operator");
-      if (FeaturesMap.find(Op) == FeaturesMap.end())
-        FeaturesMap[Op] = FeaturesMap.size();
+      FeaturesSet.insert(Op);
     }
   }
 }
 
 unsigned getMCOpPredicate(DenseMap<const Record *, unsigned> &MCOpPredicateMap,
                           std::vector<const Record *> &MCOpPredicates,
                           Record *Rec) {
   unsigned Entry = MCOpPredicateMap[Rec];
for (auto &CompressPat : CompressPatterns) {
     CurOp = Source.TheDef->getName().str();
     // Check current and previous opcode to decide to continue or end a case.
     if (CurOp != PrevOp) {
       if (PrevOp != "")
         CaseStream.indent(6) << "break;\n    } // case " + PrevOp + "\n";
       CaseStream.indent(4) << "case " + Namespace + "::" + CurOp + ": {\n";
     }
 
-    std::map<StringRef, int> FeaturesMap;
+    std::set<StringRef> FeaturesSet;
     // Add CompressPat required features.
-    getReqFeatures(FeaturesMap, CompressPat.PatReqFeatures);
+    getReqFeatures(FeaturesSet, CompressPat.PatReqFeatures);
 
     // Add Dest instruction required features.
     std::vector<Record *> ReqFeatures;
     std::vector<Record *> RF = Dest.TheDef->getValueAsListOfDefs("Predicates");
     copy_if(RF, std::back_inserter(ReqFeatures), [](Record *R) {
       return R->getValueAsBit("AssemblerMatcherPredicate");
     });
-    getReqFeatures(FeaturesMap, ReqFeatures);
+    getReqFeatures(FeaturesSet, ReqFeatures);
 
     // Emit checks for all required features.
-    for (auto &F : FeaturesMap) {
-      StringRef Op = F.first;
+    for (auto &Op : FeaturesSet) {
       if (Op[0] == '!')
         CondStream.indent(6) << ("!STI.getFeatureBits()[" + Namespace +
                                  "::" + Op.substr(1) + "]")
                                         .str() +
                                     " &&\n";
       else
         CondStream.indent(6)
             << ("STI.getFeatureBits()[" + Namespace + "::" + Op + "]").str() +