[AMDGPU][MC] Enabled generic constant expressions as operands

[dp]

Summary

See bug 40873: https://bugs.llvm.org/show_bug.cgi?id=40873

Before this change assembler required constant expressions to start with a number, for example:

x = 1
v_or3_b32 v1, v2, v3, 1+x         // ok
v_or3_b32 v1, v2, v3, x+1         // error
v_ceil_f32 v1, abs(1+x)           // ok
v_ceil_f32 v1, abs(x+1)           // error

This fix enables to use arbitrary constant expressions with generic imm operands and operands of VOP modifiers like abs(...) and neg(...):

x = 1
v_or3_b32 v1, v2, v3, 1+x         // ok
v_or3_b32 v1, v2, v3, x+1         // ok
v_ceil_f32 v1, abs(1+x)           // ok
v_ceil_f32 v1, abs(x+1)           // ok

Some syntactic sugar constructs like hwreg(...) still expect constant expressions to start with a number; this will be fixed separately. See bug 40820: https://bugs.llvm.org/show_bug.cgi?id=40820

[artem.tamazov]

LGTM. Recommendation: it would be nice if error message will be more descriptive (where is does not require too much work)

test/MC/AMDGPU/expressions.s

9 ↗

(On Diff #195347)

Can we be more descriptive in the message? like "error: Floating-point expressions are not supported"?

[dp]

test/MC/AMDGPU/expressions.s

9 ↗

(On Diff #195347)

In theory we can improve error message by looking at the next token. If the token is a binary operator like '*' the whole thing looks like a floating-point expression which we do not support.

However, there are some issues with this approach:

1. We have a lot of binary operators to check - see https://llvm.org/docs/AMDGPUOperandSyntax.html#binary-operators
2. Operands do not have to be separated with commas, spaces are allowed as well. As a result, we may be unable to distinguish an expression from two separate operands, for example:

s_sub_u32 s0, -1.0 + 1     // assembled ok!

This code is equivalent to the following:

s_sub_u32 s0, -1.0, + 1

llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

bool isVCSrcF16() const {
     return isRegOrInlineNoMods(AMDGPU::VS_32RegClassID, MVT::f16);
   }
 
   bool isVCSrcV2F16() const {
     return isVCSrcF16();
   }
 
   bool isVSrcB32() const {
-    return isVCSrcF32() || isLiteralImm(MVT::i32);
+    return isVCSrcF32() || isLiteralImm(MVT::i32) || isExpr();
   }
 
   bool isVSrcB64() const {
     return isVCSrcF64() || isLiteralImm(MVT::i64);
   }
 
   bool isVSrcB16() const {
     return isVCSrcF16() || isLiteralImm(MVT::i16);
   }
 
   bool isVSrcV2B16() const {
     return isVSrcB16() || isLiteralImm(MVT::v2i16);
   }
 
   bool isVSrcF32() const {
-    return isVCSrcF32() || isLiteralImm(MVT::f32);
+    return isVCSrcF32() || isLiteralImm(MVT::f32) || isExpr();
   }
 
   bool isVSrcF64() const {
     return isVCSrcF64() || isLiteralImm(MVT::f64);
   }
 
   bool isVSrcF16() const {
     return isVCSrcF16() || isLiteralImm(MVT::f16);
OperandMatchResultTy parseOperandArrayWithPrefix(
     bool (*ConvertResult)(int64_t&) = nullptr);
 
   OperandMatchResultTy
   parseNamedBit(const char *Name, OperandVector &Operands,
                 AMDGPUOperand::ImmTy ImmTy = AMDGPUOperand::ImmTyNone);
   OperandMatchResultTy parseStringWithPrefix(StringRef Prefix,
                                              StringRef &Value);
 
-  bool parseAbsoluteExpr(int64_t &Val, bool HasSP3AbsModifier = false);
+  bool isModifier();
+  bool isOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const;
+  bool isRegOrOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const;
+  bool isNamedOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const;
+  bool isOpcodeModifierWithVal(const AsmToken &Token, const AsmToken &NextToken) const;
   bool parseSP3NegModifier();
   OperandMatchResultTy parseImm(OperandVector &Operands, bool HasSP3AbsModifier = false);
   OperandMatchResultTy parseReg(OperandVector &Operands);
   OperandMatchResultTy parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false);
   OperandMatchResultTy parseRegOrImmWithFPInputMods(OperandVector &Operands, bool AllowImm = true);
   OperandMatchResultTy parseRegOrImmWithIntInputMods(OperandVector &Operands, bool AllowImm = true);
   OperandMatchResultTy parseRegWithFPInputMods(OperandVector &Operands);
   OperandMatchResultTy parseRegWithIntInputMods(OperandVector &Operands);
std::unique_ptr<AMDGPUOperand> AMDGPUAsmParser::parseRegister() {
   if (AMDGPU::IsaInfo::hasCodeObjectV3(&getSTI())) {
     if (!updateGprCountSymbols(RegKind, DwordRegIndex, RegWidth))
       return nullptr;
   } else
     KernelScope.usesRegister(RegKind, DwordRegIndex, RegWidth);
   return AMDGPUOperand::CreateReg(this, Reg, StartLoc, EndLoc);
 }
 
-bool
-AMDGPUAsmParser::parseAbsoluteExpr(int64_t &Val, bool HasSP3AbsModifier) {
-  if (HasSP3AbsModifier) {
-    // This is a workaround for handling expressions
-    // as arguments of SP3 'abs' modifier, for example:
-    //     |1.0|
-    //     |-1|
-    //     |1+x|
-    // This syntax is not compatible with syntax of standard
-    // MC expressions (due to the trailing '|').
-
-    SMLoc EndLoc;
-    const MCExpr *Expr;
-    SMLoc StartLoc = getLoc();
-
-    if (getParser().parsePrimaryExpr(Expr, EndLoc)) {
-      return true;
-    }
-
-    if (!Expr->evaluateAsAbsolute(Val))
-      return Error(StartLoc, "expected absolute expression");
-
-    return false;
-  }
-
-  return getParser().parseAbsoluteExpression(Val);
-}
-
 OperandMatchResultTy
 AMDGPUAsmParser::parseImm(OperandVector &Operands, bool HasSP3AbsModifier) {
   // TODO: add syntactic sugar for 1/(2*PI)
 
+  assert(!isRegister());
+  assert(!isModifier());
+
   const auto& Tok = getToken();
   const auto& NextTok = peekToken();
   bool IsReal = Tok.is(AsmToken::Real);
-  SMLoc S = Tok.getLoc();
+  SMLoc S = getLoc();
   bool Negate = false;
 
   if (!IsReal && Tok.is(AsmToken::Minus) && NextTok.is(AsmToken::Real)) {
     lex();
     IsReal = true;
     Negate = true;
   }
 
if (Negate)
       RealVal.changeSign();
 
     Operands.push_back(
       AMDGPUOperand::CreateImm(this, RealVal.bitcastToAPInt().getZExtValue(), S,
                                AMDGPUOperand::ImmTyNone, true));
 
     return MatchOperand_Success;
 
-    // FIXME: Should enable arbitrary expressions here
-  } else if (Tok.is(AsmToken::Integer) ||
-             (Tok.is(AsmToken::Minus) && NextTok.is(AsmToken::Integer))){
-
+  } else {
     int64_t IntVal;
-    if (parseAbsoluteExpr(IntVal, HasSP3AbsModifier))
+    const MCExpr *Expr;
+    SMLoc S = getLoc();
+
+    if (HasSP3AbsModifier) {
+      // This is a workaround for handling expressions
+      // as arguments of SP3 'abs' modifier, for example:
+      //     |1.0|
+      //     |-1|
+      //     |1+x|
+      // This syntax is not compatible with syntax of standard
+      // MC expressions (due to the trailing '|').
+      SMLoc EndLoc;
+      if (getParser().parsePrimaryExpr(Expr, EndLoc))
         return MatchOperand_ParseFail;
+    } else {
+      if (Parser.parseExpression(Expr))
+        return MatchOperand_ParseFail;
+    }
 
+    if (Expr->evaluateAsAbsolute(IntVal)) {
       Operands.push_back(AMDGPUOperand::CreateImm(this, IntVal, S));
+    } else {
+      Operands.push_back(AMDGPUOperand::CreateExpr(this, Expr, S));
+    }
+
     return MatchOperand_Success;
   }
 
   return MatchOperand_NoMatch;
 }
 
 OperandMatchResultTy
 AMDGPUAsmParser::parseReg(OperandVector &Operands) {
   if (!isRegister())
     return MatchOperand_NoMatch;
 
   if (auto R = parseRegister()) {
     assert(R->isReg());
     Operands.push_back(std::move(R));
     return MatchOperand_Success;
   }
   return MatchOperand_ParseFail;
 }
 
 OperandMatchResultTy
 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod) {
   auto res = parseReg(Operands);
-  return (res == MatchOperand_NoMatch)?
-         parseImm(Operands, HasSP3AbsMod) :
-         res;
+  if (res != MatchOperand_NoMatch) {
+    return res;
+  } else if (isModifier()) {
+    return MatchOperand_NoMatch;
+  } else {
+    return parseImm(Operands, HasSP3AbsMod);
+  }
+}
+
+bool
+AMDGPUAsmParser::isNamedOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const {
+  if (Token.is(AsmToken::Identifier) && NextToken.is(AsmToken::LParen)) {
+    const auto &str = Token.getString();
+    return str == "abs" || str == "neg" || str == "sext";
+  }
+  return false;
+}
+
+bool
+AMDGPUAsmParser::isOpcodeModifierWithVal(const AsmToken &Token, const AsmToken &NextToken) const {
+  return Token.is(AsmToken::Identifier) && NextToken.is(AsmToken::Colon);
+}
+
+bool
+AMDGPUAsmParser::isOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const {
+  return isNamedOperandModifier(Token, NextToken) || Token.is(AsmToken::Pipe);
+}
+
+bool
+AMDGPUAsmParser::isRegOrOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const {
+  return isRegister(Token, NextToken) || isOperandModifier(Token, NextToken);
+}
+
+// Check if this is an operand modifier or an opcode modifier
+// which may look like an expression but it is not. We should
+// avoid parsing these modifiers as expressions. Currently
+// recognized sequences are:
+//   |...|
+//   abs(...)
+//   neg(...)
+//   sext(...)
+//   -reg
+//   -|...|
+//   -abs(...)
+//   name:...
+// Note that simple opcode modifiers like 'gds' may be parsed as
+// expressions; this is a special case. See getExpressionAsToken.
+//
+bool
+AMDGPUAsmParser::isModifier() {
+
+  AsmToken Tok = getToken();
+  AsmToken NextToken[2];
+  peekTokens(NextToken);
+
+  return isOperandModifier(Tok, NextToken[0]) ||
+         (Tok.is(AsmToken::Minus) && isRegOrOperandModifier(NextToken[0], NextToken[1])) ||
+         isOpcodeModifierWithVal(Tok, NextToken[0]);
 }
 
 // Check if the current token is an SP3 'neg' modifier.
 // Currently this modifier is allowed in the following context:
 //
 // 1. Before a register, e.g. "-v0", "-v[...]" or "-[v0,v1]".
 // 2. Before an 'abs' modifier: -abs(...)
 // 3. Before an SP3 'abs' modifier: -|...|
if (Neg && !skipToken(AsmToken::RParen, "expected closing parentheses"))
     return MatchOperand_ParseFail;
 
   AMDGPUOperand::Modifiers Mods;
   Mods.Abs = Abs || SP3Abs;
   Mods.Neg = Neg || SP3Neg;
 
   if (Mods.hasFPModifiers()) {
     AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands.back());
+    if (Op.isExpr()) {
+      Error(Op.getStartLoc(), "expected an absolute expression");
+      return MatchOperand_ParseFail;
+    }
     Op.setModifiers(Mods);
   }
   return MatchOperand_Success;
 }
 
 OperandMatchResultTy
 AMDGPUAsmParser::parseRegOrImmWithIntInputMods(OperandVector &Operands,
                                                bool AllowImm) {
AMDGPUAsmParser::parseRegOrImmWithIntInputMods(OperandVector &Operands,
   if (Sext && !skipToken(AsmToken::RParen, "expected closing parentheses"))
     return MatchOperand_ParseFail;
 
   AMDGPUOperand::Modifiers Mods;
   Mods.Sext = Sext;
 
   if (Mods.hasIntModifiers()) {
     AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands.back());
+    if (Op.isExpr()) {
+      Error(Op.getStartLoc(), "expected an absolute expression");
+      return MatchOperand_ParseFail;
+    }
     Op.setModifiers(Mods);
   }
 
   return MatchOperand_Success;
 }
 
 OperandMatchResultTy
 AMDGPUAsmParser::parseRegWithFPInputMods(OperandVector &Operands) {
if (Operands.size() - Prefix > 1) {
       Operands.push_back(AMDGPUOperand::CreateToken(this, "]",
                                                     getTok().getLoc()));
     }
 
     Parser.Lex(); // eat the ']'
     return MatchOperand_Success;
   }
 
-  ResTy = parseRegOrImm(Operands);
-
-  if (ResTy == MatchOperand_Success || ResTy == MatchOperand_ParseFail)
-    return ResTy;
-
-  const auto &Tok = Parser.getTok();
-  SMLoc S = Tok.getLoc();
-
-  const MCExpr *Expr = nullptr;
-  if (!Parser.parseExpression(Expr)) {
-    Operands.push_back(AMDGPUOperand::CreateExpr(this, Expr, S));
-    return MatchOperand_Success;
-  }
-
-  // Possibly this is an instruction flag like 'gds'.
-  if (Tok.getKind() == AsmToken::Identifier) {
-    Operands.push_back(AMDGPUOperand::CreateToken(this, Tok.getString(), S));
-    Parser.Lex();
-    return MatchOperand_Success;
-  }
-
-  return MatchOperand_NoMatch;
+  return parseRegOrImm(Operands);
 }
 
 StringRef AMDGPUAsmParser::parseMnemonicSuffix(StringRef Name) {
   // Clear any forced encodings from the previous instruction.
   setForcedEncodingSize(0);
   setForcedDPP(false);
   setForcedSDWA(false);
 

llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp

if (MO.isExpr() && MO.getExpr()->getKind() != MCExpr::Constant) {
     //
     // .Ltmp1:
     //   s_add_u32 s2, s2, (extern_const_addrspace+16)-.Ltmp1
     MCFixupKind Kind;
     if (needsPCRel(MO.getExpr()))
       Kind = FK_PCRel_4;
     else
       Kind = FK_Data_4;
-    Fixups.push_back(MCFixup::create(4, MO.getExpr(), Kind, MI.getLoc()));
+
+    const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
+    uint32_t Offset = Desc.getSize();
+    assert(Offset == 4 || Offset == 8);
+
+    Fixups.push_back(
+      MCFixup::create(Offset, MO.getExpr(), Kind, MI.getLoc()));
   }
 
   // Figure out the operand number, needed for isSrcOperand check
   unsigned OpNo = 0;
   for (unsigned e = MI.getNumOperands(); OpNo < e; ++OpNo) {
     if (&MO == &MI.getOperand(OpNo))
       break;
   }

llvm/trunk/test/MC/AMDGPU/dl-insts-err.s

 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 op_sel:[2,2]
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 op_sel:[0,-1]
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 op_sel:[-1,0]
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 op_sel:[-1,-1]
-// GFX906: error: not a valid operand
+// GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 op_sel:[0,0,0,0,0]
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 op_sel_hi
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 op_sel_hi:
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 op_sel_hi:[
 // GFX906: error: failed parsing operand

 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 op_sel_hi:[2,2]
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 op_sel_hi:[0,-1]
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 op_sel_hi:[-1,0]
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 op_sel_hi:[-1,-1]
-// GFX906: error: not a valid operand
+// GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 op_sel_hi:[0,0,0,0,0]
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 neg_lo
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 neg_lo:
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 neg_lo:[
 // GFX906: error: failed parsing operand

 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 neg_lo:[2,2]
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 neg_lo:[0,-1]
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 neg_lo:[-1,0]
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 neg_lo:[-1,-1]
-// GFX906: error: not a valid operand
+// GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 neg_lo:[0,0,0,0,0]
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 neg_hi
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 neg_hi:
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 neg_hi:[
 // GFX906: error: failed parsing operand

 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 neg_hi:[2,2]
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 neg_hi:[0,-1]
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 neg_hi:[-1,0]
 // GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 neg_hi:[-1,-1]
-// GFX906: error: not a valid operand
+// GFX906: error: failed parsing operand
 v_dot2_f32_f16 v0, v1, v2, v3 neg_hi:[0,0,0,0,0]
 // GFX906: error: failed parsing operand
 v_dot2_i32_i16 v0, v1, v2, v3 op_sel
 // GFX906: error: failed parsing operand
 v_dot2_i32_i16 v0, v1, v2, v3 op_sel:
 // GFX906: error: failed parsing operand
 v_dot2_i32_i16 v0, v1, v2, v3 op_sel:[
 // GFX906: error: failed parsing operand

 // GFX906: error: failed parsing operand
 v_dot2_i32_i16 v0, v1, v2, v3 op_sel:[2,2]
 // GFX906: error: failed parsing operand
 v_dot2_i32_i16 v0, v1, v2, v3 op_sel:[0,-1]
 // GFX906: error: failed parsing operand
 v_dot2_i32_i16 v0, v1, v2, v3 op_sel:[-1,0]
 // GFX906: error: failed parsing operand
 v_dot2_i32_i16 v0, v1, v2, v3 op_sel:[-1,-1]
-// GFX906: error: not a valid operand
+// GFX906: error: failed parsing operand
 v_dot2_i32_i16 v0, v1, v2, v3 op_sel:[0,0,0,0,0]
 // GFX906: error: failed parsing operand
 v_dot2_i32_i16 v0, v1, v2, v3 op_sel_hi
 // GFX906: error: failed parsing operand
 v_dot2_i32_i16 v0, v1, v2, v3 op_sel_hi:
 // GFX906: error: failed parsing operand
 v_dot2_i32_i16 v0, v1, v2, v3 op_sel_hi:[
 // GFX906: error: failed parsing operand

 // GFX906: error: failed parsing operand
 v_dot2_i32_i16 v0, v1, v2, v3 op_sel_hi:[2,2]
 // GFX906: error: failed parsing operand
 v_dot2_i32_i16 v0, v1, v2, v3 op_sel_hi:[0,-1]
 // GFX906: error: failed parsing operand
 v_dot2_i32_i16 v0, v1, v2, v3 op_sel_hi:[-1,0]
 // GFX906: error: failed parsing operand
 v_dot2_i32_i16 v0, v1, v2, v3 op_sel_hi:[-1,-1]
-// GFX906: error: not a valid operand
+// GFX906: error: failed parsing operand
 v_dot2_i32_i16 v0, v1, v2, v3 op_sel_hi:[0,0,0,0,0]
 // FIXME-GFX906: error: invalid operand for instruction
 v_dot2_i32_i16 v0, v1, v2, v3 neg_lo:[0,0]
 // FIXME-GFX906: error: invalid operand for instruction
 v_dot2_i32_i16 v0, v1, v2, v3 neg_hi:[0,0]
 // GFX906: error: failed parsing operand
 v_dot2_u32_u16 v0, v1, v2, v3 op_sel
 // GFX906: error: failed parsing operand

 // GFX906: error: failed parsing operand
 v_dot2_u32_u16 v0, v1, v2, v3 op_sel:[2,2]
 // GFX906: error: failed parsing operand
 v_dot2_u32_u16 v0, v1, v2, v3 op_sel:[0,-1]
 // GFX906: error: failed parsing operand
 v_dot2_u32_u16 v0, v1, v2, v3 op_sel:[-1,0]
 // GFX906: error: failed parsing operand
 v_dot2_u32_u16 v0, v1, v2, v3 op_sel:[-1,-1]
-// GFX906: error: not a valid operand
+// GFX906: error: failed parsing operand
 v_dot2_u32_u16 v0, v1, v2, v3 op_sel:[0,0,0,0,0]
 // GFX906: error: failed parsing operand
 v_dot2_u32_u16 v0, v1, v2, v3 op_sel_hi
 // GFX906: error: failed parsing operand
 v_dot2_u32_u16 v0, v1, v2, v3 op_sel_hi:
 // GFX906: error: failed parsing operand
 v_dot2_u32_u16 v0, v1, v2, v3 op_sel_hi:[
 // GFX906: error: failed parsing operand

 // GFX906: error: failed parsing operand
 v_dot2_u32_u16 v0, v1, v2, v3 op_sel_hi:[2,2]
 // GFX906: error: failed parsing operand
 v_dot2_u32_u16 v0, v1, v2, v3 op_sel_hi:[0,-1]
 // GFX906: error: failed parsing operand
 v_dot2_u32_u16 v0, v1, v2, v3 op_sel_hi:[-1,0]
 // GFX906: error: failed parsing operand
 v_dot2_u32_u16 v0, v1, v2, v3 op_sel_hi:[-1,-1]
-// GFX906: error: not a valid operand
+// GFX906: error: failed parsing operand
 v_dot2_u32_u16 v0, v1, v2, v3 op_sel_hi:[0,0,0,0,0]
 // FIXME-GFX906: error: invalid operand for instruction
 v_dot2_u32_u16 v0, v1, v2, v3 neg_lo:[0,0]
 // FIXME-GFX906: error: invalid operand for instruction
 v_dot2_u32_u16 v0, v1, v2, v3 neg_hi:[0,0]
 
 //
 // Test regular modifiers.
 //
 
 // GFX906: error: not a valid operand
 v_dot2_f32_f16 v0, |v1|, v2, v3
 // GFX906: error: not a valid operand
 v_dot2_f32_f16 v0, v1, |v2|, v3
 // GFX906: error: not a valid operand
 v_dot2_f32_f16 v0, v1, v2, |v3|
 // GFX906: error: not a valid operand
 v_dot2_f32_f16 v0, |v1|, |v2|, v3
 // GFX906: error: not a valid operand
 v_dot2_f32_f16 v0, |v1|, v2, |v3|
 // GFX906: error: not a valid operand
 v_dot2_f32_f16 v0, |v1|, |v2|, |v3|
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_f32_f16 v0, abs(v1), v2, v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_f32_f16 v0, v1, abs(v2), v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_f32_f16 v0, v1, v2, abs(v3)
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_f32_f16 v0, abs(v1), abs(v2), v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_f32_f16 v0, abs(v1), v2, abs(v3)
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_f32_f16 v0, abs(v1), abs(v2), abs(v3)
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_f32_f16 v0, -v1, v2, v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_f32_f16 v0, v1, -v2, v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_f32_f16 v0, v1, v2, -v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_f32_f16 v0, -v1, -v2, v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_f32_f16 v0, -v1, v2, -v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_f32_f16 v0, -v1, -v2, -v3
 // GFX906: error: not a valid operand
 v_dot2_i32_i16 v0, |v1|, v2, v3
 // GFX906: error: not a valid operand
 v_dot2_i32_i16 v0, v1, |v2|, v3
 // GFX906: error: not a valid operand
 v_dot2_i32_i16 v0, v1, v2, |v3|
 // GFX906: error: not a valid operand
 v_dot2_i32_i16 v0, |v1|, |v2|, v3
 // GFX906: error: not a valid operand
 v_dot2_i32_i16 v0, |v1|, v2, |v3|
 // GFX906: error: not a valid operand
 v_dot2_i32_i16 v0, |v1|, |v2|, |v3|
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_i32_i16 v0, abs(v1), v2, v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_i32_i16 v0, v1, abs(v2), v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_i32_i16 v0, v1, v2, abs(v3)
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_i32_i16 v0, abs(v1), abs(v2), v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_i32_i16 v0, abs(v1), v2, abs(v3)
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_i32_i16 v0, abs(v1), abs(v2), abs(v3)
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_i32_i16 v0, -v1, v2, v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_i32_i16 v0, v1, -v2, v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_i32_i16 v0, v1, v2, -v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_i32_i16 v0, -v1, -v2, v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_i32_i16 v0, -v1, v2, -v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_i32_i16 v0, -v1, -v2, -v3
 // GFX906: error: not a valid operand
 v_dot2_u32_u16 v0, |v1|, v2, v3
 // GFX906: error: not a valid operand
 v_dot2_u32_u16 v0, v1, |v2|, v3
 // GFX906: error: not a valid operand
 v_dot2_u32_u16 v0, v1, v2, |v3|
 // GFX906: error: not a valid operand
 v_dot2_u32_u16 v0, |v1|, |v2|, v3
 // GFX906: error: not a valid operand
 v_dot2_u32_u16 v0, |v1|, v2, |v3|
 // GFX906: error: not a valid operand
 v_dot2_u32_u16 v0, |v1|, |v2|, |v3|
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_u32_u16 v0, abs(v1), v2, v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_u32_u16 v0, v1, abs(v2), v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_u32_u16 v0, v1, v2, abs(v3)
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_u32_u16 v0, abs(v1), abs(v2), v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_u32_u16 v0, abs(v1), v2, abs(v3)
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_u32_u16 v0, abs(v1), abs(v2), abs(v3)
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_u32_u16 v0, -v1, v2, v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_u32_u16 v0, v1, -v2, v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_u32_u16 v0, v1, v2, -v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_u32_u16 v0, -v1, -v2, v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_u32_u16 v0, -v1, v2, -v3
-// GFX906: error: invalid operand for instruction
+// GFX906: error: not a valid operand
 v_dot2_u32_u16 v0, -v1, -v2, -v3
 
 //
 // Test constant bus restrictions.
 //
 
 // GFX906: error: invalid operand (violates constant bus restrictions)
 v_dot2_f32_f16 v255, s1, s2, s3
 // GFX906: error: invalid operand (violates constant bus restrictions)
 v_dot2_i32_i16 v255, s1, s2, s3
 // GFX906: error: invalid operand (violates constant bus restrictions)
 v_dot2_u32_u16 v255, s1, s2, s3

llvm/trunk/test/MC/AMDGPU/expressions-gfx10.s

+// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck %s --check-prefix=GFX10
+
+i1=1
+
+//===----------------------------------------------------------------------===//
+// Constant expressions may be used where literals are accepted.
+//===----------------------------------------------------------------------===//
+
+v_bfe_u32 v0, i1+100, v1, v2
+// GFX10: v_bfe_u32 v0, 0x65, v1, v2      ; encoding: [0x00,0x00,0x48,0xd5,0xff,0x02,0x0a,0x04,0x65,0x00,0x00,0x00]
+
+v_bfe_u32 v0, v1, i1-100, v2
+// GFX10: v_bfe_u32 v0, v1, 0xffffff9d, v2 ; encoding: [0x00,0x00,0x48,0xd5,0x01,0xff,0x09,0x04,0x9d,0xff,0xff,0xff]
+
+v_bfe_u32 v0, v1, v2, (i1+100)*2
+// GFX10: v_bfe_u32 v0, v1, v2, 0xca      ; encoding: [0x00,0x00,0x48,0xd5,0x01,0x05,0xfe,0x03,0xca,0x00,0x00,0x00]
+
+v_cmp_f_i32 s[10:11], (i1+100)*2, v2
+// GFX10: v_cmp_f_i32_e64 s[10:11], 0xca, v2   ; encoding: [0x0a,0x00,0x80,0xd4,0xff,0x04,0x02,0x00,0xca,0x00,0x00,0x00]
+
+v_cmpx_f_i64 v[1:2], i1+100
+// GFX10: v_cmpx_f_i64_e64 v[1:2], 0x65   ; encoding: [0x00,0x00,0xb0,0xd4,0x01,0xff,0x01,0x00,0x65,0x00,0x00,0x00]
+
+v_lshlrev_b64 v[5:6], i1+0xFFE, v[2:3]
+// GFX10: v_lshlrev_b64 v[5:6], 0xfff, v[2:3] ; encoding: [0x05,0x00,0xff,0xd6,0xff,0x04,0x02,0x00,0xff,0x0f,0x00,0x00]
+
+//===----------------------------------------------------------------------===//
+// Relocatable expressions can be used with 32-bit instructions.
+//===----------------------------------------------------------------------===//
+
+v_bfe_u32 v0, u, v1, v2
+// GFX10: v_bfe_u32 v0, u, v1, v2         ; encoding: [0x00,0x00,0x48,0xd5,0xff,0x02,0x0a,0x04,A,A,A,A]
+// GFX10-NEXT:                            ;   fixup A - offset: 8, value: u, kind: FK_PCRel_4
+
+v_bfe_u32 v0, v1, u-1, v2
+// GFX10: v_bfe_u32 v0, v1, u-1, v2       ; encoding: [0x00,0x00,0x48,0xd5,0x01,0xff,0x09,0x04,A,A,A,A]
+// GFX10-NEXT:                            ;   fixup A - offset: 8, value: u-1, kind: FK_Data_4
+
+v_bfe_u32 v0, v1, v2, u+1
+// GFX10: v_bfe_u32 v0, v1, v2, u+1       ; encoding: [0x00,0x00,0x48,0xd5,0x01,0x05,0xfe,0x03,A,A,A,A]
+// GFX10-NEXT:                            ;   fixup A - offset: 8, value: u+1, kind: FK_PCRel_4
+
+v_cmp_f_i32 s[10:11], u+1, v2
+// GFX10: v_cmp_f_i32_e64 s[10:11], u+1, v2 ; encoding: [0x0a,0x00,0x80,0xd4,0xff,0x04,0x02,0x00,A,A,A,A]
+// GFX10-NEXT:                              ;   fixup A - offset: 8, value: u+1, kind: FK_PCRel_4
+
+v_lshlrev_b64 v[5:6], u-1, v[2:3]
+// GFX10: v_lshlrev_b64 v[5:6], u-1, v[2:3] ; encoding: [0x05,0x00,0xff,0xd6,0xff,0x04,0x02,0x00,A,A,A,A]
+// GFX10-NEXT:                              ;   fixup A - offset: 8, value: u-1, kind: FK_Data_4

llvm/trunk/test/MC/AMDGPU/expressions.s

 // RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck %s --check-prefix=VI
 // RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOVI
 
+//===----------------------------------------------------------------------===//
+// Floating-point expressions are not supported
+//===----------------------------------------------------------------------===//
+
+s_sub_u32 s0, s0, -1.0 + 10000000000
+// NOVI: error: invalid operand for instruction
+
+t=10000000000
+s_sub_u32 s0, s0, 1.0 + t
+// NOVI: error: invalid operand for instruction
+
+v_ceil_f32 v1, 1.0 + 1.0
+// NOVI: error: invalid operand for instruction
+
+v_ceil_f32 v1, -1.0 + 1.0
+// NOVI: error: invalid operand for instruction
+
+//===----------------------------------------------------------------------===//
+// Constant expressions may be used with SP3 'abs' modifiers |...|
+// These expressions must be primary expressions to avoid incorrect
+// interpretation of closing "|".
+//===----------------------------------------------------------------------===//
+
+i1=1
+fm1=0xBF800000 // -1.0f
+hm1=0xBC00     // -1.0h
+
+v_ceil_f32 v1, |i1|
+// VI: v_ceil_f32_e32 v1, 1            ; encoding: [0x81,0x3a,0x02,0x7e]
+
+v_ceil_f32 v1, |(i1+1)|
+// VI: v_ceil_f32_e32 v1, 2            ; encoding: [0x82,0x3a,0x02,0x7e]
+
+v_ceil_f32 v1, |-(i1+1)|
+// VI: v_ceil_f32_e32 v1, 0x7ffffffe   ; encoding: [0xff,0x3a,0x02,0x7e,0xfe,0xff,0xff,0x7f]
+
+v_ceil_f32 v1, |fm1|
+// VI: v_ceil_f32_e32 v1, 1.0          ; encoding: [0xf2,0x3a,0x02,0x7e]
+
+v_mad_f16 v5, v1, v2, |i1|
+// VI: v_mad_f16 v5, v1, v2, |1|       ; encoding: [0x05,0x04,0xea,0xd1,0x01,0x05,0x06,0x02]
+
+v_mad_f16 v5, v1, v2, |(i1+1)|
+// VI: v_mad_f16 v5, v1, v2, |2|       ; encoding: [0x05,0x04,0xea,0xd1,0x01,0x05,0x0a,0x02]
+
+v_mad_f16 v5, v1, v2, |hm1|
+// VI: v_mad_f16 v5, v1, v2, |-1.0|    ; encoding: [0x05,0x04,0xea,0xd1,0x01,0x05,0xce,0x03]
+
+// Only primary expressions are allowed
+
+v_ceil_f32 v1, |1+i1|
+// NOVI: failed parsing operand
+
+v_ceil_f32 v1, |i1+1|
+// NOVI: failed parsing operand
+
+//===----------------------------------------------------------------------===//
+// Constant expressions may be used with 'abs' and 'neg' modifiers.
+//===----------------------------------------------------------------------===//
+
+v_ceil_f32 v1, abs(i1)
+// VI: v_ceil_f32_e32 v1, 1            ; encoding: [0x81,0x3a,0x02,0x7e]
+
+v_ceil_f32 v1, abs(i1+1)
+// VI: v_ceil_f32_e32 v1, 2            ; encoding: [0x82,0x3a,0x02,0x7e]
+
+v_ceil_f32 v1, abs(-(i1+1))
+// VI: v_ceil_f32_e32 v1, 0x7ffffffe   ; encoding: [0xff,0x3a,0x02,0x7e,0xfe,0xff,0xff,0x7f]
+
+v_ceil_f32 v1, abs(fm1)
+// VI: v_ceil_f32_e32 v1, 1.0          ; encoding: [0xf2,0x3a,0x02,0x7e]
+
+v_mad_f16 v5, v1, v2, abs(i1)
+// VI: v_mad_f16 v5, v1, v2, |1|       ; encoding: [0x05,0x04,0xea,0xd1,0x01,0x05,0x06,0x02]
+
+v_mad_f16 v5, v1, v2, abs(i1+1)
+// VI: v_mad_f16 v5, v1, v2, |2|       ; encoding: [0x05,0x04,0xea,0xd1,0x01,0x05,0x0a,0x02]
+
+v_mad_f16 v5, v1, v2, abs(hm1)
+// VI: v_mad_f16 v5, v1, v2, |-1.0|    ; encoding: [0x05,0x04,0xea,0xd1,0x01,0x05,0xce,0x03]
+
+v_ceil_f32 v1, neg(i1+1)
+// VI: v_ceil_f32_e32 v1, 0x80000002   ; encoding: [0xff,0x3a,0x02,0x7e,0x02,0x00,0x00,0x80]
+
+v_ceil_f32 v1, neg(1+i1)
+// VI: v_ceil_f32_e32 v1, 0x80000002   ; encoding: [0xff,0x3a,0x02,0x7e,0x02,0x00,0x00,0x80]
+
+v_ceil_f32 v1, neg(-i1+3)
+// VI: v_ceil_f32_e32 v1, 0x80000002   ; encoding: [0xff,0x3a,0x02,0x7e,0x02,0x00,0x00,0x80]
+
+v_ceil_f32 v1, neg(-(i1+1))
+// VI: v_ceil_f32_e32 v1, 0x7ffffffe   ; encoding: [0xff,0x3a,0x02,0x7e,0xfe,0xff,0xff,0x7f]
+
+v_ceil_f32 v1, neg(fm1)
+// VI: v_ceil_f32_e32 v1, 1.0          ; encoding: [0xf2,0x3a,0x02,0x7e]
+
+v_mad_f16 v5, v1, v2, neg(hm1)
+// VI: v_mad_f16 v5, v1, v2, neg(-1.0) ; encoding: [0x05,0x00,0xea,0xd1,0x01,0x05,0xce,0x83]
+
+//===----------------------------------------------------------------------===//
+// Constant expressions may be used where inline constants are accepted.
+//===----------------------------------------------------------------------===//
+
+v_ceil_f64 v[0:1], i1+1
+// VI: v_ceil_f64_e32 v[0:1], 2        ; encoding: [0x82,0x30,0x00,0x7e]
+
+v_and_b32 v0, i1+1, v0
+// VI: v_and_b32_e32 v0, 2, v0         ; encoding: [0x82,0x00,0x00,0x26]
+
+v_and_b32 v0, 1+i1, v0
+// VI: v_and_b32_e32 v0, 2, v0         ; encoding: [0x82,0x00,0x00,0x26]
+
+v_and_b32 v0, -i1+3, v0
+// VI: v_and_b32_e32 v0, 2, v0         ; encoding: [0x82,0x00,0x00,0x26]
+
+v_and_b32 v0, -(i1+1), v0
+// VI: v_and_b32_e32 v0, -2, v0        ; encoding: [0xc2,0x00,0x00,0x26]
+
+v_add_u16 v0, (i1+4)/2, v1
+// VI: v_add_u16_e32 v0, 2, v1         ; encoding: [0x82,0x02,0x00,0x4c]
+
+buffer_atomic_inc v1, off, s[8:11], i1+1 glc
+// VI: buffer_atomic_inc v1, off, s[8:11], 2 glc ; encoding: [0x00,0x40,0x2c,0xe1,0x00,0x01,0x02,0x82]
+
+s_addk_i32 s2, i1+1
+// VI: s_addk_i32 s2, 0x2              ; encoding: [0x02,0x00,0x02,0xb7]
+
+s_cmpk_eq_i32 s2, i1+1
+// VI: s_cmpk_eq_i32 s2, 0x2           ; encoding: [0x02,0x00,0x02,0xb1]
+
+s_setreg_imm32_b32 0x6, i1+1
+// VI: s_setreg_imm32_b32 hwreg(HW_REG_LDS_ALLOC, 0, 1), 2 ; encoding: [0x06,0x00,0x00,0xba,0x02,0x00,0x00,0x00]
+
+v_madak_f16 v1, v2, v3, i1+1
+// VI: v_madak_f16 v1, v2, v3, 0x2     ; encoding: [0x02,0x07,0x02,0x4a,0x02,0x00,0x00,0x00]
+
+s_set_gpr_idx_on s0, i1+1
+// VI: s_set_gpr_idx_on s0, gpr_idx(SRC1) ; encoding: [0x00,0x02,0x11,0xbf]
+
+s_atc_probe i1-1, s[4:5], i1+1
+// VI: s_atc_probe 0, s[4:5], 0x2      ; encoding: [0x02,0x00,0x9a,0xc0,0x02,0x00,0x00,0x00]
+
+s_load_dword s1, s[2:3], i1+1 glc
+// VI: s_load_dword s1, s[2:3], 0x2 glc ; encoding: [0x41,0x00,0x03,0xc0,0x02,0x00,0x00,0x00]
+
+//===----------------------------------------------------------------------===//
+// Constant expressions may be used where literals are accepted.
+//===----------------------------------------------------------------------===//
+
+v_ceil_f64 v[0:1], i1+100
+// VI: v_ceil_f64_e32 v[0:1], 0x65     ; encoding: [0xff,0x30,0x00,0x7e,0x65,0x00,0x00,0x00]
+
+v_and_b32 v0, i1+100, v0
+// VI: v_and_b32_e32 v0, 0x65, v0      ; encoding: [0xff,0x00,0x00,0x26,0x65,0x00,0x00,0x00]
+
+v_and_b32 v0, -i1+102, v0
+// VI: v_and_b32_e32 v0, 0x65, v0      ; encoding: [0xff,0x00,0x00,0x26,0x65,0x00,0x00,0x00]
+
+v_add_u16 v0, (i1+100)*2, v0
+// VI: v_add_u16_e32 v0, 0xca, v0      ; encoding: [0xff,0x00,0x00,0x4c,0xca,0x00,0x00,0x00]
+
+//===----------------------------------------------------------------------===//
+// Relocatable expressions can be used with 32-bit instructions.
+//===----------------------------------------------------------------------===//
+
+v_ceil_f32 v1, -u
+// VI: v_ceil_f32_e32 v1, -u           ; encoding: [0xff,0x3a,0x02,0x7e,A,A,A,A]
+// VI-NEXT: ; fixup A - offset: 4, value: -u, kind: FK_PCRel_4
+
+v_and_b32 v0, u+1, v0
+// VI: v_and_b32_e32 v0, u+1, v0       ; encoding: [0xff,0x00,0x00,0x26,A,A,A,A]
+// VI-NEXT: ;   fixup A - offset: 4, value: u+1, kind: FK_PCRel_4
+
+//===----------------------------------------------------------------------===//
+// Relocatable expressions cannot be used as 16/20/21/64-bit operands.
+//===----------------------------------------------------------------------===//
+
+v_ceil_f64 v[0:1], u
+// NOVI: error: invalid operand for instruction
+
+v_add_u16 v0, u, v0
+// NOVI: error: invalid operand for instruction
+
+s_addk_i32 s2, u
+// NOVI: error: invalid operand for instruction
+
+s_load_dword s1, s[2:3], u glc
+// NOVI: error: invalid operand for instruction
+
+//===----------------------------------------------------------------------===//
+// Relocatable expressions cannot be used with VOP3 modifiers.
+//===----------------------------------------------------------------------===//
+
+v_ceil_f32 v1, |u|
+// NOVI: error: expected an absolute expression
+
+v_ceil_f32 v1, neg(u)
+// NOVI: error: expected an absolute expression
+
+v_ceil_f32 v1, abs(u)
+// NOVI: error: expected an absolute expression
+
+//===----------------------------------------------------------------------===//
+// Misc tests with symbols.
+//===----------------------------------------------------------------------===//
 
 .globl global
 .globl gds
 
 // Parse a global expression
 s_mov_b32 s0, global
 // VI: s_mov_b32 s0, global ; encoding: [0xff,0x00,0x80,0xbe,A,A,A,A]
 // VI-NEXT: ;   fixup A - offset: 4, value: global, kind: FK_PCRel_4

 // Use a computed expression that results in an inline immediate.
 .set foo, 4
 s_mov_b32 s0, foo+2
 // VI: s_mov_b32 s0, 6 ; encoding: [0x86,0x00,0x80,0xbe]
 
 // Use a computed expression that results in a non-inline immediate.
 .set foo, 512
 s_mov_b32 s0, foo+2
-// VI: s_mov_b32 s0, 514 ; encoding: [0xff,0x00,0x80,0xbe,0x02,0x02,0x00,0x00]
+// VI: s_mov_b32 s0, 0x202 ; encoding: [0xff,0x00,0x80,0xbe,0x02,0x02,0x00,0x00]
+
+v_mul_f32 v0, foo+2, v2
+// VI: v_mul_f32_e32 v0, 0x202, v2 ; encoding: [0xff,0x04,0x00,0x0a,0x02,0x02,0x00,0x00]
 
 BB1:
 v_nop_e64
 BB2:
 s_sub_u32 vcc_lo, vcc_lo, (BB2+4)-BB1
 // VI: s_sub_u32 vcc_lo, vcc_lo, (BB2+4)-BB1 ; encoding: [0x6a,0xff,0xea,0x80,A,A,A,A]
 // VI-NEXT: ;   fixup A - offset: 4, value: (BB2+4)-BB1, kind: FK_Data_4
 
 t=1
 s_sub_u32 s0, s0, -t
 // VI: s_sub_u32 s0, s0, -1            ; encoding: [0x00,0xc1,0x80,0x80]
 
 t=-1
 s_sub_u32 s0, s0, -t
 // VI: s_sub_u32 s0, s0, 1             ; encoding: [0x00,0x81,0x80,0x80]
 
 s_sub_u32 s0, s0, -2+1
 // VI: s_sub_u32 s0, s0, -1            ; encoding: [0x00,0xc1,0x80,0x80]
 
 t=1
 s_sub_u32 s0, s0, -2+t
 // VI: s_sub_u32 s0, s0, -1            ; encoding: [0x00,0xc1,0x80,0x80]
 
-s_sub_u32 s0, s0, -1.0 + 10000000000
-// NOVI: error: invalid operand for instruction
-
-t=10000000000
-s_sub_u32 s0, s0, 1.0 + t
-// NOVI: error: invalid operand for instruction
-
 //===----------------------------------------------------------------------===//
 // Symbols may look like registers.
 // They should be allowed in expressions if there is no ambiguity.
 //===----------------------------------------------------------------------===//
 
 v=1
 v_sin_f32 v0, -v
-// NOVI: error: invalid operand for instruction
-
-v=1
-v_sin_f32 v0, -v[0]
-// VI: v_sin_f32_e64 v0, -v0           ; encoding: [0x00,0x00,0x69,0xd1,0x00,0x01,0x00,0x20]
+// VI: v_sin_f32_e32 v0, -1            ; encoding: [0xc1,0x52,0x00,0x7e]
 
 s=1
 s_not_b32 s0, -s
 // VI: s_not_b32 s0, -1                ; encoding: [0xc1,0x04,0x80,0xbe]
 
-s0=1
-s_not_b32 s0, -s0
-// VI: s_not_b32 s0, -1                ; encoding: [0xc1,0x04,0x80,0xbe]
-
 ttmp=1
 s_not_b32 s0, -ttmp
 // VI: s_not_b32 s0, -1                ; encoding: [0xc1,0x04,0x80,0xbe]
 
+//===----------------------------------------------------------------------===//
+// Registers have priority over symbols.
+//===----------------------------------------------------------------------===//
+
+v=1
+v_sin_f32 v0, -v[0]
+// VI: v_sin_f32_e64 v0, -v0           ; encoding: [0x00,0x00,0x69,0xd1,0x00,0x01,0x00,0x20]
+
+s0=1
+v_sin_f32 v0, -s0
+// VI: v_sin_f32_e64 v0, -s0           ; encoding: [0x00,0x00,0x69,0xd1,0x00,0x00,0x00,0x20]
+
 ttmp0=1
-s_not_b32 s0, -[ttmp0]
-// VI: s_not_b32 s0, -1                ; encoding: [0xc1,0x04,0x80,0xbe]
+v_sin_f32 v0, -[ttmp0]
+// VI: v_sin_f32_e64 v0, -ttmp0        ; encoding: [0x00,0x00,0x69,0xd1,0x70,0x00,0x00,0x20]
+
+//===----------------------------------------------------------------------===//
+// Incorrect register names and unsupported registers should not be interpreted
+// as expressions, rather they should trigger errors.
+//===----------------------------------------------------------------------===//
+
+s1000=1
+v_sin_f32 v0, -s1000
+// NOVI: failed parsing operand
+
+xnack_mask_lo=1
+v_sin_f32 v0, xnack_mask_lo
+// NOVI: failed parsing operand

llvm/trunk/test/MC/AMDGPU/flat-global.s

 // GFX10: encoding: [0x00,0x90,0x38,0xdc,0x03,0x00,0x7d,0x01]
 // GFX9-ERR: error: failed parsing operand
 // VI-ERR: error: invalid operand for instruction
 
 // FIXME: VI error should be instruction nto supported
 global_load_dword v1, v[3:4], off offset:0
 // GFX10: encoding: [0x00,0x80,0x30,0xdc,0x03,0x00,0x7d,0x01]
 // GFX9: global_load_dword v1, v[3:4], off    ; encoding: [0x00,0x80,0x50,0xdc,0x03,0x00,0x7f,0x01]
-// VI-ERR: :41: error: not a valid operand.
+// VI-ERR: :35: error: not a valid operand.
 
 global_load_dword v1, v[3:4], off offset:4095
 // GFX10-ERR: error: invalid operand for instruction
 // GFX9: global_load_dword v1, v[3:4], off offset:4095 ; encoding: [0xff,0x8f,0x50,0xdc,0x03,0x00,0x7f,0x01]
-// VI-ERR: :41: error: not a valid operand.
+// VI-ERR: :35: error: not a valid operand.
 
 global_load_dword v1, v[3:4], off offset:-1
 // GFX10: encoding: [0xff,0x8f,0x30,0xdc,0x03,0x00,0x7d,0x01]
 // GFX9: global_load_dword v1, v[3:4], off offset:-1 ; encoding: [0xff,0x9f,0x50,0xdc,0x03,0x00,0x7f,0x01]
-// VI-ERR: :41: error: not a valid operand.
+// VI-ERR: :35: error: not a valid operand.
 
 global_load_dword v1, v[3:4], off offset:-4096
 // GFX10-ERR: error: invalid operand for instruction
 // GFX9: global_load_dword v1, v[3:4], off offset:-4096 ; encoding: [0x00,0x90,0x50,0xdc,0x03,0x00,0x7f,0x01]
-// VI-ERR: :41: error: not a valid operand.
+// VI-ERR: :35: error: not a valid operand.
 
 global_load_dword v1, v[3:4], off offset:4096
 // GFX10-ERR: error: invalid operand for instruction
 // GFX9-ERR: :35: error: invalid operand for instruction
-// VI-ERR: :41: error: not a valid operand.
+// VI-ERR: :35: error: not a valid operand.
 
 global_load_dword v1, v[3:4] off, offset:-4097
 // GFX10-ERR: error: invalid operand for instruction
 // GFX9-ERR: :35: error: invalid operand for instruction
-// VI-ERR: :41: error: not a valid operand.
+// VI-ERR: :35: error: not a valid operand.
 
 global_store_byte v[3:4], v1, off
 // GFX10: encoding: [0x00,0x80,0x60,0xdc,0x03,0x01,0x7d,0x00]
 // GFX9: global_store_byte v[3:4], v1, off ; encoding: [0x00,0x80,0x60,0xdc,0x03,0x01,0x7f,0x00]
 // VI-ERR: instruction not supported on this GPU
 
 global_store_byte v[3:4], v1, off dlc
 // GFX10: encoding: [0x00,0x90,0x60,0xdc,0x03,0x01,0x7d,0x00]

 global_store_dwordx4 v[3:4], v[1:4], off dlc
 // GFX10: encoding: [0x00,0x90,0x78,0xdc,0x03,0x01,0x7d,0x00]
 // GFX9-ERR: error: failed parsing operand
 // VI-ERR: error: invalid operand for instruction
 
 global_store_dword v[3:4], v1, off offset:12
 // GFX10: encoding: [0x0c,0x80,0x70,0xdc,0x03,0x01,0x7d,0x00]
 // GFX9: global_store_dword v[3:4], v1, off offset:12 ; encoding: [0x0c,0x80,0x70,0xdc,0x03,0x01,0x7f,0x00]
-// VI-ERR: :42: error: not a valid operand
+// VI-ERR: :36: error: not a valid operand
 
 global_load_dword v1, v[3:4], s[2:3]
 // GFX10: encoding: [0x00,0x80,0x30,0xdc,0x03,0x00,0x02,0x01]
 // GFX9: global_load_dword v1, v[3:4], s[2:3] ; encoding: [0x00,0x80,0x50,0xdc,0x03,0x00,0x02,0x01]
 // VI-ERR: instruction not supported on this GPU
 
 global_load_dword v1, v[3:4], s[2:3] offset:24
 // GFX10: encoding: [0x18,0x80,0x30,0xdc,0x03,0x00,0x02,0x01]
 // GFX9: global_load_dword v1, v[3:4], s[2:3] offset:24 ; encoding: [0x18,0x80,0x50,0xdc,0x03,0x00,0x02,0x01]
-// VI-ERR: :44: error: not a valid operand.
+// VI-ERR: :38: error: not a valid operand.
 
 global_load_dword v1, v[3:4], s[2:3] offset:-8
 // GFX10: encoding: [0xf8,0x8f,0x30,0xdc,0x03,0x00,0x02,0x01]
 // GFX9: global_load_dword v1, v[3:4], s[2:3] offset:-8 ; encoding: [0xf8,0x9f,0x50,0xdc,0x03,0x00,0x02,0x01]
-// VI-ERR: :44: error: not a valid operand.
+// VI-ERR: :38: error: not a valid operand.
 
 global_store_dword v[3:4], v1, s[2:3]
 // GFX10: encoding: [0x00,0x80,0x70,0xdc,0x03,0x01,0x02,0x00]
 // GFX9: global_store_dword v[3:4], v1, s[2:3] ; encoding: [0x00,0x80,0x70,0xdc,0x03,0x01,0x02,0x00]
 // VI-ERR: instruction not supported on this GPU
 
 global_store_dword v[3:4], v1, s[2:3] offset:24
 // GFX10: encoding: [0x18,0x80,0x70,0xdc,0x03,0x01,0x02,0x00]
 // GFX9: global_store_dword v[3:4], v1, s[2:3] offset:24 ; encoding: [0x18,0x80,0x70,0xdc,0x03,0x01,0x02,0x00]
-// VI-ERR: :45: error: not a valid operand.
+// VI-ERR: :39: error: not a valid operand.
 
 global_store_dword v[3:4], v1, s[2:3] offset:-8
 // GFX10: encoding: [0xf8,0x8f,0x70,0xdc,0x03,0x01,0x02,0x00]
 // GFX9: global_store_dword v[3:4], v1, s[2:3] offset:-8 ; encoding: [0xf8,0x9f,0x70,0xdc,0x03,0x01,0x02,0x00]
-// VI-ERR: :45: error: not a valid operand.
+// VI-ERR: :39: error: not a valid operand.
 
 // XXX: Is this valid?
 global_store_dword v[3:4], v1, exec
 // GFX10: encoding: [0x00,0x80,0x70,0xdc,0x03,0x01,0x7e,0x00]
 // GFX9: global_store_dword v[3:4], v1, exec ; encoding: [0x00,0x80,0x70,0xdc,0x03,0x01,0x7e,0x00]
 // VI-ERR: instruction not supported on this GPU
 
 global_load_dword v1, v[3:4], s2

 global_atomic_dec_x2 v[3:4], v[5:6], off
 // GFX10: encoding: [0x00,0x80,0x74,0xdd,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_dec_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0xb0,0xdd,0x03,0x05,0x7f,0x00]
 // VI-ERR: error: instruction not supported on this GPU
 
 global_atomic_cmpswap v[3:4], v[5:6], off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0xc4,0xdc,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_cmpswap v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x04,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :49: error: not a valid operand.
+// VI-ERR: :43: error: not a valid operand.
 
 global_atomic_cmpswap_x2 v[3:4], v[5:8], off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0x44,0xdd,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_cmpswap_x2 v[3:4], v[5:8], off offset:-16 ; encoding: [0xf0,0x9f,0x84,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :52: error: not a valid operand.
+// VI-ERR: :46: error: not a valid operand.
 
 global_atomic_swap v[3:4], v5, off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0xc0,0xdc,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_swap v[3:4], v5, off   offset:-16 ; encoding: [0xf0,0x9f,0x00,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :42: error: not a valid operand
+// VI-ERR: :36: error: not a valid operand
 
 global_atomic_swap_x2 v[3:4], v[5:6], off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0x40,0xdd,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_swap_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x80,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :49: error: not a valid operand
+// VI-ERR: :43: error: not a valid operand
 
 global_atomic_add v[3:4], v5, off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0xc8,0xdc,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_add v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x08,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :41: error: not a valid operand
+// VI-ERR: :35: error: not a valid operand
 
 global_atomic_sub v[3:4], v5, off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0xcc,0xdc,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_sub v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x0c,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :41: error: not a valid operand
+// VI-ERR: :35: error: not a valid operand
 
 global_atomic_smin v[3:4], v5, off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0xd4,0xdc,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_smin v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x10,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :42: error: not a valid operand
+// VI-ERR: :36: error: not a valid operand
 
 global_atomic_umin v[3:4], v5, off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0xd8,0xdc,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_umin v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x14,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :42: error: not a valid operand
+// VI-ERR: :36: error: not a valid operand
 
 global_atomic_smax v[3:4], v5, off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0xdc,0xdc,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_smax v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x18,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :42: error: not a valid operand
+// VI-ERR: :36: error: not a valid operand
 
 global_atomic_umax v[3:4], v5, off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0xe0,0xdc,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_umax v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x1c,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :42: error: not a valid operand
+// VI-ERR: :36: error: not a valid operand
 
 global_atomic_and v[3:4], v5, off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0xe4,0xdc,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_and v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x20,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :41: error: not a valid operand
+// VI-ERR: :35: error: not a valid operand
 
 global_atomic_or v[3:4], v5, off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0xe8,0xdc,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_or v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x24,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :40: error: not a valid operand
+// VI-ERR: :34: error: not a valid operand
 
 global_atomic_xor v[3:4], v5, off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0xec,0xdc,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_xor v[3:4], v5, off  offset:-16 ; encoding: [0xf0,0x9f,0x28,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :41: error: not a valid operand
+// VI-ERR: :35: error: not a valid operand
 
 global_atomic_inc v[3:4], v5, off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0xf0,0xdc,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_inc v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x2c,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :41: error: not a valid operand
+// VI-ERR: :35: error: not a valid operand
 
 global_atomic_dec v[3:4], v5, off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0xf4,0xdc,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_dec v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x30,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :41: error: not a valid operand
+// VI-ERR: :35: error: not a valid operand
 
 global_atomic_add_x2 v[3:4], v[5:6], off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0x48,0xdd,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_add_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x88,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :48: error: not a valid operand
+// VI-ERR: :42: error: not a valid operand
 
 global_atomic_sub_x2 v[3:4], v[5:6], off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0x4c,0xdd,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_sub_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x8c,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :48: error: not a valid operand
+// VI-ERR: :42: error: not a valid operand
 
 global_atomic_smin_x2 v[3:4], v[5:6], off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0x54,0xdd,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_smin_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x90,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :49: error: not a valid operand
+// VI-ERR: :43: error: not a valid operand
 
 global_atomic_umin_x2 v[3:4], v[5:6], off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0x58,0xdd,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_umin_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x94,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :49: error: not a valid operand
+// VI-ERR: :43: error: not a valid operand
 
 global_atomic_smax_x2 v[3:4], v[5:6], off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0x5c,0xdd,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_smax_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x98,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :49: error: not a valid operand
+// VI-ERR: :43: error: not a valid operand
 
 global_atomic_umax_x2 v[3:4], v[5:6], off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0x60,0xdd,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_umax_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x9c,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :49: error: not a valid operand
+// VI-ERR: :43: error: not a valid operand
 
 global_atomic_and_x2 v[3:4], v[5:6], off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0x64,0xdd,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_and_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0xa0,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :48: error: not a valid operand
+// VI-ERR: :42: error: not a valid operand
 
 global_atomic_or_x2 v[3:4], v[5:6], off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0x68,0xdd,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_or_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0xa4,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :47: error: not a valid operand
+// VI-ERR: :41: error: not a valid operand
 
 global_atomic_xor_x2 v[3:4], v[5:6], off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0x6c,0xdd,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_xor_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0xa8,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :48: error: not a valid operand
+// VI-ERR: :42: error: not a valid operand
 
 global_atomic_inc_x2 v[3:4], v[5:6], off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0x70,0xdd,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_inc_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0xac,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :48: error: not a valid operand
+// VI-ERR: :42: error: not a valid operand
 
 global_atomic_dec_x2 v[3:4], v[5:6], off offset:-16
 // GFX10: encoding: [0xf0,0x8f,0x74,0xdd,0x03,0x05,0x7d,0x00]
 // GFX9: global_atomic_dec_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0xb0,0xdd,0x03,0x05,0x7f,0x00]
-// VI-ERR: :48: error: not a valid operand
+// VI-ERR: :42: error: not a valid operand
 
 global_load_ubyte_d16 v1, v[3:4], off
 // GFX10: encoding: [0x00,0x80,0x80,0xdc,0x03,0x00,0x7d,0x01]
 // GFX9: global_load_ubyte_d16 v1, v[3:4], off ; encoding: [0x00,0x80,0x80,0xdc,0x03,0x00,0x7f,0x01]
 // VI-ERR: instruction not supported on this GPU
 
 global_load_ubyte_d16_hi v1, v[3:4], off
 // GFX10: encoding: [0x00,0x80,0x84,0xdc,0x03,0x00,0x7d,0x01]

llvm/trunk/test/MC/AMDGPU/invalid-instructions-spellcheck.s

 # RUN: not llvm-mc -triple amdgcn < %s 2>&1 | FileCheck %s
 
 # This tests the mnemonic spell checker.
 
 # First check what happens when an instruction is omitted:
 
 v2, v4, v6
 
 # CHECK:      unknown token in expression
 # CHECK-NEXT: v2, v4, v6
 # CHECK-NEXT:   ^
 
-# CHECK:      error: not a valid operand.
+# CHECK:      error: failed parsing operand
 # CHECK-NEXT: v2, v4, v6
 # CHECK-NEXT:     ^
 
 # We don't want to see a suggestion here; the edit distance is too large to
 # give sensible suggestions:
 
 aaaaaaaaaaaaaaa v1, v2, v3
 

llvm/trunk/test/MC/AMDGPU/literals.s

 
 // NOGCN: error: invalid operand for instruction
 v_trunc_f64 v[0:1], 0x1fffffff000
 
 //---------------------------------------------------------------------------//
 // named inline values like shared_base
 //---------------------------------------------------------------------------//
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: buffer_atomic_add v0, off, s[0:3], src_shared_base offset:4095 ; encoding: [0xff,0x0f,0x08,0xe1,0x00,0x00,0x00,0xeb]
 buffer_atomic_add v0, off, s[0:3], src_shared_base offset:4095
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: s_add_i32 s0, src_shared_base, s0 ; encoding: [0xeb,0x00,0x00,0x81]
 s_add_i32 s0, src_shared_base, s0
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: s_add_i32 s0, src_shared_limit, s0 ; encoding: [0xec,0x00,0x00,0x81]
 s_add_i32 s0, src_shared_limit, s0
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: s_add_i32 s0, src_private_base, s0 ; encoding: [0xed,0x00,0x00,0x81]
 s_add_i32 s0, src_private_base, s0
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: s_add_i32 s0, src_private_limit, s0 ; encoding: [0xee,0x00,0x00,0x81]
 s_add_i32 s0, src_private_limit, s0
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: s_add_i32 s0, src_pops_exiting_wave_id, s0 ; encoding: [0xef,0x00,0x00,0x81]
 s_add_i32 s0, src_pops_exiting_wave_id, s0
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: s_and_b64 s[0:1], s[0:1], src_shared_base ; encoding: [0x00,0xeb,0x80,0x86]
 s_and_b64 s[0:1], s[0:1], src_shared_base
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: s_and_b64 s[0:1], s[0:1], src_shared_limit ; encoding: [0x00,0xec,0x80,0x86]
 s_and_b64 s[0:1], s[0:1], src_shared_limit
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: s_and_b64 s[0:1], s[0:1], src_private_base ; encoding: [0x00,0xed,0x80,0x86]
 s_and_b64 s[0:1], s[0:1], src_private_base
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: s_and_b64 s[0:1], s[0:1], src_private_limit ; encoding: [0x00,0xee,0x80,0x86]
 s_and_b64 s[0:1], s[0:1], src_private_limit
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: s_and_b64 s[0:1], s[0:1], src_pops_exiting_wave_id ; encoding: [0x00,0xef,0x80,0x86]
 s_and_b64 s[0:1], s[0:1], src_pops_exiting_wave_id
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: v_add_u16_e32 v0, src_shared_base, v0 ; encoding: [0xeb,0x00,0x00,0x4c]
 v_add_u16 v0, src_shared_base, v0
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: v_add_u16_sdwa v0, src_shared_base, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x00,0x00,0x4c,0xeb,0x06,0x86,0x06]
 v_add_u16_sdwa v0, src_shared_base, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: v_add_u16_sdwa v0, v0, src_shared_base dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0xd6,0x01,0x4c,0x00,0x06,0x06,0x86]
 v_add_u16_sdwa v0, v0, src_shared_base dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: v_add_u32_e32 v0, src_shared_base, v0 ; encoding: [0xeb,0x00,0x00,0x68]
 v_add_u32 v0, src_shared_base, v0
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: v_add_u32_e64 v0, src_shared_base, v0 ; encoding: [0x00,0x00,0x34,0xd1,0xeb,0x00,0x02,0x00]
 v_add_u32_e64 v0, src_shared_base, v0
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: v_cmp_eq_i64_e32 vcc, src_shared_base, v[0:1] ; encoding: [0xeb,0x00,0xc4,0x7d]
 v_cmp_eq_i64 vcc, src_shared_base, v[0:1]
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: v_max_f16_e32 v0, src_shared_base, v0 ; encoding: [0xeb,0x00,0x00,0x5a]
 v_max_f16 v0, src_shared_base, v0
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: v_max_f32_e32 v0, src_shared_base, v0 ; encoding: [0xeb,0x00,0x00,0x16]
 v_max_f32 v0, src_shared_base, v0
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: v_max_f64 v[0:1], src_shared_base, v[0:1] ; encoding: [0x00,0x00,0x83,0xd2,0xeb,0x00,0x02,0x00]
 v_max_f64 v[0:1], src_shared_base, v[0:1]
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: v_pk_add_f16 v0, src_shared_base, v0 ; encoding: [0x00,0x00,0x8f,0xd3,0xeb,0x00,0x02,0x18]
 v_pk_add_f16 v0, src_shared_base, v0
 
-// NOSICI: error: invalid operand for instruction
-// NOVI: error: not a valid operand.
+// NOSICI: error: not a valid operand
+// NOVI: error: failed parsing operand.
 // GFX9: v_ceil_f16_e64 v0, -src_shared_base ; encoding: [0x00,0x00,0x85,0xd1,0xeb,0x00,0x00,0x20]
 v_ceil_f16 v0, neg(src_shared_base)
 
-// NOSICI: error: invalid operand for instruction
-// NOVI: error: not a valid operand.
+// NOSICI: error: not a valid operand
+// NOVI: error: failed parsing operand.
 // GFX9: v_ceil_f16_e64 v0, |src_shared_base| ; encoding: [0x00,0x01,0x85,0xd1,0xeb,0x00,0x00,0x00]
 v_ceil_f16 v0, abs(src_shared_base)
 
-// NOSICIVI: error: not a valid operand.
+// NOSOCIVI: error: failed parsing operand.
 // GFX9: v_ceil_f64_e64 v[5:6], |src_shared_base| ; encoding: [0x05,0x01,0x58,0xd1,0xeb,0x00,0x00,0x00]
 v_ceil_f64 v[5:6], |src_shared_base|
 
-// NOSI: error: invalid operand for instruction
-// NOCIVI: error: not a valid operand.
+// NOSI: error: not a valid operand
+// NOCIVI: error: failed parsing operand.
 // GFX9: v_ceil_f64_e64 v[5:6], -src_shared_base ; encoding: [0x05,0x00,0x58,0xd1,0xeb,0x00,0x00,0x20]
 v_ceil_f64 v[5:6], -src_shared_base
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: v_ceil_f32_e64 v0, -src_shared_base ; encoding: [0x00,0x00,0x5d,0xd1,0xeb,0x00,0x00,0x20]
 v_ceil_f32 v0, -src_shared_base
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: v_ceil_f32_e64 v0, |src_shared_base| ; encoding: [0x00,0x01,0x5d,0xd1,0xeb,0x00,0x00,0x00]
 v_ceil_f32 v0, |src_shared_base|
 
-// NOSICIVI: error: not a valid operand.
+// NOSICI: error: not a valid operand.
+// NOVI: error: failed parsing operand.
 // GFX9: v_ceil_f16_sdwa v5, |src_shared_base| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x8a,0x0a,0x7e,0xeb,0x16,0xa6,0x00]
 v_ceil_f16_sdwa v5, |src_shared_base| dst_sel:DWORD dst_unused:UNUSED_PRESERVE
 
-// NOSICIVI: error: not a valid operand.
+// NOSICI: error: not a valid operand.
+// NOVI: error: failed parsing operand.
 // GFX9: v_ceil_f16_sdwa v5, -src_shared_base dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x8a,0x0a,0x7e,0xeb,0x16,0x96,0x00]
 v_ceil_f16_sdwa v5, -src_shared_base dst_sel:DWORD dst_unused:UNUSED_PRESERVE
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: v_ceil_f32_sdwa v5, src_shared_base dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x3a,0x0a,0x7e,0xeb,0x16,0x86,0x00]
 v_ceil_f32_sdwa v5, src_shared_base dst_sel:DWORD src0_sel:DWORD
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // GFX9: v_ceil_f32_sdwa v5, |src_shared_base| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x3a,0x0a,0x7e,0xeb,0x16,0xa6,0x00]
 v_ceil_f32_sdwa v5, |src_shared_base| dst_sel:DWORD src0_sel:DWORD
 
 //---------------------------------------------------------------------------//
 // named inline values compete with other scalars for constant bus access
 //---------------------------------------------------------------------------//
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // NOGFX9: error: invalid operand (violates constant bus restrictions)
 v_add_u32 v0, private_base, s0
 
 // v_div_fmas implicitly reads VCC
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // NOGFX9: error: invalid operand (violates constant bus restrictions)
 v_div_fmas_f32 v0, shared_base, v0, v1
 
 // v_div_fmas implicitly reads VCC
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // NOGFX9: error: invalid operand (violates constant bus restrictions)
 v_div_fmas_f32 v0, v0, shared_limit, v1
 
 // v_div_fmas implicitly reads VCC
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // NOGFX9: error: invalid operand (violates constant bus restrictions)
 v_div_fmas_f32 v0, v0, v1, private_limit
 
 // v_addc_co_u32 implicitly reads VCC (VOP2)
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // NOGFX9: error: invalid operand (violates constant bus restrictions)
 v_addc_co_u32 v0, vcc, shared_base, v0, vcc
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // NOGFX9: error: invalid operand (violates constant bus restrictions)
 v_madak_f32 v0, shared_base, v0, 0x11213141
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // NOGFX9: error: invalid operand (violates constant bus restrictions)
 v_cmp_eq_f32 s[0:1], private_base, private_limit
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // NOGFX9: error: invalid operand (violates constant bus restrictions)
 v_cmp_eq_f32 s[0:1], private_base, s0
 
-// NOSICIVI: error: not a valid operand.
+// NOSICIVI: error: failed parsing operand.
 // NOGFX9: error: invalid operand (violates constant bus restrictions)
 v_pk_add_f16 v255, private_base, private_limit

llvm/trunk/test/MC/AMDGPU/vop3.s

 // NOSICI: error: instruction not supported on this GPU
 // VI: v_interp_p1_f32_e64 v5, v2, attr0.x ; encoding: [0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x00]
 
 v_interp_p1_f32_e64 v5, v2, attr0.y
 // NOSICI: error: instruction not supported on this GPU
 // VI: v_interp_p1_f32_e64 v5, v2, attr0.y ; encoding: [0x05,0x00,0x70,0xd2,0x40,0x04,0x02,0x00]
 
 v_interp_p1_f32_e64 v5, -v2, attr0.x
-// NOSICI: error: invalid operand for instruction
+// NOSICI: error: not a valid operand
 // VI: v_interp_p1_f32_e64 v5, -v2, attr0.x ; encoding: [0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x40]
 
 v_interp_p1_f32_e64 v5, |v2|, attr0.x
 // NOSICI: error: not a valid operand
 // VI: v_interp_p1_f32_e64 v5, |v2|, attr0.x ; encoding: [0x05,0x02,0x70,0xd2,0x00,0x04,0x02,0x00]
 
 v_interp_p1_f32_e64 v5, v2, attr0.x clamp
 // NOSICI: error: invalid operand for instruction

 // NOSICI: error: instruction not supported on this GPU
 // VI: v_interp_p2_f32_e64 v255, v2, attr0.x ; encoding: [0xff,0x00,0x71,0xd2,0x00,0x04,0x02,0x00]
 
 v_interp_p2_f32_e64 v5, v2, attr31.x
 // NOSICI: error: instruction not supported on this GPU
 // VI: v_interp_p2_f32_e64 v5, v2, attr31.x ; encoding: [0x05,0x00,0x71,0xd2,0x1f,0x04,0x02,0x00]
 
 v_interp_p2_f32_e64 v5, -v2, attr0.x
-// NOSICI: error: invalid operand for instruction
+// NOSICI: error: not a valid operand
 // VI: v_interp_p2_f32_e64 v5, -v2, attr0.x ; encoding: [0x05,0x00,0x71,0xd2,0x00,0x04,0x02,0x40]
 
 v_interp_p2_f32_e64 v5, |v2|, attr0.x
 // NOSICI: error: not a valid operand
 // VI: v_interp_p2_f32_e64 v5, |v2|, attr0.x ; encoding: [0x05,0x02,0x71,0xd2,0x00,0x04,0x02,0x00]
 
 v_interp_p2_f32_e64 v5, v2, attr0.x clamp
 // NOSICI: error: invalid operand for instruction
 // VI: v_interp_p2_f32_e64 v5, v2, attr0.x clamp ; encoding: [0x05,0x80,0x71,0xd2,0x00,0x04,0x02,0x00]
 
 v_interp_p2_f32_e64 v5, v2, attr0.x div:2
 // NOSICI: error: not a valid operand
 // VI: v_interp_p2_f32_e64 v5, v2, attr0.x div:2 ; encoding: [0x05,0x00,0x71,0xd2,0x00,0x04,0x02,0x18]
 
 
 v_interp_p1ll_f16 v5, v2, attr31.x
 // NOSICI: error: invalid operand for instruction
 // VI: v_interp_p1ll_f16 v5, v2, attr31.x ; encoding: [0x05,0x00,0x74,0xd2,0x1f,0x04,0x02,0x00]
 
 v_interp_p1ll_f16 v5, v2, attr0.w
 // NOSICI: error: invalid operand for instruction
 // VI: v_interp_p1ll_f16 v5, v2, attr0.w ; encoding: [0x05,0x00,0x74,0xd2,0xc0,0x04,0x02,0x00]
 
 v_interp_p1ll_f16 v5, -v2, attr0.x
-// NOSICI: error: invalid operand for instruction
+// NOSICI: error: not a valid operand
 // VI: v_interp_p1ll_f16 v5, -v2, attr0.x ; encoding: [0x05,0x00,0x74,0xd2,0x00,0x04,0x02,0x40]
 
 v_interp_p1ll_f16 v5, |v2|, attr0.x
 // NOSICI: error: not a valid operand
 // VI: v_interp_p1ll_f16 v5, |v2|, attr0.x ; encoding: [0x05,0x02,0x74,0xd2,0x00,0x04,0x02,0x00]
 
 v_interp_p1ll_f16 v5, v2, attr0.x high
 // NOSICI: error: invalid operand for instruction

 // NOSICI: error: invalid operand for instruction
 // VI: v_interp_p1lv_f16 v5, v2, attr1.x, v3 ; encoding: [0x05,0x00,0x75,0xd2,0x01,0x04,0x0e,0x04]
 
 v_interp_p1lv_f16 v5, v2, attr0.z, v3
 // NOSICI: error: invalid operand for instruction
 // VI: v_interp_p1lv_f16 v5, v2, attr0.z, v3 ; encoding: [0x05,0x00,0x75,0xd2,0x80,0x04,0x0e,0x04]
 
 v_interp_p1lv_f16 v5, -v2, attr0.x, v3
-// NOSICI: error: invalid operand for instruction
+// NOSICI: error: not a valid operand
 // VI: v_interp_p1lv_f16 v5, -v2, attr0.x, v3 ; encoding: [0x05,0x00,0x75,0xd2,0x00,0x04,0x0e,0x44]
 
 v_interp_p1lv_f16 v5, v2, attr0.x, -v3
-// NOSICI: error: invalid operand for instruction
+// NOSICI: error: not a valid operand
 // VI: v_interp_p1lv_f16 v5, v2, attr0.x, -v3 ; encoding: [0x05,0x00,0x75,0xd2,0x00,0x04,0x0e,0x84]
 
 v_interp_p1lv_f16 v5, |v2|, attr0.x, v3
 // NOSICI: error: not a valid operand
 // VI: v_interp_p1lv_f16 v5, |v2|, attr0.x, v3 ; encoding: [0x05,0x02,0x75,0xd2,0x00,0x04,0x0e,0x04]
 
 v_interp_p1lv_f16 v5, v2, attr0.x, |v3|
 // NOSICI: error: not a valid operand

 // NOSICI: error: invalid operand for instruction
 // VI: v_interp_p2_f16 v5, v2, attr32.x, v3 ; encoding: [0x05,0x00,0x76,0xd2,0x20,0x04,0x0e,0x04]
 
 v_interp_p2_f16 v5, v2, attr0.w, v3
 // NOSICI: error: invalid operand for instruction
 // VI: v_interp_p2_f16 v5, v2, attr0.w, v3 ; encoding: [0x05,0x00,0x76,0xd2,0xc0,0x04,0x0e,0x04]
 
 v_interp_p2_f16 v5, -v2, attr0.x, v3
-// NOSICI: error: invalid operand for instruction
+// NOSICI: error: not a valid operand
 // VI: v_interp_p2_f16 v5, -v2, attr0.x, v3 ; encoding: [0x05,0x00,0x76,0xd2,0x00,0x04,0x0e,0x44]
 
 v_interp_p2_f16 v5, v2, attr0.x, -v3
-// NOSICI: error: invalid operand for instruction
+// NOSICI: error: not a valid operand
 // VI: v_interp_p2_f16 v5, v2, attr0.x, -v3 ; encoding: [0x05,0x00,0x76,0xd2,0x00,0x04,0x0e,0x84]
 
 v_interp_p2_f16 v5, |v2|, attr0.x, v3
 // NOSICI: error: not a valid operand
 // VI: v_interp_p2_f16 v5, |v2|, attr0.x, v3 ; encoding: [0x05,0x02,0x76,0xd2,0x00,0x04,0x0e,0x04]
 
 v_interp_p2_f16 v5, v2, attr0.x, |v3|
 // NOSICI: error: not a valid operand

llvm/trunk/test/MC/AMDGPU/vop3p-err.s

 v_pk_add_u16 v1, v2, v3 op_sel:[2,0]
 
 // GFX9: 33: error: failed parsing operand.
 v_pk_add_u16 v1, v2, v3 op_sel:[-1,0]
 
 // GFX9: 35: error: failed parsing operand.
 v_pk_add_u16 v1, v2, v3 op_sel:[0,-1]
 
-// GFX9: 42: error: not a valid operand.
+// GFX9: 42: error: failed parsing operand.
 v_pk_add_u16 v1, v2, v3 op_sel:[0,0,0,0,0]
 
 // XXGFX9: invalid operand for instruction
 v_pk_add_u16 v1, v2, v3 neg_lo:[0,0]
 
 //
 // Regular modifiers on packed instructions
 //
 
 // FIXME: should be invalid operand for instruction
 // GFX9: :18: error: not a valid operand.
 v_pk_add_f16 v1, |v2|, v3
 
-// GFX9: :18: error: invalid operand for instruction
+// GFX9: :18: error: not a valid operand
 v_pk_add_f16 v1, abs(v2), v3
 
 // GFX9: :22: error: not a valid operand.
 v_pk_add_f16 v1, v2, |v3|
 
-// GFX9: :22: error: invalid operand for instruction
+// GFX9: :22: error: not a valid operand.
 v_pk_add_f16 v1, v2, abs(v3)
 
-// GFX9: :18: error: invalid operand for instruction
+// GFX9: :18: error: not a valid operand.
 v_pk_add_f16 v1, -v2, v3
 
-// GFX9: :22: error: invalid operand for instruction
+// GFX9: :22: error: not a valid operand.
 v_pk_add_f16 v1, v2, -v3
 
-// GFX9: :18: error: invalid operand for instruction
+// GFX9: :18: error: not a valid operand.
 v_pk_add_u16 v1, abs(v2), v3
 
-// GFX9: :18: error: invalid operand for instruction
+// GFX9: :18: error: not a valid operand.
 v_pk_add_u16 v1, -v2, v3
 
 //
 // Constant bus restrictions
 //
 
 // GFX9: invalid operand (violates constant bus restrictions)
 v_pk_add_f16 v255, s1, s2

llvm/trunk/test/MC/AMDGPU/vop_sdwa.s

 v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 
 // NOSICI: error
 // NOVI:   error
 // GFX9:   v_cndmask_b32_sdwa v5, -1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x00,0xc1,0x06,0x86,0x06]
 v_cndmask_b32_sdwa v5, -1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 
 // NOSICI: error
-// NOVI:   error
-// GFX9:   v_cndmask_b32_sdwa v5, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x0e]
+// GFX89:  v_cndmask_b32_sdwa v5, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x0e]
 v_cndmask_b32_sdwa v5, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 
 //===----------------------------------------------------------------------===//
 // Check VOPC opcodes
 //===----------------------------------------------------------------------===//
 
 // NOSICI: error:
 // VI: v_cmp_eq_f32 vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x02,0x04]

 // NOSICI: error: invalid operand for instruction
 // NOGFX89: error: invalid operand for instruction
 v_add_f32 v0, s0, v[0:1] dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2
 
 // NOSICI: error: invalid operand for instruction
 // NOGFX89: error: invalid operand for instruction
 v_add_f32 v0, s0, v[0:3] dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2
 
-// NOSICI: error: invalid operand for instruction
+// NOSICI: error: not a valid operand
 // NOGFX89: error: invalid operand for instruction
 v_add_f16 v1, v[2:3], v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2
 
-// NOSICI: error: invalid operand for instruction
+// NOSICI: error: not a valid operand
 // NOGFX89: error: invalid operand for instruction
 v_add_f16 v1, s[2:3], v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2
 
-// NOSICI: error: invalid operand for instruction
+// NOSICI: error: not a valid operand
 // NOGFX89: error: invalid operand for instruction
 v_add_f16 v1, v2, v[2:3] dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2
 
-// NOSICI: error: invalid operand for instruction
+// NOSICI: error: not a valid operand
 // NOGFX89: error: invalid operand for instruction
 v_add_f16 v1, v2, s[2:3] dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2
 
 // NOSICI: error: not a valid operand
 // NOVI: error: not a valid operand
 // NOGFX9: error: invalid operand for instruction
 v_add_u32 v1, v[2:3], v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2