This patch adds support for the BC0F and BC0T MIPS-I instructions. Besides the
support, corresponding assembler and disassembler tests are also added.
Patch by: Igor Petkovic
Contributions from: Simon Dardis
Paths
| Differential D5974
[mips] MIPS-I Branch on Coprocessor 0 Instructions Needs RevisionPublic Authored by sdardis on Oct 24 2014, 7:21 AM.
Details Summary This patch adds support for the BC0F and BC0T MIPS-I instructions. Besides the Patch by: Igor Petkovic Contributions from: Simon Dardis
Diff Detail
Event Timelineipetkovic updated this object. dsanders edited edge metadata. Comment ActionsLGTM with a few nits.
This revision is now accepted and ready to land.Nov 3 2014, 3:30 AM This revision now requires changes to proceed.Sep 26 2016, 7:06 AM sdardis edited edge metadata. Comment ActionsRebase to trunk, update predicates to reflect GAS exclusions. Comment Actions Rebased to trunk. I've changed the instruction predicates to match GAS, for the sake of compatibility. This revision now requires changes to proceed.Jul 18 2019, 7:00 PM
Revision Contents
Diff 87442 lib/Target/Mips/MipsInstrFormats.td
lib/Target/Mips/MipsInstrInfo.td
lib/Target/Mips/MipsSchedule.td
lib/Target/Mips/MipsScheduleGeneric.td
lib/Target/Mips/MipsScheduleP5600.td
test/MC/Disassembler/Mips/mips1/valid-mips1-el.txt
test/MC/Disassembler/Mips/mips1/valid-mips1.txt
test/MC/Disassembler/Mips/mips2/valid-mips2-el.txt
test/MC/Disassembler/Mips/mips2/valid-mips2.txt
test/MC/Disassembler/Mips/mips3/valid-mips3-el.txt
test/MC/Disassembler/Mips/mips3/valid-mips3.txt
test/MC/Disassembler/Mips/mips32/valid-mips32-el.txt
test/MC/Disassembler/Mips/mips32/valid-mips32.txt
test/MC/Disassembler/Mips/mips32r2/valid-mips32r2-el.txt
test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt
test/MC/Disassembler/Mips/mips32r3/valid-mips32r3-el.txt
test/MC/Disassembler/Mips/mips32r3/valid-mips32r3.txt
test/MC/Disassembler/Mips/mips32r5/valid-mips32r5-el.txt
test/MC/Disassembler/Mips/mips32r5/valid-mips32r5.txt
test/MC/Disassembler/Mips/mips4/valid-mips4-el.txt
test/MC/Disassembler/Mips/mips4/valid-mips4.txt
test/MC/Disassembler/Mips/mips64/valid-mips64-el.txt
test/MC/Disassembler/Mips/mips64r2/valid-mips64r2-el.txt
test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt
test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt
test/MC/Mips/mips1/valid.s
test/MC/Mips/mips2/valid.s
test/MC/Mips/mips3/valid.s
test/MC/Mips/mips32/valid.s
test/MC/Mips/mips32r2/valid.s
test/MC/Mips/mips32r3/valid.s
test/MC/Mips/mips32r5/valid.s
test/MC/Mips/mips4/valid.s
test/MC/Mips/mips5/valid.s
test/MC/Mips/mips64/valid.s
test/MC/Mips/mips64r2/valid.s
test/MC/Mips/mips64r3/valid.s
test/MC/Mips/mips64r5/valid.s
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Nit: It's not very clear what 'nd' means (no-delay?). Could we use 'BranchLikely' or 'HasDelaySlot' instead?