[MIPS] [microMIPS] Enable dynamic stack realignment.

[mbrkusanin]

Summary

Dynamic stack realignment was disabled on micromips by checking if target
has standard encoding. We simply change the condition to skip Mips16 only.

[mbrkusanin]

Test was updated to include micromips. Since this is an older test the output was not generated with update_llc_test_checks.py so only lines that differ from mips were updated using new prefixes. Should I update the test with the given script? It could give quite a large output. Also new prefixes for each line might need to be introduced.

[atanasyan]

LGTM with a few nits

We simply weaken the condition to not include micromips.

I guess you mean mips16 not micromips in the comment to the patch. Right?

Should I update the test with the given script?

I would keep this change compact and do not regenerate test cases using the update_llc_test_checks.py script.

lib/Target/Mips/MipsRegisterInfo.cpp

324–325

I would write the comment as "Support dynamic stack realignment for all targets except Mips16."

[mbrkusanin]

Comments fixed.

[mbrkusanin]

We simply weaken the condition to not include micromips.

I guess you mean mips16 not micromips in the comment to the patch. Right?

Sorry, my comment was confusing. I was referring to the line of code that I changed. It was checking if target had standard encoding (is micromips or mips16) and that was the condition that was weakened to only check if target is mips16.

I changed it to make it more clear. Hope it's alright now.

lib/Target/Mips/MipsRegisterInfo.cpp

bool MipsRegisterInfo::canRealignStack(const MachineFunction &MF) const {
   // requirement than the stack's alignment is already lost at this point.
   if (!TargetRegisterInfo::canRealignStack(MF))
     return false;
 
   const MipsSubtarget &Subtarget = MF.getSubtarget<MipsSubtarget>();
   unsigned FP = Subtarget.isGP32bit() ? Mips::FP : Mips::FP_64;
   unsigned BP = Subtarget.isGP32bit() ? Mips::S7 : Mips::S7_64;
 
-  // Support dynamic stack realignment only for targets with standard encoding.
-  if (!Subtarget.hasStandardEncoding())
+  // Support dynamic stack realignment for all targets except Mips16.
+  if (Subtarget.inMips16Mode())
     return false;
 
   // We can't perform dynamic stack realignment if we can't reserve the
   // frame pointer register.
   if (!MF.getRegInfo().canReserveReg(FP))
     return false;
 
   // We can realign the stack if we know the maximum call frame size and we
   // don't have variable sized objects.
   if (Subtarget.getFrameLowering()->hasReservedCallFrame(MF))
     return true;
 
   // We have to reserve the base pointer register in the presence of variable
   // sized objects.
   return MF.getRegInfo().canReserveReg(BP);
 }

test/CodeGen/Mips/dynamic-stack-realignment.ll

 ; RUN: llc < %s -march=mips -mcpu=mips2 -relocation-model=pic | FileCheck %s \
-; RUN:    --check-prefixes=ALL,GP32
+; RUN:    --check-prefixes=ALL,GP32,GP32-M
 ; RUN: llc < %s -march=mips -mcpu=mips32 -relocation-model=pic | FileCheck %s \
-; RUN:    --check-prefixes=ALL,GP32
+; RUN:    --check-prefixes=ALL,GP32,GP32-M
 ; RUN: llc < %s -march=mips -mcpu=mips32r6 -relocation-model=pic | FileCheck %s \
-; RUN:    --check-prefixes=ALL,GP32
+; RUN:    --check-prefixes=ALL,GP32,GP32-M
+; RUN: llc < %s -march=mips -mcpu=mips32r2 -mattr=+micromips -relocation-model=pic | FileCheck %s \
+; RUN:    --check-prefixes=ALL,GP32,GP32-MM,GP32-MMR2
+; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
+; RUN:    --check-prefixes=ALL,GP32,GP32-MM,GP32-MMR6
 ; RUN: llc < %s -march=mips64 -mcpu=mips3 -relocation-model=pic | FileCheck %s \
 ; RUN:    --check-prefixes=ALL,GP64,N64
 ; RUN: llc < %s -march=mips64 -mcpu=mips64 -relocation-model=pic | FileCheck %s \
 ; RUN:    --check-prefixes=ALL,GP64,N64
 ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 -relocation-model=pic | FileCheck %s \
 ; RUN:    --check-prefixes=ALL,GP64,N64
 ; RUN: llc < %s -march=mips64 -mcpu=mips3 -target-abi n32 -relocation-model=pic | FileCheck %s \
 ; RUN:    --check-prefixes=ALL,GP64,N32

 define void @func_01() {
 entry:
 ; GP32-LABEL: func_01:
 
   ; prologue
   ; FIXME: We are currently over-allocating stack space. This particular case
   ;        needs a frame of up to between 16 and 512-bytes but currently
   ;        allocates between 1024 and 1536 bytes
-  ; GP32:       addiu   $sp, $sp, -1024
+  ; GP32-M:     addiu   $sp, $sp, -1024
+  ; GP32-MMR2:  addiusp -1024
+  ; GP32-MMR6:  addiu   $sp, $sp, -1024
   ; GP32:       sw      $ra, 1020($sp)
   ; GP32:       sw      $fp, 1016($sp)
   ;
   ; GP32:       move    $fp, $sp
   ; GP32:       addiu   $[[T0:[0-9]+|ra|gp]], $zero, -512
   ; GP32-NEXT:  and     $sp, $sp, $[[T0]]
 
   ; body
   ; GP32:       addiu   $[[T1:[0-9]+]], $sp, 512
-  ; GP32:       sw      $[[T1]], 16($sp)
+  ; GP32-M:     sw      $[[T1]], 16($sp)
+  ; GP32-MM:    sw16    $[[T1]], 16(${{[0-9]+}})
 
   ; epilogue
   ; GP32:       move    $sp, $fp
   ; GP32:       lw      $fp, 1016($sp)
   ; GP32:       lw      $ra, 1020($sp)
-  ; GP32:       addiu   $sp, $sp, 1024
+  ; GP32-M:     addiu   $sp, $sp, 1024
+  ; GP32-MMR2:  addiusp 1024
+  ; GP32-MMR6:  addiu   $sp, $sp, 1024
 
   %a = alloca i32, align 512
   call void @helper_01(i32 0, i32 0, i32 0, i32 0, i32* %a)
   ret void
 }
 
 declare void @helper_02(i32, i32, i32, i32,
                         i32, i32, i32, i32, i32*)

 
 ; O32 ABI
 define void @func_03(i32 %p0, i32 %p1, i32 %p2, i32 %p3, i32* %b) {
 entry:
 ; GP32-LABEL: func_03:
 
   ; body
   ; FIXME: We are currently over-allocating stack space.
-  ; GP32-DAG:   addiu   $[[T0:[0-9]+]], $sp, 512
-  ; GP32-DAG:   sw      $[[T0]], 16($sp)
-  ; GP32-DAG:   lw      $[[T1:[0-9]+]], 1040($fp)
-  ; GP32-DAG:   sw      $[[T1]], 20($sp)
+  ; GP32-DAG:     addiu   $[[T0:[0-9]+]], $sp, 512
+  ; GP32-M-DAG:   sw      $[[T0]], 16($sp)
+  ; GP32-MM-DAG:  sw16    $[[T0]], 16(${{[0-9]+}})
+  ; GP32-DAG:     lw      $[[T1:[0-9]+]], 1040($fp)
+  ; GP32-M-DAG:   sw      $[[T1]], 20($sp)
+  ; GP32-MM-DAG:  sw16    $[[T1]], 20(${{[0-9]+}})
 
   %a = alloca i32, align 512
   call void @helper_03(i32 0, i32 0, i32 0, i32 0, i32* %a, i32* %b)
   ret void
 }
 
 declare void @helper_04(i32, i32, i32, i32,
                         i32, i32, i32, i32, i32*, i32*)

 
 ; O32 ABI
 define void @func_05(i32 %sz) {
 entry:
 ; GP32-LABEL: func_05:
 
   ; prologue
   ; FIXME: We are currently over-allocating stack space.
-  ; GP32:       addiu   $sp, $sp, -1024
+  ; GP32-M:     addiu   $sp, $sp, -1024
+  ; GP32-MMR2:  addiusp -1024
+  ; GP32-MMR6:  addiu   $sp, $sp, -1024
   ; GP32:       sw      $fp, 1020($sp)
   ; GP32:       sw      $23, 1016($sp)
   ;
   ; GP32:       move    $fp, $sp
   ; GP32:       addiu   $[[T0:[0-9]+|gp]], $zero, -512
   ; GP32-NEXT:  and     $sp, $sp, $[[T0]]
   ; GP32-NEXT:  move    $23, $sp
 
   ; body
   ; GP32:       addiu   $[[T1:[0-9]+]], $zero, 222
   ; GP32:       sw      $[[T1]], 508($23)
 
   ; epilogue
   ; GP32:       move    $sp, $fp
   ; GP32:       lw      $23, 1016($sp)
   ; GP32:       lw      $fp, 1020($sp)
-  ; GP32:       addiu   $sp, $sp, 1024
+  ; GP32-M:     addiu   $sp, $sp, 1024
+  ; GP32-MMR2:  addiusp 1024
+  ; GP32-MMR6:  addiu   $sp, $sp, 1024
 
   %a0 = alloca i32, i32 %sz, align 512
   %a1 = alloca i32, align 4
 
   store volatile i32 111, i32* %a0, align 512
   store volatile i32 222, i32* %a1, align 4
 
   ret void
; GP32-LABEL: func_07:
 
   ; body
   ; FIXME: We are currently over-allocating stack space.
   ; GP32-DAG:       lw      $[[T0:[0-9]+]], 1040($fp)
   ;
   ; GP32-DAG:       addiu   $[[T1:[0-9]+]], $zero, 222
   ; GP32-DAG:       sw      $[[T1]], 508($23)
   ;
-  ; GP32-DAG:       sw      $[[T2:[0-9]+]], 16($sp)
+  ; GP32-M-DAG:     sw      $[[T2:[0-9]+]], 16($sp)
+  ; GP32-MM-DAG:    sw16    $[[T2:[0-9]+]], 16($[[T3:[0-9]+]])
 
   %a0 = alloca i32, i32 %sz, align 512
   %a1 = alloca i32, align 4
 
   store volatile i32 111, i32* %a0, align 512
   store volatile i32 222, i32* %a1, align 4
 
   call void @helper_01(i32 0, i32 0, i32 0, i32 0, i32* %a1)