This is an archive of the discontinued LLVM Phabricator instance.

[X86] Add gcc rotate intrinsics to ia32intrin.h
ClosedPublic

Authored by craig.topper on Mar 13 2019, 10:11 PM.

Details

Summary

This is another attempt at what Erich Keane tried to do in r355322.a

This adds rolb, rolw, rold, rolq and their ror equivalent as always_inline wrappers around __builtin_rotate* which will lower to funnel shift intrinsics in IR.

Additionally, when _MSC_VER is not defined we will define _rotl, _lrotl, _rotr, _lrotr as macros to one of the always_inline intrinsics mentioned above. Making sure that _lrotl/_lrotr use either 32 or 64 bit based on the size of long. These need to be macros because we have builtins with the same name for MS compatibility, but _MSC_VER isn't always defined when those builtins are enabled.

We also define _rotwl and _rotwr as macros aliasing to rolw/rorw just like gcc to complete the set. These don't need to be gated with _MSC_VER because these aren't MS builtins.

I've added tests both for non-MS and -ms-extensions with and without _MSC_VER being defined.

Diff Detail

Event Timeline

craig.topper created this revision.Mar 13 2019, 10:11 PM
Herald added a project: Restricted Project. · View Herald TranscriptMar 13 2019, 10:11 PM
Herald added a subscriber: jdoerfert. · View Herald Transcript

Add the test file

Harbormaster completed remote builds in B29128: Diff 190567.

Fix bad comment copy/paste

rnk accepted this revision.Mar 15 2019, 3:12 PM

Looks good to me. Let's wait for @jyknight though.

lib/Headers/ia32intrin.h
120

Can you add comments here indicating that these are already provided as builtins for MSVC, so these macros are unnecessary?

133

And, add a comment here indicating that these are not builtins, so they are provided in all modes.

This revision is now accepted and ready to land.Mar 15 2019, 3:12 PM

Add comments based on rnk's review

jyknight accepted this revision.Mar 18 2019, 12:38 PM

Looks good.

This revision was automatically updated to reflect the committed changes.