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[AMDGPU][MC][GFX9] Added support of operands shared_base, shared_limit, private_base, private_limit, pops_exiting_wave_id
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Authored by dp on Mar 13 2019, 3:17 AM.

Details

Summary

See bug 39297: https://bugs.llvm.org/show_bug.cgi?id=39297

Note that these operands are defined as 32-bits only. However in MC assembler they should be enabled for both 32-bit and 64-bit operands.

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Repository
rL LLVM

Event Timeline

dp created this revision.Mar 13 2019, 3:17 AM
This revision is now accepted and ready to land.Mar 13 2019, 9:12 AM
dp updated this revision to Diff 190843.Mar 15 2019, 9:54 AM

After a discussion with HW people it turned out that these operands (shared_base, shared_limit etc) differ from inline constants in that they compete with other scalars for constant bus access.

This change includes the following corrections:

  • modified comments and functions to refer these operands as "named inline values" rather than "inline constants";
  • enabled constant bus checks for named inline values;
  • corrected tests.
This revision was automatically updated to reflect the committed changes.
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