Page MenuHomePhabricator

[ARM] [FIX] Restrict vfmal.f16 and vfmsl.f16 indexed version
ClosedPublic

Authored by dnsampaio on Mar 6 2019, 4:34 AM.

Details

Summary

The indexed variant of vfmal.f16 and vfmsl.f16 q/d variations allows only d0 - d7 / s0 - s15 in the respective indexed operand.
Reference:
https://developer.arm.com/docs/ddi0597/b/simd-and-floating-point-instructions-alphabetic-order/vfmal-by-scalar-vector-floating-point-multiply-add-long-to-accumulator-by-scalar

Currently all registers are accepted, but the 2 / 1 upper bit[s] are / is ignored:

llvm-mc -triple arm -mattr=+fp16fml,+neon -show-encoding -o - -
vfmsl.f16       q0, d1, d0[0]
vfmsl.f16       q0, d1, d8[0]
vfmsl.f16       q0, d1, d16[0]
        .text
        vfmsl.f16       q0, d1, d0[0]   @ encoding: [0x50,0x08,0x11,0xfe]
        vfmsl.f16       q0, d1, d8[0]   @ encoding: [0x50,0x08,0x11,0xfe]
        vfmsl.f16       q0, d1, d16[0]  @ encoding: [0x50,0x08,0x11,0xfe]

vfmsl.f16       d0, s1, s0[0]
vfmsl.f16       d0, s1, s16[0]
        vfmsl.f16       d0, s1, s0[0]   @ encoding: [0x90,0x08,0x10,0xfe]
        vfmsl.f16       d0, s1, s16[0]  @ encoding: [0x90,0x08,0x10,0xfe]

This patch restrict the indexed operand to be between d0 - d7 and s0 - s15 ranges.

Diff Detail

Repository
rL LLVM

Event Timeline

dnsampaio created this revision.Mar 6 2019, 4:34 AM
dnsampaio planned changes to this revision.Mar 6 2019, 8:19 AM

I can just fix the existing class declaration.

dnsampaio updated this revision to Diff 189525.Mar 6 2019, 9:25 AM

Fixed existing class.

dnsampaio edited the summary of this revision. (Show Details)Mar 7 2019, 6:00 AM
dnsampaio added a reviewer: DavidSpickett.
dnsampaio updated this revision to Diff 189709.Mar 7 2019, 6:59 AM
dnsampaio retitled this revision from [ARM] [FIX] Restrict vfmal.f16 and vfmsl.f16 indexed operand to d[0-7] to [ARM] [FIX] Restrict vfmal.f16 and vfmsl.f16 indexed version.
dnsampaio edited the summary of this revision. (Show Details)

Added the D variant.

dnsampaio edited the summary of this revision. (Show Details)Mar 7 2019, 6:59 AM
dnsampaio updated this revision to Diff 189720.Mar 7 2019, 7:55 AM

Fixed DecodeDPRRegisterClass to DecodeDPRRegisterClass on the custom decoder.

olista01 accepted this revision.Mar 8 2019, 9:00 AM

LGTM

This revision is now accepted and ready to land.Mar 8 2019, 9:00 AM
This revision was automatically updated to reflect the committed changes.