[PowerPC] more opportunity for converting reg+reg to reg+imm

[shchenz]

Summary

PowerPC should convert following reg+reg to reg+imm.

body: |
  bb.0.entry:
    liveins: $x3, $f1, $x5  
    $x3 = ADDI8 $x5, 100  
    STFSX killed $f1, $zero8, $x3  
    STD killed $x3, killed $x5, 100  
    BLR8 implicit $lr8, implicit $rm

Fix the bug to make it work.

[stefanp]

Looked through this and tried a couple of things but overall it looks good.
My only comments are a couple of minor nit items.

llvm/lib/Target/PowerPC/PPCInstrInfo.cpp

3209

nit:
Since you have updated the condition in the code can you also update the comment above it?

llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instr-add.mir

2

nit:
You should probably add to the test a comment to say what you are testing here.
It's not really obvious from the test because you just ask to stop after the peephole opt and that could mean you are looking for any number of things.

[shchenz]

Thanks for your comment @stefanp. Updated.

[nemanjai]

Oh yeah, the existing condition was always true. Thanks for fixing this. LGTM.

[shchenz]

@nemanjai Thanks for your comments.

Change test comment position to avoid YAML grammar error.

[shchenz]

use '#' as a comment marker outside of body.

llvm/lib/Target/PowerPC/PPCInstrInfo.cpp

if (It->modifiesRegister(Reg, &getRegisterInfo()) && (&*It) != &DefMI)
       return false;
     // Made it to DefMI without encountering a clobber.
     if ((&*It) == &DefMI)
       break;
   }
   assert((&*It) == &DefMI && "DefMI is missing");
 
   // If DefMI also uses the register to be forwarded, we can only forward it
   // if DefMI is being erased.
-  if (DefMI.readsRegister(Reg, &getRegisterInfo()))
+  if (DefMI.modifiesRegister(Reg, &getRegisterInfo()))
     return KillDefMI;
 
   return true;
 }
 
 bool PPCInstrInfo::isImmElgibleForForwarding(const MachineOperand &ImmMO,
                                              const MachineInstr &DefMI,
                                              const ImmInstrInfo &III,

llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instr-add.mir

+# RUN: llc -mtriple=powerpc64le--linux-gnu -stop-after ppc-pre-emit-peephole %s -o - -verify-machineinstrs | FileCheck %s
+
+---
+name: testFwdOperandKilledAfter
+# CHECK: name: testFwdOperandKilledAfter
+tracksRegLiveness: true 
+body: |
+  bb.0.entry:
+    liveins: $x3, $f1, $x5  
+    $x3 = ADDI8 $x5, 100  
+    STFSX killed $f1, $zero8, $x3  
+    ; CHECK: STFS killed $f1, 100, $x5  
+    STD killed $x3, killed $x5, 100  
+    ; CHECK: STD killed $x3, killed $x5, 100  
+    BLR8 implicit $lr8, implicit $rm 
+...